Datasheet CLC502MDC, CLC502AMC, CLC502AJP, CLC502AJE-TR13, CLC502AD-MLS Datasheet (NSC)

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Features
Output clamping with fast recovery
0.0025% settling in 25ns (32ns max.)
Low power, 170mW
Low distortion. -50dBc at 20MHz
Applications
Output clamping applications
High-accuracy D/A converters
Pulse amplitude modulation systems
General Description
CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling
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June 1999
CLC502
Clamping, Low-Gain Op Amp with Fast 14-bit Settling
Package Dimensions
Pinout
DIP & SOIC
© 1999 National Semiconductor Corporation http://www.national.com
Printed in the U.S.A.
The CLC502 is available in several versions to meet a variety of requirements. A three-letter suffix deter mines the version:
CLC502AJP -40°C to +85°C 8-pin plastic DIP CLC502AJE -40°C to +85°C 8-pin plastic SOIC
DESC SMD number: 5962-91743
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CLC502 Electrical Characteristics
(Av= +2,Vcc= ±5V,RL= 100Ω,Rf= 250Ω,VH= +3V, VL= -3V)
Absolute Maximum Ratings Miscellaneous Ratings
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Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
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Typical Performance Characteristics
(TA= 25°, Av= +2,VCC= ±5V, RL= 100
,,
Rf= 250Ω,VH= +3V,VL= -3V )
Non-Inverting Frequency Response
Magnitude (1dB/div)
1
10 100
Phase (deg)
-180
-450
-270
-360
-90
0
V
out
= 0.5V
pp
Av = 2
Rf = 249
Av = 1
Rf = 301
Av = 8
Rf = 110
Av = 4
Rf = 200
Frequency (MHz)
Inverting Frequency Response
Magnitude (1dB/div)
1
10 100
Phase (deg)
-360
-630
-450
-540
-270
-180
V
out
= 0.5V
pp
Av = -2
Rf = 237
Av = -1
Rf = 249
Av = -8
Rf = 210
Av = -4
Rf = 249
Frequency (MHz)
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Pac kage Thermal Resistance
Package
θθ
JC
θθ
JA
AJP 65°C/W 120°C/W AJE 60°C/W 140°C/W
Reliability Information
Transistor Count 46
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CLC502
Clamping, Low-Gain Op Amp with Fast 14-bit Settling
http://www.national.com 6
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