Datasheet CLC115MDC, CLC115AJ-QML Datasheet (NSC)

Page 1
Features
Closed-loop, quad buffer
700MHz small-signal bandwidth
270V/µs slew rate
0.08%/0.04° differential gain/phase
60dB channel isolation (10MHz)
-62dBc 2nd and 3rd harmonics at 20MHz
Applications
Multi-channel video distribution
Video switching buffers
High-speed analog multiplexing
Channelized EW
High-density buffering
Instrumentation amps
Active filters
General Description
CLC115 Quad, Closed-Loop Monolithic Buffer
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June 1999
CLC115
Quad, Closed-Loop Monolithic Buffer
Pinout
© 1999 National Semiconductor Corporation http://www.national.com
Printed in the U.S.A.
CLC115AJP -40°C to +85°C 8-pin plastic DIP CLC115AJE -40°C to +85°C 8-pin plastic SOIC CLC115ALC -40°C to +85°C dice CLC115AMC -55°C to +125°C dice qualified to Method 5008,
MIL-STD-883, Level B MIL-STD-883, Level B
Contact factory for other packages and DESC SMD number.
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CLC115 Electrical Characteristics
(Vcc= +5V, RL= 100Ω; unless specified)
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Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
Reliability Information
Transistor Count 64
Pac kage Thermal Resistance
Package
θθ
JC
θθ
JA
Plastic (AJP) 55°C/W 105°C/W Surface Mount (AJE) 45°C/W 115°C/W
Page 3
CLC115 Typical Performance Characteristics
(TA= +25°,VCC= ±5V, RL= 100Ω; unless specified)
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CLC115
Quad, Closed-Loop Monolithic Buffer
http://www.national.com 6
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