The CHV2242a is a monolithic multif unction for
frequency generation. It integrates a Ku-band
oscillator with frequency control (VCO), a Qband frequency multiplier and buffer amplifiers.
For performance optimisation, two external
ports (ERC1 and ERC2) allow a passive
resonator coupling to the oscillator ( at one third
of output frequency). On chip Schottky diode,
based on a P-HEMT, is used as varactor. All the
active devices are internally self biased.
The circuit is manufactured with the P-HEMT
process : 0.25µm gate length, via holes through
the substrate, air bridges and electron beam
gate lithography.
It is available in chip form.
Main Features
n Ku-band VCO + Q-band multiplier
n On chip varactor
n External resonator for centre f requency
control and phase noise optimisation
n Low phase noise
n Auxiliary output at VCO frequency
n High temperature rang e
n On-chip self biasing
n Automatic assembly oriented
n Chip size 2.41 x 1.18 x 0.1 mm
Unit = µm
External chip size = 2410 x 1180 +/- 35
Chip thickness = 100 +/- 10
HF Pads (2, 16,19) = 68 x 118
DC/IF Pads = 100 x 100
Pin numberPin nameDescription
1,3,5,15,17,18,20
2ERC1
4V-tune
5,7,9,10,14
6
8,12-V
11,13+V
16RF_out
19ERC2
21AUX
Ground : should not be bonded. If required, please ask
for more information.
External Resonator Coupling Port 1
Tuning voltage input port
NC
GND (optional)
Negative supply voltage
Positive supply voltage
RF output at 38GHz
External Resonator Coupling Port 2
Auxiliary RF output at 12.7GHz (RF_out / 3) (optional)
Ref. : DSCHV22421074 -15-Mar.-013/8Specifications subject to change without notic e
This drawing shows an example of assembly and bias configuration. All the
transistors are internally self biased. The posit ive and negative voltages can be
respectively connected together (see drawing) according to the recommended
values given in the electrical characteristics table. Due to the high value of
frequency sensitivity versus tuning voltage (around 500MHz/V), the signal
applied to V_tune port must have very low level of noise.
For the RF pads the equivalent wire bonding inductance (diameter=25µm) has t o
be according to the following recomm endat ion.
PortEquivalent inductance
(nH)
Approximated wire
length (mm)
ERC1 (2)L_erc1 = 0.40.5
ERC2 (19)L_erc2 = 0.40.5
RF_out (16)L_out = 0.280.35
For a micro-strip configuration a hole in the substrate is recom mended for chip
assembly.
Ref. : DSCHV22421074 -15-Mar.-014/8Specifications subject to change without notic e
This resonator can be used for 77GHz FMCW-based radar applications.
The chip has been especially designed to be coupled to a medium Q resonator
printed on temperature compensated sof t substrate. The resonance is given by
three half wave coupled lines. The length of the coupler (L) gives the centre
frequency and the space between the coupled lines (s) gives t he bandwidth. For
easy connection and phase considerations half wave lines are at the input and
output of the filter. All the recommended dimensions are given in the following
drawing.
The main substrate characteristics ar e the following (ROGERS R03003)
Dielectric
constant
3250µm0.001313 ppm/°C
The typical resonator length (L) is 7.35mm f or a coupling value (s) of 0.4m m and
for a frequency of 38.25GHz. However this L value should have to be adjusted
depending on the final chip environment.
Other possibility is ARLON/CLTE substrat e. (L is 7.27mm for s=0. 4m m )
Ref. : DSCHV22421074 -15-Mar.-015/8Specifications subject to change without notic e
The following information is about the S parameter of the resonator (plot for S21 and table
for the four parameters). These values don’t include the wire bonding equivalent
inductance L_erc1 and L_erc2 given in section “Typical Assembly and Bias Configuration”.
S21 of the proposed external resonator
S parameters of the proposed external r esonat or
Ref. : DSCHV22421074 -15-Mar.-016/8Specifications subject to change without notic e
The external resonator has to be an equivalent band-pass filter with 180°
insertion phase at resonance (oscillation) fr equency. However, this f ilter must be
compatible to the loop parameters of the oscillator (between ERC ports) in order
to obtain the oscillation conditions and to avoid parasitic oscillations. The
following information concerns the S paramet ers of the chip (plots for S21 and
tables for the four parameters), reference ports are ERC1 and ERC2. These
values don’t include the wire bonding equivalent inductance L_erc1 and L_erc2
given in section “Typical Assembly and Bias Configuration” . For more detail and
for a wider band analysis a complete S parameter f ile is available on request.
MMIC S21 for V_tune=0V (between ERC1 and ERC2)
MMIC S21 for V_tune=2V (between ERC1 and ERC2)
Ref. : DSCHV22421074 -15-Mar.-017/8Specifications subject to change without notic e
MMIC S parameters for V_tune=0V (between ERC1 and ERC2)
Q-band VCO
MMIC S parameters for V_tune=2V (between ERC1 and ERC2)
Ordering Information
Chip form:CHV2242a-99F/00
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patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of united monolithic semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United monolithic semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from united
monolithic semiconductors S.A.S.
Ref. : DSCHV22421074 -15-Mar.-018/8Specifications subject to change without notic e