Datasheet CGS2535VX, CGS2535V Datasheet (NSC)

CGS2535V/CGS2535TV
Commercial Quad 1 to 4 Clock Drivers/Industrial Quad
1 to 4 Clock Drivers

General Description

These Clock Generation and Support clock drivers are spe­cifically designed for driving memory arrays requiring large
fanouts while operating at high speeds.

This device meets the rise and fall time requirements of the
90 and 100 MHz Pentium

™

processors.

The CGS2535 is a non-inverting 4 to 16 driver with CMOS
I/O structures. The CGS2535 specification guarantees
part-to-part skew variation.

Features

n Guaranteed:

— 1.0 ns rise and fall times while driving 12 inches of

50Ω microstrip terminated with 25 pF

— 350 ps pin-to-pin skew (t

OSLH

and t

OSHL

)

n 650 ps part-to-part variation on positive or negative

transition

@

5V V

CC

n Operates with either 3.3V or 5.0V supply
n Inputs 5V tolerant with V

CC

in 3.3V range

n Symmetric output current drive: 24 mA I

OH/IOL

n Industrial temperature range −40˚C to +85˚C
n Symmetric package orientation
n Large fanout for memory driving applications
n Guaranteed 2 kV ESD protection
n Implemented on National’s ABT family process
n 28-pin PLCC for optimum skew performance

Connection Diagrams

Truth Table

Input Output

In (0–3) ABCD Out (0–3)

Pentium™is a trademark of Intel Corporation.

Pin Assignment for 28-Pin PLCC

DS011954-5

CGS2535

DS011954-2

March 1997

CGS2535V Commercial Quad 1 to 4 Clock Drivers/CGS2535TV Industrial Quad 1 to 4 Clock

Drivers

© 1997 National Semiconductor Corporation DS011954 http:\\www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contactthe National SemiconductorSales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) 7.0V

Input Voltage (V

I

) 7.0V
Input Current −30 mA
Current Applied to Output

(High/Low) Twice the Rated I

OH/IOL

Operating Temp. Industrial grade −40˚C to +85˚C

Comm. grade 0˚C to +70˚C

Storage Temperature Range −65˚C to +150˚C

Airflow Typical θ

JA

0 LFM 62˚C/W
225 LFM 43˚C/W
500 LFM 34˚C/W

900 LFM 27˚C/W

Recommended Operating
Conditions

Supply Voltage VCC4.75V to 5.25V

V

CC

3.0V to 3.6V

Maximum Input Rise/Fall Time

(0.8V to 2.0V) 5 ns

Free Air Operating Temperature

Commercial 0˚C to + 70˚C
Industrial −40˚C to + 85˚C

Note 1: The Absolute Maximum Ratings are those values beyond which the
safety of the device cannot be guaranteed. The device should not be oper­ated at these limits. The parametric values defined in the DC and AC Electri­cal Characteristics tables are not guaranteed at the absolute maximum rat­ings. The Recommended Operating Conditions will define the conditions for
actual device operation.

DC Electrical Characteristics

Over recommended operating free air temperature range. All typical values are measured at V

CC

=

5V, T

A

=

25˚C.

Symbol Parameter Conditions V

CC

(V) Min Typ Max Units

V

IH

Input High Level Voltage 3.0 2.1 V

4.5 3.15

5.5 3.85

V

IL

Input Low Level Voltage 3.0 0.9 V

4.5 1.35

5.5 1.65

V

IK

Input Clamp Voltage I

I

=

−18 mA 4.5 −1.2 V

V

OH

High Level Output Voltage I

OH

=

−50 µA 3.0 2.9 V

4.5 4.4

5.5 5.4

I

OH

=

−24 mA 3.0 2.46 V

4.5 3.76

5.5 4.76

V

OL

Low Level Output Voltage I

OL

=

50 µA 3.0 0.1 V

4.5 0.1

5.5 0.1

I

OL

=

24 mA 3.0 0.44 V

4.5 0.44

5.5 0.44

I

I

Input Current@Max Input Voltage V

IH

=

7V 5.5 7 µA

V

IH

=

V

CC

3.6 1

I

IH

High Level Input Current V

IH

=

V

CC

5.5 5 µA

I

IL

Low Level Input Current V

IL

=

0V 5.5 −5 µA

I

OLD

Minimum Dynamic Output Current
(Note 2)

V

OLD

=

1.65V (max) 5.5 75 mA

V

OLD

=

0.9V (max) 3.0 (Note 3) 36

I

OHD

Minimum Dynamic Output Current
(Note 2)

V

OHD

=

3.85V (min) 5.5 −75 mA

V

OHD

=

2.1V (min) 3.0 (Note 3) −25

I

CC

Supply Current 3.6 75 µA

5.5 235

C

IN

Input Capacitance 5.0 5 pF

Note 2: Maximum test duration 2.0 ms, one output loaded at a time.
Note 3: At V

CC

=

3.3V, I

OLD

=

55 mA min;

@

V

CC

=

3.6V, I

OLD

=

64 mA min

At V

CC

=

3.3V, I

OHD

=

−58 mA min;

@

V

CC

=

3.6V, I

OHD

=

−66 mA min

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AC Electrical Characteristics (Notes 4, 5, and 6)

Over recommended operating free air temperature specified. All typical values are measured at V

CC

=

5V, T

A

=

25˚C.

Symbol Parameter

CGS2535

Units

V

CC

T

A

=

+25˚C T

A

=

−40˚C to +85˚C

(V) C

L

=

50 pF, R

L

=

500Ω (Note 7)

(Note 11) C

L

=

50 pF, R

L

=

500Ω

Min Typ Max Min Typ Max

f

max

Frequency Maximum 3.0 100 MHz

5.0 125

t

PLH

Low-to-High Propagation Delay 3.3 4.5 2.5 4.5 ns
CK to O

n

@

1 MHz (Note 13) 5.0 3.5 2.0 3.5

t

PHL

High-to-Low Propagation Delay 3.3 4.5 2.5 4.5 ns
CK to O

n

@

1 MHz (Note 13) 5.0 3.5 2.0 3.5

t

PLH

Low-to-High Propagation Delay 3.3 5.0 2.5 5.0 ns
CK to O

n

@

66.67 MHz (Note 13) , (Note

14)

5.0 4.5 2.0 4.5

t

PHL

High-to-Low Propagation Delay 3.3 5.0 2.5 5.0 ns
CK to O

n

@

66.67 MHz (Note 13) , (Note

14)

5.0 4.5 2.0 4.5

t

OSLH

Maximum Skew Common Edge 3.3 150 350 300 350 ps
Output-to-Output Variation 5.0 150 350 300 350
(Note 4) , (Note 6)

t

OSHL

Maximum Skew Common Edge 3.3 150 350 300 350 ps
Output-to-Output Variation 5.0 150 350 300 350
(Note 4) , (Note 6)

t

rise

, Rise/Fall Time 3.3 3.5 3.5 ns

t

fall

(from 0.8V/2.0V to 2.0V/0.8V) (Note 8) 5.0 3.0 3.0

t

rise

, Rise/Fall Time 3.3 0.8 1.0 ns

t

fall

(from 0.8V/2.0V to 2.0V/0.8V) (Note 9) ,
(Note 14)

5.0 0.4 0.6

t

rise

, Rise/Fall Time 3.3 1.0 1.0 ns

t

fall

(from 0.8V/2.0V to 2.0V/0.8V) (Note 10) ,
(Note 14)

5.0 0.7 0.9

t

High

Pulse Width Duration High 3.3 4.0 4.0 ns
(Note 5) , (Note 6) , (Note 14) 5.0 4.0 4.0

t

Low

Pulse Width Duration Low 3.3 4.0 4.0
(Note 5) , (Note 6) , (Note 14) 5.0 4.0 4.0

t

PVLH

Part-to-Part Variation of 3.3 650 1.0 ns
Low-to-High Transitions 5.0 650 650 ps

@

1 MHz (Note 13)

t

PVHL

Part-to-Part Variation of 3.3 650 1.0 ns
High-to-Low Transitions 5.0 650 650 ps

@

1 MHz (Note 13)

t

PVLH

Part-to-Part Variation of 3.3 1.0 1.0

ns

Low-to-High Transitions 5.0 1.0 1.0

@

66.67 MHz (Note 13) , (Note 14)

t

PVHL

Part-to-Part Variation of 3.3 1.0 1.0
High-to-Low Transitions 5.0 1.0 1.0

@

66.67 MHz (Note 13) , (Note 14)

Note 4: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged
device and output bank. The specifications apply to any outputs switching in the same direction either LOW to HIGH (t

OSLH

) or HIGH to LOW (t

OSHL

).

Note 5: Time high is measured with outputs at 2.0V or above. Time low is measured with outputs at 0.8V or below. Input waveform characteristics for t

High,tLow

mea-

surement: f=66.67 MHz, duty cycle=50%.

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AC Electrical Characteristics (Notes 4, 5, and 6) (Continued)

Note 6: The input waveform has a rise and fall time transition time of 2.5 ns (10%to 90%).
Note 7: Industrial range (−40˚C to +85˚C) limits apply to the commercial temperature range (0˚C to +70˚C).
Note 8: These Rise and Fall times are measured with C

L

=

50 pF, R

L

=

500Ω (see

Figure 1

).

Note 9: These Rise and Fall times are measured with C

L

=

25 pF, R

L

=

500Ω (see

Figure 1

), and are guaranteed by design.

Note 10: These Rise and Fall times are measured driving 12 inches of 50Ω microstrip terminated with equivalent C

L

=

25 pF (see

Figure 2

), and are guaranteed

by design.
Note 11: Voltage Range 5.0 is 5.0V

±

0.25V, 3.3 is 3.3V±0.3V.

Note 12: For increased output drive, output pins may be connected together when the corresponding input pins are connected together.
Note 13: All 16 outputs switching simultaneously.
Note 14: Guaranteed by design.

Timing Information

DS011954-7

DS011954-9

FIGURE 1. A.C. Load (Notes 8 and 9)

C

L

=

Total Load Including Probes

DS011954-10

FIGURE 2. A.C. Load (Note 10)

C

L

=

Total Load Including Probes

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CGS2534/35/36/37
Memory Array Driving

In order to minimize the total load on the address bus, quite
often memory arrays are driven by buffers while having the
inputs of the buffers tied together. Although this practice was
feasible in the conventional memory designs, in today’s high
speed, large buswidth designs which require address fetch­ing at higher speeds, this technique produces many undes­ired results such as cross-talk and over/undershoot.

CGS2534/35/36/37 Quad 1 to 4 clock drivers were designed
specifically to address these application issues on high
speed, large memory arrays systems.

These drivers are optimized to drive large loads, with 3.5 ns
propagation delays. These drivers produce less noise while
reducing the total capacitive loading on the address bus by
having only four inputs tied together (see the diagram below,
point A). This helps to minimize the overshoot and under­shoot by having only four outputs being switched simulta­neously.

Also this larger fan-out helps to save board space since for
every one of these drivers, two conventional buffers were
typically being used.

Another feature associated with these clock drivers is a
350 ps pin-to-pin skew specification. The minimum skew
specification allows high speed memory system designers to
optimize the performance of their memory sub-system by
operating at higher frequencies without having concerns
about output-to-output (bank-to-bank) synchronization prob­lems which are associated with driving high capacitive loads
(Point B).

The diagram below depicts a “2534/35/36/37” a memory
subsystem operating at high speed with large memory ca­pacity.The address bus is common to both the memory and
the CPU and I/Os.

These drivers can operate beyond 125 MHz, and are also
available in 3V–5V TTL/CMOS versions with large current
drive .

Device V

CC

I/O Output Configuration

2534 5 TTL Inverting quad 1–4
2535 3 or 5 CMOS Non-inverting quad 1–4
2536 3 or 5 CMOS Inverting, Non-inverting,

÷

2

2537 5 TTL Inverting quad 1–4 with series 8Ω output resistors

DS011954-8

5 http:\\www.national.com

Ordering Information

(Contact NSC Marketing for specific date of availability)

DS011954-11

http:\\www.national.com 6

7

Physical Dimensions inches (millimeters)

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28-Lead Molded Plastic Leaded Chip Carrier

Order Number CGS2535V or CGS2535TV

NS Package Number V28A

CGS2535V Commercial Quad 1 to 4 Clock Drivers/CGS2535TV Industrial Quad 1 to 4 Clock

Drivers

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.