Datasheet ceu830g_ced830g Datasheet

Page 1
CED830G/CEU830G
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
500V, 4.5A, R
High power and current handing capability.
Lead free product is acquired.
TO-251 & TO-252 package.
ABSOLUTE MAXIMUM RATINGS T
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
Maximum Power Dissipation @ TC = 25 C
Operating and Store Temperature Range TJ,T
= 1.5Ω @VGS = 10V.
DS(ON)
G
CEU SERIES TO-252(D-PAK)
Parameter
a
- Derate above 25 C
.
DS(ON)
D
G
D
S
S
CED SERIES TO-251(I-PAK)
= 25 C unless otherwise noted
c
G
Symbol
V
DS
V
GS
I
D
I
DM
P
D
stg
PRELIMINARY
D
S
Limit
Units
500
±30
4.5
18
68
0.54
-55 to 150 C
W/ C
V
V
A
A
W
Thermal Characteristics
Parameter Symbol Limit Units
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Details are subject to change without notice .
C/W
C/W
RθJA
2.2RθJC
50
Rev 2. 2011.JulyThis is preliminary information on a new product in development now .
http://www.cetsemi.com
1
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CED830G/CEU830G
Electrical Characteristics T
= 25 C unless otherwise noted
c
Parameter Symbol Min Units
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics
b
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics
c
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
c
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
R
BV
C
C
C
t
d(on)
t
d(off)
Q
Q
DSS
I
DSS
I
GSSF
IGSSR
GS(th)
DS(on)
g
FS
iss
oss
rss
t
r
t
f
Q
g
gs
gd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
b
Reverse Recovry Time
Reverse Recovry Charge
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by des ign, not subject to production testing . d.Limited only by maximum temperature allowed . e.Pulse width limited by safe operating area .
f
IS
V
SD
Trr
Qrr ID = 5A, di/dt = 100A/us
Test Condition
VGS = 0V, ID = 250µA
VDS = 500V, VGS = 0V
VGS = 30V, VDS = 0V
VGS = -30V, VDS = 0V
VGS = VDS, ID = 250µA
VGS = 10V, ID = 2.5A
VDS = 50V, ID = 4A
VDS = 25V, VGS = 0V, f = 1.0 MHz
VDD = 250V, ID = 4A, VGS = 10V, R
GEN
= 14Ω
VDS = 400V, ID = 4A, VGS = 10V
VGS = 0V, IS = 3.1A
ID = 5A, di/dt = 100A/us
Typ Max
500
2.5 4
7
595
90
20
15
14
30
10
13
2.5
5
1
100
-100
1.51.2
30
28
60
20
17
4.5
1.6
429
1.3
V
µA
nA
nA
V
Ω
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
A
V
ns
nC
2
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CED830G/CEU830G
12
VGS=10,9,8,7V
10
8
6
4
ID, Drain Current (A)
2
0
0 2 4 8 12
VDS, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
900
750
C
rss
iss
C
oss
600
450
300
C, Capacitance (pF)
150
C
0
0 5 10 15 20 25
VDS, Drain-to-Source Voltage (V)
12
10
V
=6V
GS
V
=4V
GS
106
8
6
4
ID, Drain Current (A)
2
0
TJ=125C
1 2 3 4 65
25 C
-55 C
VGS, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
2.2 ID=2.5A
VGS=10V
1.9
1.6
1.3
1.0
RDS(ON), Normalized
0.7
RDS(ON), On-Resistance(Ohms)
0.4
-100 -50 0 50 100 150 200
TJ, Junction Temperature( C)
Figure 3. Capacitance
1.3 VDS=V
GS
ID=250µA
1.2
1.1
1.0
0.9
0.8
VTH, Normalized
0.7
Gate-Source Threshold Voltage
0.6
-50 -25 0 25 50 75 100 125 150
TJ, Junction Temperature( C)
Figure 5. Gate Threshold Variation
with Temperature
Figure 4. On-Resistance Variation
with Temperature
V
=0
V
GS
0
10
-1
10
IS, Source-drain current (A)
-2
10
0.4 0.6 0.8 1.0
1.41.2
VSD, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
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CED830G/CEU830G
10
VDS=400V ID=4A
8
6
4
2
VGS, Gate to Source Voltage (V)
0
0 3 6 9 15
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
DD
V
IN
V
R
D
V
GS
GEN
R
G
S
R
Limit
DS(ON)
DC
1ms
10ms
10
100ms
2
3
10
1
10
0
10
ID, Drain Current (A)
TC=25 C TJ=150 C
Single Pulse
-1
10
0
12
10
1
10
VDS, Drain-Source Voltage (V)
Figure 8. Maximum Safe
Operating Area
on
t
d(off)
t
r
d(on)
V
V
t
OUT
IN
10%
L
OUT
V
t
90%
10% 10%
INVERTED
50% 50%
90%
t
off
f
t
90%
PULSE WIDTH
Figure 9. Switching Test Circuit
0
10
D=0.5
0.2
0.1
-1
10
0.05
r(t),Normalized Effective
Transient Thermal Impedance
0.02
0.01
Single Pulse
-2
10
-5
10
10
Figure 11. Normalized Thermal Transient Impedance Curve
Figure 10. Switching Waveforms
PDM
t1
t2
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
-4
-3
10
-2
10
-1
10
0 10
10
1
Square Wave Pulse Duration (sec)
4
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