Datasheet ceu6086_ced6086 Datasheet

CED6086/CEU6086

N-Channel Enhancement Mode Field Effect Transistor

FEATURES

60V, 50A, R

Super high dense cell design for extremely low R

= 8.7mΩ @VGS = 10V.

DS(ON)

DS(ON)

.

High power and current handing capability.

Lead free product is acquired.

TO-251 & TO-252 package.

D

G

S
CEU SERIES
TO-252(D-PAK)

ABSOLUTE MAXIMUM RATINGS T

Parameter

Drain-Source Voltage

Gate-Source Voltage

Drain Current-Continuous

Drain Current-Pulsed

Maximum Power Dissipation @ TC = 25 C

a

- Derate above 25 C

G

D

S

CED SERIES
TO-251(I-PAK)

= 25 C unless otherwise noted

c

Symbol

V

DS

V

GS

I

D

I

DM

P

D

G

Limit

±20

0.33

Operating and Store Temperature Range TJ,Tstg -55 to 175

60

50

200

50

D

S

Units

V

V

A

A

W

W/ C

C

Thermal Characteristics

Parameter Symbol Limit Units

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

C/W

C/W

RθJA

50

3RθJC

Rev 3. 2011.July

http://www.cetsemi.comDetails are subject to change without notice .

1

CED6086/CEU6086

Electrical Characteristics T

= 25 C unless otherwise noted

c

Parameter Symbol Min Units

Off Characteristics

Drain-Source Breakdown Voltage

Zero Gate Voltage Drain Current

Gate Body Leakage Current, Forward

Gate Body Leakage Current, Reverse

On Characteristics

b

Gate Threshold Voltage

Static Drain-Source

On-Resistance

Dynamic Characteristics

c

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Switching Characteristics

c

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

V

R

BV

C

C

C

t

d(on)

t

d(off)

Q

Q

DSS

I

DSS

I

GSSF

IGSSR

GS(th)

DS(on)

iss

oss

rss

t

r

t

f

Q

g

gs

gd

Drain-Source Diode Characteristics and Maximun Ratings

Drain-Source Diode Forward Current

Drain-Source Diode Forward Voltage

Notes :

a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 0.1mH, IAS =42A, VDD = 24V, RG = 25Ω, Starting TJ = 25 C

b

I

S

V

SD

Test Condition

VGS = 0V, ID = 250µA

VDS = 60V, VGS = 0V

VGS = 20V, VDS = 0V

VGS = -20V, VDS = 0V

VGS = VDS, ID = 250µA

VGS = 10V, ID = 24A

VDS = 25V, VGS = 0V,
f = 1.0 MHz

VDD = 30V, ID = 20A,
VGS = 10V, R

GEN

= 4.7Ω

VDS = 48V, ID = 20A,
VGS = 10V

VGS = 0V, IS = 40A

Typ Max

60

2 4

6.7 mΩ

2420

235

150

13

4

45

6

50

8

16

1

100

-100

8.7

26

8

90

12

65

40

1.2

V

µA

nA

nA

V

pF

pF

pF

ns

ns

ns

ns

nC

nC

nC

A

V

2

30

25

VGS=10,9,8,V

CED6086/CEU6086

25 C

75

20

15

10

ID, Drain Current (A)

5

0

0.0 1 2 43

VDS, Drain-to-Source Voltage (V)

Figure 1. Output Characteristics

3000

2500

2000

1500

1000

C, Capacitance (pF)

500

C

rss

0

0 5 10 15 20 25

VDS, Drain-to-Source Voltage (V)

60

V

=5V

GS

5 6

45

30

ID, Drain Current (A)

TJ=125 C

15

0

2 3 4 5906 7 8

-55 C

VGS, Gate-to-Source Voltage (V)

Figure 2. Transfer Characteristics

2.2

C

iss

RDS(ON), Normalized

C

oss

ID=24A
VGS=10V

1.9

1.6

1.3

1.0

0.7

RDS(ON), On-Resistance(Ohms)

0.4

-100 -50 0 50 100 150 200

TJ, Junction Temperature( C)

Figure 3. Capacitance

1.3
VDS=V

GS

ID=250µA

1.2

1.1

1.0

0.9

0.8

VTH, Normalized

0.7

Gate-Source Threshold Voltage

0.6

-50 -25 0 25 50 75 100 125 150

TJ, Junction Temperature( C)

Figure 5. Gate Threshold Variation

with Temperature

Figure 4. On-Resistance Variation

with Temperature

V

=0

V

GS

2

10

1

10

IS, Source-drain current (A)

0

10

0.4 0.6 0.8 1.0

1.41.2

VSD, Body Diode Forward Voltage (V)

Figure 6. Body Diode Forward Voltage

Variation with Source Current

3

CED6086/CEU6086

10

VDS=48V
ID=20A

8

6

4

2

VGS, Gate to Source Voltage (V)

0

0 9 18 27 54

Qg, Total Gate Charge (nC)

Figure 7. Gate Charge

V

IN

V

D

V

GS

GEN

R

G

S

36 45

DD

R

L

3

10

R

2

10

1

10

0

10

ID, Drain Current (A)

-1

10

10

Limit

DS(ON)

TC=25 C
TJ=175 C

Single Pulse

-2

10

100us

1ms

10ms

DC

-1

0

10

1

10

2

10

VDS, Drain-Source Voltage (V)

Figure 8. Maximum Safe

Operating Area

on

t

d(off)

t

r

d(on)

t

OUT

V

OUT

V

IN

V

10%

t

90%

10% 10%

INVERTED

50% 50%

90%

t

off

f

t

90%

PULSE WIDTH

Figure 9. Switching Test Circuit

0

10

D=0.5

0.2

-1

0.1

10

0.05

0.02

10

-2

-5

10

0.01

Single Pulse

-4

10

r(t),Normalized Effective

Transient Thermal Impedance

Figure 11. Normalized Thermal Transient Impedance Curve

Figure 10. Switching Waveforms

-3

10

-2

10

Square Wave Pulse Duration (sec)

4

PDM

t1

t2

1. RθJA (t)=r (t) * RθJA

2. RθJA=See Datasheet

3. TJM-TA = P* RθJC (t)

4. Duty Cycle, D=t1/t2

-1

10

0

10

1

10