Datasheet cem4228 Datasheet

CEM4228

Dual N-Channel Enhancement Mode Field Effect Transistor

FEATURES

40V, 6.3A, R
R
Super high dense cell design for extremely low R

High power and current handing capability.
Lead free product is acquired.
Surface mount Package.

ABSOLUTE MAXIMUM RATINGS T

Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed

Maximum Power Dissipation

Operating and Store Temperature Range TJ,Tstg -55 to 150

= 30mΩ @VGS = 10V.

DS(ON)

= 45mΩ @VGS = 4.5V.

DS(ON)

Parameter

a

SO-8

.

DS(ON)

1

= 25 C unless otherwise noted

A

Symbol Limit

V

DS

V

GS

I

D

I

DM

P

D

D1 D1 D2 D2

8 7 6 5

1 2 3 4

S1 G1 S2 G2

40

±20

6.3
20

2.0

5

Units

V
V
A

A
W
C

Thermal Characteristics

Parameter Symbol Limit Units

Thermal Resistance, Junction-to-Ambient

Specification and data are subject to change without notice .

b

C/W62.5RθJA

Rev 1. 2006.March

http://www.cetsemi.com

1

CEM4228

Electrical Characteristics T

= 25 C unless otherwise noted

A

Parameter Symbol Min Units

Off Characteristics

Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse

On Characteristics

c

Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forwand Transconductance

Dynamic Characteristics

d

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance

Switching Characteristics

d

Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-On Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge

V
R

BV

C
C
C

t

d(on)

t

d(off)

Q
Q

DSS

I

DSS

I

GSSF

IGSSR

GS(th)

DS(on)

g

FS

iss
oss
rss

t

r

t

f

Q

g

gs

gd

Drain-Source Diode Characteristics and Maximun Ratings

Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage

Notes :

a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.


b

c

I

S

V

SD

Test Condition

VGS = 0V, ID = 250µA
VDS = 40V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V

VGS = VDS, ID = 250µA
VGS = 10V, ID = 6A
VGS = 4.5V, ID = 5A
VDS = 5V, ID = 6A

VDS = 20V, VGS = 0V,
f = 1.0 MHz

VDD = 20V, ID = 6A,
VGS = 10V, R

GEN

= 3Ω

VDS = 20V, ID = 6A,
VGS = 10V

VGS = 0V, IS = 1.0A

40

1

Typ Max

100

-100

3024
4535 mΩ

9

1050

155

95

14
10
17
18

20.5

30
20
35
35
27

3.5

4.0

1.0

1.2

V

1

µA

nA
nA

V

3

mΩ

S

pF
pF
pF

ns
ns
ns

ns
nC
nC
nC

A
V

2

CEM4228

30

VGS=10,5V

24

18

12

ID, Drain Current (A)

6

0

0 1 432

VDS, Drain-to-Source Voltage (V)

Figure 1. Output Characteristics

1500

1250

1000

750

500

C, Capacitance (pF)

250

C

rss

0

0 5 10 15 20 25

C

iss

C

oss

VDS, Drain-to-Source Voltage (V)

VGS=4.5V

VGS=4.0V

V

=3.5V

GS

20

16

12

8

ID, Drain Current (A)

4

TJ=125 C

0

25 C

2.5 3.02.0 4.5

VGS, Gate-to-Source Voltage (V)

Figure 2. Transfer Characteristics

2.2
ID=6A

VGS=10V

1.9

1.6

1.3

1.0

RDS(ON), Normalized

0.7

RDS(ON), On-Resistance(Ohms)

0.4

-100 -50 0 50 100 150 200

TJ, Junction Temperature( C)

5

-55 C

3.5 4.0

Figure 3. Capacitance

1.3
VDS=V

GS

ID=250µA

1.2

1.1

1.0

0.9

0.8

VTH, Normalized

0.7

Gate-Source Threshold Voltage

0.6

-50 -25 0 25 50 75 100 125 150

TJ, Junction Temperature( C)

Figure 5. Gate Threshold Variation

with Temperature

Figure 4. On-Resistance Variation

with Temperature

V

=0

V

GS

1

10

0

10

IS, Source-drain current (A)

-1

10

0.4 0.6 0.8 1.0

1.41.2

VSD, Body Diode Forward Voltage (V)

Figure 6. Body Diode Forward Voltage

Variation with Source Current

3

CEM4228

10

VDS=20V
ID=6A

8

6

4

2

VGS, Gate to Source Voltage (V)

0

0 4 8 16 24

12 20

Qg, Total Gate Charge (nC)

Figure 7. Gate Charge

DD

V

IN

V

D

V

GS

GEN

R

G

S

2

10

R

Limit

DS(ON)

DC

0

100ms

1s

1ms

10ms

10

1

2

10

1

10

0

10

-1

10

ID, Drain Current (A)

-2

10

TA=25 C
TJ=150 C

Single Pulse

-2

10

-1

10

10

VDS, Drain-Source Voltage (V)

Figure 8. Maximum Safe

Operating Area

on

t

d(off)

t

r

t

90%

10% 10%

INVERTED

50% 50%

V

V

d(on)

t

OUT

IN

10%

R

L

OUT

V

90%

t

off

f

t

90%

PULSE WIDTH

Figure 9. Switching Test Circuit

0

10

D=0.5

0.2

-1

0.1

10

0.05

0.02

0.01

-2

10

r(t),Normalized Effective

Single Pulse

Transient Thermal Impedance

-3

10

-4

10

-3

10

Figure 11. Normalized Thermal Transient Impedance Curve

Figure 10. Switching Waveforms

-2

10

-1

10

Square Wave Pulse Duration (sec)

4

PDM

t1

t2

1. RθJA (t)=r (t) * RθJA

2. RθJA=See Datasheet

3. TJM-TA = P* RθJA (t)

4. Duty Cycle, D=t1/t2

0

10

1

10

2

10