Datasheet cem3407l Datasheet

CEM3407L

Dual P-Channel Enhancement Mode Field Effect Transistor

FEATURES

-30V, -5.1A, R R

R

Super high dense cell design for extremely low R

= 48mΩ @VGS = -10V.

DS(ON)

= 65mΩ @VGS = -4.5V.

DS(ON)

= 115mΩ @VGS = -2.5V.

DS(ON)

.

High power and current handing capability. Lead free product is acquired. Surface mount Package.

SO-8

ABSOLUTE MAXIMUM RATINGS T

Parameter

Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed

Maximum Power Dissipation

a

1

= 25 C unless otherwise noted

A

Symbol

V

DS

V

GS

I

D

I

DM

P

D

D1 D1 D2 D2

8

1

S1 G1 S2 G2

Limit

-20.4

Operating and Store Temperature Range TJ,Tstg -55 to 150

-30

±12

-5.1

2.0

7

6 5

2

3 4

Units

V V A

A W C

Thermal Characteristics

Parameter Symbol Limit Units

Thermal Resistance, Junction-to-Ambient

Details are Subject to change without notice

b

C/W62.5RθJA

Rev 1. 2010.Nov

http://www.cetsemi.com

1

CEM3407L

Electrical Characteristics T

= 25 C unless otherwise noted

A

Parameter Symbol Min Units

Off Characteristics

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse

On Characteristics

c

Gate Threshold Voltage Static Drain-Source

On-Resistance

Dynamic Characteristics

d

Input Capacitance Output Capacitance Reverse Transfer Capacitance

Switching Characteristics

d

Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge

V

R

BV

C C C

t

d(on)

t

d(off)

Q Q

DSS

I

DSS

I

GSSF

IGSSR

GS(th)

DS(on)

iss oss rss

t

r

t

f

Q

g

gs

gd

Drain-Source Diode Characteristics and Maximun Ratings

Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage

Notes :

a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 5 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 

b

c

I

S

V

SD

Test Condition

VGS = 0V, ID = -250µA VDS = -30V, VGS = 0V VGS = 12V, VDS = 0V VGS = -12V, VDS = 0V

VGS = VDS, ID = -250µA VGS = -10V, ID = -5.1A VGS = -4.5V, ID = -4.6A VGS = -2.5V, ID = -3.7A

VDS = -15V, VGS = 0V, f = 1.0 MHz

VDD = -15V, ID= -5.1A, VGS = -10V, R

GEN

= 6Ω

VDS = -15V, ID = -5.1A, VGS = -4.5V

VGS = 0V, IS = -1A

Typ Max

-30

-1

100

-100

-0.6 -1.4 4840 65

50 85

115

905 200 160

10

20

4

40

5

8.5

8 80 10 11

2.5

1.5

-2

-1

V

µA

nA nA

V mΩ mΩ mΩ

pF pF pF

ns ns ns

ns nC nC nC

A V

2

CEM3407L

50

-VGS=10,8,6V

40

30

20

-ID, Drain Current (A)

10

0

0 2 8 1064

-VGS=5V

-V

-VDS, Drain-to-Source Voltage (V)

Figure 1. Output Characteristics

1500

1250

C

1000

750

500

C, Capacitance (pF)

250

0

0 5 10 15 20 25

iss

C

s

o

C

rss

-VDS, Drain-to-Source Voltage (V)

10

8

6

=4V

GS

-V

=3V

GS

4

-ID, Drain Current (A)

2

TJ=125 C

0

0 10 2.0 3.00.5 1.5

25 C

-55 C

2.5

-VGS, Gate-to-Source Voltage (V)

Figure 2. Transfer Characteristics

2.2 ID=-5.1A

VGS=-10V

1.9

1.6

1.3

1.0

RDS(ON), Normalized

0.7

RDS(ON), On-Resistance(Ohms)

0.4

-100 -50 0 50 100 150 200

TJ, Junction Temperature( C)

Figure 3. Capacitance

1.3 VDS=V

GS

ID=-250µA

1.2

1.1

1.0

0.9

0.8

VTH, Normalized

0.7

Gate-Source Threshold Voltage

0.6

-50 -25 0 25 50 75 100 125 150

TJ, Junction Temperature( C)

Figure 5. Gate Threshold Variation

with Temperature

Figure 4. On-Resistance Variation

with Temperature

V

=0

V

GS

1

10

0

10

-IS, Source-drain current (A)

-1

10

0.6 0.7 0.8 0.9

1.11.0

-VSD, Body Diode Forward Voltage (V)

Figure 6. Body Diode Forward Voltage

Variation with Source Current

3

10

VDS=-15V ID=-4.9A

8

6

4

2

-VGS, Gate to Source Voltage (V)

0

0 4 8 12 16

Qg, Total Gate Charge (nC)

CEM3407L

R

Limit

DS(ON)

1

10

0

10

-1

10

-ID, Drain Current (A)

TA=25 C TJ=150 C

Single Pulse

-1

10

-VDS, Drain-Source Voltage (V)

10ms

100ms

1s

DC

0

1

10

Figure 7. Gate Charge

IN

V

D

V

GS

GEN

R

G

S

Figure 9. Switching Test Circuit

0

10

D=0.5

0.2

-1

0.1

10

0.05

r(t),Normalized Effective

0.02

Transient Thermal Impedance

-2

10

-4

10

-3

10

DD

V

R

L

OUT

V

Single Pulse

-2

10

Square Wave Pulse Duration (sec)

Figure 8. Maximum Safe

on

t

r

t

90%

10% 10%

INVERTED

50% 50%

V

d(on)

t

OUT

IN

10%

PULSE WIDTH

Figure 10. Switching Waveforms

PDM

-1

10

0

10

Operating Area

t

off

d(off)

t

90%

t1

t2

1. RθJA (t)=r (t) * RθJA

2. RθJA=See Datasheet

3. TJM-TA = P* RθJA (t)

4. Duty Cycle, D=t1/t2

1

10

f

t

2

10

Figure 11. Normalized Thermal Transient Impedance Curve

4