Datasheet CD4051BM, CD4051BC Datasheet (National Semiconductor)

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CD4051BM/CD4051BC Single 8-Channel Analog

Multiplexer/Demultiplexer

CD4052BM/CD4052BC Dual 4-Channel Analog

Multiplexer/Demultiplexer

CD4053BM/CD4053BC Triple 2-Channel Analog

Multiplexer/Demultiplexer

General Description

These analog multiplexers/demultiplexers are digitally con­trolled analog switches having low ‘‘ON’’ impedance and
very low ‘‘OFF’’ leakage currents. Control of analog signals
up to 15V
3–15V. For example, if V
analog signals from
tal inputs of 0 – 5V. The multiplexer circuits dissipate ex­tremely low quiescent power over the full V
V

DD

state of the control signals. When a logical ‘‘1’’ is present at
the inhibit input terminal all channels are ‘‘OFF’’.

CD4051BM/CD4051BC is a single 8-channel multiplexer
having three binary control inputs. A, B, and C, and an inhibit
input. The three binary signals select 1 of 8 channels to be
turned ‘‘ON’’ and connect the input to the output.

CD4052BM/CD4052BC is a differential 4-channel multiplex­er having two binary control inputs, A and B, and an inhibit
input. The two binary input signals select 1 or 4 pairs of
channels to be turned on and connect the differential ana­log inputs to the differential outputs.

CD4053BM/CD4053BC is a triple 2-channel multiplexer
having three separate digital control inputs, A, B, and C, and

can be achieved by digital signal amplitudes of

p-p

b

b

VEEsupply voltage ranges, independent of the logic

e

DD

5V toa5V can be controlled by digi-

5V, V

SS

e

0V and V

DD

eb

EE

b

VSSand

5V,

October 1989

an inhibit input. Each control input selects one of a pair of
channels which are connected in a single-pole double-throw
configuration.

Features

Y

Wide range of digital and analog signal levels: digital
3–15V, analog to 15V

Y

Low ‘‘ON’’ resistance: 80X (typ.) over entire 15V
nal-input range for V

Y

High ‘‘OFF’’ resistance: channel leakage ofg10 pA
(typ.) at V

Y

Logic level conversion for digital addressing signals of
3–15V (V
15 V

Y

Matched switch characteristics: DR
V

DD

Y

Very low quiescent power dissipation under all digital­control input and supply conditions: 1 mW (typ.) at
V

DD

Y

Binary address decoding on chip

p-p(VDD

b

V

EE

b

V

SS

DD

DD

b

b

e

15V

e

V

p-p

b

e

V

DD

e

V

10V

EE

e

V

3–15V) to switch analog signals to

SS

b

e

V

15V)

EE

b

V

DD

EE

15V

EE

ON

e

10V

e

5X (typ.) for

p-p

sig-

CD4051BM/CD4051BC, CD4052BM/CD4052BC, CD4053BM/CD4053BC

Analog Multiplexer/Demultiplexers

Connection Diagrams

Dual-In-Line Packages

CD4051BM/CD4051BC CD4052BM/CD4052BC CD4053BM/CD4053BC

TL/F/5662– 1

Order Number CD4051B, CD4052B, or CD4053B

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

TL/F/5662

Absolute Maximum Ratings

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

DC Supply Voltage (V
Input Voltage (VIN)

DD

)

Storage Temperature Range (TS)
Power Dissipation (P

Dual-In-Line 700 mW

)

D

b

0.5 VDCtoa18 V

b

0.5 VDCto V

a

0.5 V

DD

b

65§Ctoa150§C

DC
DC

Recommended Operating
Conditions

DC Supply Voltage (VDD)

Input Voltage (VIN) 0VtoVDDV

Operating Temperature Range (TA)

4051BM/4052BM/4053BM
4051BC/4052BC/4053BC

a

5VDCtoa15 V

b

55§Ctoa125§C

b

40§Ctoa85§C

Small Outline 500 mW

Lead Temp. (T

) (soldering, 10 sec.) 260§C

L

DC Electrical Characteristics (Note 2)

b

Symbol Parameter Conditions

I

Quiescent Device Current V

DD

e

5V 5 5 150 mA

DD

e

10V 10 10 300 mA

V

DD

e

15V 20 20 600 mA

V

DD

55§C

Min Max Min Typ Max Min Max

Signal Inputs (VIS) and Outputs (VOS)

R

DR

‘‘ON’’ Resistance (Peak R

ON

ON

s

s

V

for V

EE

D‘‘ON’’ Resistance R
Between Any Two (any channel V
Channels selected) or V

‘‘OFF’’ Channel Leakage V
Current, any channel O/I
‘‘OFF’’

‘‘OFF’’ Channel Leakage Inhibite7.5V CD4051
Current, all channels V
‘‘OFF’’ (Common V
OUT/IN) O/I

VDD) (any channel V

IS

e

10 kX V

L

selected) or V

e

10 kX V

L

e

DD

e

e

DD

eb

EE

e
e

I/O

7.5V, V

g

7.5V, I/Oe0V

7.5V,

7.5V, CD4052

0V,

g

7.5V CD4053

V

V
V
or V
V

V
V
or V
V

V

V
V
or V
V

V
V
or V
V

DD
EE

EE

DD
EE

EE

DD
EE

EE

DD
EE

EE

DD
EE

EE

DD
EE

EE

EE

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

eb

2.5V,

2.5V

e

0V

5V

5V

e

0V

7.5V,

7.5V

e

0V

2.5V,

2.5V

e

0V

5V,

5V

e

0V

7.5V,

7.5V

e

0V

7.5V

5V,

10V,

15V,

5V,

10V,

15V,

800 270 1050 1300 X

310 120 400 550 X

200 80 240 320 X

g

50

g

200

g

200

g

200

Control Inputs A, B, C and Inhibit

e

V

V

Low Level Input Voltage V

IL

High Level Input Voltage V

IH

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.

Note 2: All voltages measured with respect to V

EE

k

I

IS

e

V

IS

V

DD

V

DD

V

DD

DD

V

DD

V

DD

SS

e

VSSR

1kXto V

L

2 mA on all OFF channels

VDDthru 1 kX

e

5V 1.5 1.5 1.5 V

e

10V 3.0 3.0 3.0 V

e

15V 4.0 4.0 4.0 V

e

5 3.5 3.5 3.5 V

e

10 7 7 7 V

e

15 11 11 11 V

unless otherwise specified.

SS

2

a

25

§

a

125§C

10 X

10 X

5 X

g

0.01g50

g

0.08g200

g

0.04g200

g

0.02g200

g

500 nA

g

2000 nA

g

2000 nA

g

2000 nA

DC

DC

Units

DC Electrical Characteristics (Note 2) (Continued)

b

Symbol Parameter Conditions

I

I

Input Current V

IN

Quiescent Device Current V

DD

e

15V, V

DD

e

V

0V

IN

e

V

15V, V

DD

e

V

15V

IN

e

5V 20 20 150 mA

DD

e

V

10V 40 40 300 mA

DD

e

V

15V 80 80 600 mA

DD

e

EE

e

EE

0V

0V

40§C

Min Max Min Typ Max Min Max

b

0.1

0.1 10

Signal Inputs (VIS) and Outputs (VOS)

R

DR

‘‘ON’’ Resistance (Peak R

ON

ON

s

for V

s

V

EE

VDD) (any channel V

IS

D‘‘ON’’ Resistance R
Between Any Two (any channel V

e

10 kX V

L

selected) or V

e

10 kX V

L

Channels selected) or V

I/O

DD

DD
EE

e

e

e

eb
e
e

‘‘OFF’’ Channel Leakage V
Current, any channel ‘‘OFF’’ O/I

‘‘OFF’’ Channel Leakage Inhibite7.5V CD4051
Current, all channels V
‘‘OFF’’ (Common V
OUT/IN) O/I

7.5V, V

g

7.5V, I/Oe0V

7.5V,

7.5V, CD4052

0V

g

7.5V CD4053

DD
EE

V

EE

V

DD

V

EE

or V
V

EE

V

DD

V

EE

or V
V

EE

DD
EE

V

EE

V

DD

V

EE

or V
V

EE

V

DD

V

EE

or V
V

EE

EE

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

e

eb

DD

e

eb

2.5V,

2.5V

e

0V

5V,

5V

e

0V

7.5V,

7.5V

e

0V

2.5V,

2.5V

e

0V

5V

5V

e

0V

7.5V,

7.5V

e

0V

7.5V

5V,

10V,

15V,

5V,

10V,

15V,

850 270 1050 1200 X

330 120 400 520 X

210 80 240 300 X

g

50

g

200

g

200

g

200

Control Inputs A, B, C and Inhibit

e

V

V

I

Low Level Input Voltage V

IL

High Level Input Voltage V

IH

Input Current V

IN

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.

Note 2: All voltages measured with respect to V

EE

k

I

IS

e

V

IS

V

DD

V

DD

V

DD

DD

V

DD

V

DD

DD

e

V

IN

V

DD

e

V

IN

unless otherwise specified.

SS

e

VSSR

1kXto V

L

2 mA on all OFF Channels

VDDthru 1 kX

e

5V 1.5 1.5 1.5 V

e

10V 3.0 3.0 3.0 V

e

15V 4.0 4.0 4.0 V

e

5 3.5 3.5 3.5 V

e

10 7 7 7 V

e

15 11 11 11 V

e

15V, V

0V

e

15V, V

15V

SS

e

0V

EE

e

0V

EE

b

0.1

0.1 10

3

a

25§C

b

b

5

b

10

b

5

a

85§C

0.1

b

1.0 mA

0.1 1.0 mA

10 X

10 X

5 X

g

0.01g50

g

0.08g200

g

0.04g200

g

0.02g200

b

5

b

10

b

5

b

0.1

0.1 1.0 mA

g

500 nA

g

2000 nA

g

2000 nA

g

2000 nA

b

1.0 mA

Units

e

e

AC Electrical Characteristics* T

A

25§C, t

e

t

20 ns, unless otherwise specified.

r

f

Symbol Parameter Conditions VDDMin Typ Max Units

e

t

PZH,

t

PZL

t

PHZ,

t

PLZ

C

Propagation Delay Time from V
Inhibit to Signal Output R
(channel turning on) C

Propagation Delay Time from V
Inhibit to Signal Output R
(channel turning off) C

Input Capacitance

IN

Control input 5 7.5 pF

e

V

EE

L

L

EE

L

L

0V 5V 600 1200 ns

SS

e

1kX 10V 225 450 ns

e

50 pF 15V 160 320 ns

e

e

V

0V 5V 210 420 ns

SS

e

1kX 10V 100 200 ns

e

50 pF 15V 75 150 ns

Signal Input (IN/OUT) 10 15 pF

C

OUT

Output Capacitance
(common OUT/IN)

CD4051 10V 30 pF

e

CD4052 V
CD4053 10V 8 pF

C

C

Feedthrough Capacitance 0.2 pF

IOS

Power Dissipation Capacitance

PD

e

V

EE

0V 10V 15 pF

SS

CD4051 110 pF
CD4052 140 pF
CD4053 70 pF

Signal Inputs (VIS) and Outputs (VOS)

e

10 kX

L

e

1 kHz

IS

e

V

5V

IS

p-p

e

e

V

V

EE

L

L

20 log

L

EE

L

0V

SI

e

1kX,V

e

1kX,V

e

1kX,V

e

e

50 pF 10V 15 35 ns

e

e

0V, V

5V

EE

10VOS/VIS

EE

10VOS/VIS

EE

(B)/VIS(A)eb40 dB (Note 3)

10VOS

e

V

0V 5V 25 55 ns

SS

IS

eb

3dB

e

e

V

SS

eb

40 dB

e

e

V

SS

,

p-p

e

0V, V

5V

IS

p-p

0V, VIS(A)e5V

10V 0.04 %

10V 40 MHz

,

10V 10 MHz

p-p

10V 3 MHz

15V 10 25 ns

t

PHL

t

PLH

Sine Wave Response R
(Distortion) f

Frequency Response, Channel R
‘‘ON’’ (Sine Wave Input) 20 log

Feedthrough, Channel ‘‘OFF’’ R

Crosstalk Between Any Two R
Channels (frequency at 40 dB) 20 log

Propagation Delay Signal V
Input to Signal Output C

Control Inputs, A, B, C and Inhibit

e

e

Control Input to Signal V
Crosstalk of channel. 10V 65 mV (peak)

V

EE

SS

Input Square Wave Amplitude

t

PHL,

t

PLH

Propagation Delay Time from V
Address to Signal Output C
(channels ‘‘ON’’ or ‘‘OFF’’) 15V 120 240 ns

*AC Parameters are guaranteed by DC correlated testing.

Note 3: A, B are two arbitrary channels with A turned ‘‘ON’’ and B ‘‘OFF’’.

e

V

EE

SS

e

50 pF 10V 180 360 ns

L

e

0V, R

10 kX at both ends

L

e

10V

e

0V 5V 500 1000 ns

4

Block Diagrams

CD4051BM/CD4051BC

CD4052BM/CD4052BC

TL/F/5662– 2

5

Block Diagrams (Continued)

Truth Table

CD4053BM/CD4053BC

TL/F/5662– 3

INPUT STATES ‘‘ON’’ CHANNELS

INHIBIT C B A CD4051B CD4052B CD4053B

0 0 0 0 0 0X, 0Y cx, bx, ax
0 0 0 1 1 1X, 1Y cx, bx, ay
0 0 1 0 2 2X, 2Y cx, by, ax
0 0 1 1 3 3X, 3Y cx, by, ay
0 1 0 0 4 cy, bx, ax
0 1 0 1 5 cy, bx, ay
0 1 1 0 6 cy, by, ax
0 1 1 1 7 cy, by, ay
1 *** NONE NONE NONE

*Don’t Care condition.

6

Switching Time Waveforms

TL/F/5662– 4

7

Special Considerations

In certain applications the external load-resistor current may
include both V
drawing V
pin, the voltage drop across the bidirectional switch must

DD

and signal-line components. To avoid

DD

current when switch current flows into IN/OUT

Typical Performance Characteristics

‘‘ON’’ Resistance vs Signal
Voltage for T

e

25§C

A

not exceed 0.6V at T
lated from R
through R

values shown). No VDDcurrent will flow

ON

if the switch current flows into OUT/IN pin.

L

‘‘ON’’ Resistance as a
Function of Temperature for
V

DD

s

25§C, or 0.4V at T

A

b

e

V

15V

EE

l

25§C (calcu-

A

‘‘ON’’ Resistance as a
Function of Temperature for

b

e

V

V

DD

10V

EE

‘‘ON’’ Resistance as a
Function of Temperature for

b

e

V

V

DD

5V

EE

TL/F/5662– 5

8

Physical Dimensions inches (millimeters)

Order Number CD4051BMJ, CD4051BCJ, CD4052BMJ,

Cavity Dual-In-Line Package (J)

CD4052BCJ, CD4053BMJ or CD4053BCJ

NS Package Number J16A

Small Outline Package (M)

Order Number CD4051BCM,

CD4052BCM or CD4053BCM

NS Package Number M16A

9

Physical Dimensions inches (millimeters) (Continued)

Analog Multiplexer/Demultiplexers

Molded Dual-In-Line Package (N)

Order CD4051BM, CD4051BC,

CD4052BM, CD4052BC, CD4053BM, CD4053BC

LIFE SUPPORT POLICY

CD4051BM/CD4051BC, CD4052BM/CD4052BC, CD4053BM/CD4053BC

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

NS Package Number N16E

National Semiconductor National Semiconductor National Semiconductor National Semiconductor
Corporation Europe Hong Kong Ltd. Japan Ltd.

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Tel: [phone] Deutsch Tel: (
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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