Datasheet CD4047BCW, CD4047BCN, CD4047BCMX, CD4047BCM Datasheet (Fairchild Semiconductor)

October 1987
Revised May 1999

CD4047BC Low Power Monostable/Astable Multivibrator

© 1999 Fairchild Semiconductor Corporation DS005969.prf www.fairchildsemi.com

CD4047BC
Low Power Monostable/Astable Multivibrator

General Description

The CD4047B is capable of operating in either the
monostable or astable mode. It requires an external capac­itor (between pins 1 and 3) and an external resistor
(between pins 2 and 3) to determine the output pulse width
in the monostable mode, an d the output frequency in the
astable mode.

Astable operation is ena bled by a high lev el o n th e asta bl e
input or low level on the astable

input. The output fre-

quency (at 50% duty cycle) at Q and Q

outputs is deter­mined by the timing c omp onents. A frequency tw ice that of
Q is available at the Oscillator Output; a 50% duty cycle is
not guaranteed.

Monostable operati on is obtained when t he device is trig­gered by LOW-to-HIGH transition at + trigger input or
HIGH-to-LOW transition at − tri gger input. The devic e can
be retriggered by applying a simulta neous LOW-to-HIGH
transition to both the + trigger and retrigger inputs.

A high level on Reset input resets the outputs Q to LOW, Q
to HIGH.

Features

■ Wide supply voltage range: 3.0V to 15V

■ High noise immunity: 0.45 V

DD

(typ.)

■ Low power TTL compatibility: Fan out of 2 driving 74L

or 1 driving 74LS

SPECIAL FEATURES

■ Low power consumption: special CMOS oscillator

configuration

■ Monostable (one-shot) or astable (free-running)

operation

■ True and complemented buffered outputs

■ Only one external R and C required

MONOSTABLE MULTIVIBRATOR FEATURES

■ Positive- or negative-edge trigger

■ Output pulse width independent of trigger pulse duration

■ Retriggerable option for pulse width expansio n

■ Long pulse widths poss ible u sing smal l RC c ompon ents

by means of external counter provision

■ Fast recovery time essentially independent of pulse
width

■ Pulse-width accuracy maintained at duty cycles
approaching 100%

ASTABLE MULTIVIBRATOR FEATURES

■ Free-running or gatable operating modes

■ 50% duty cycle

■ Oscillator output available

■ Good astable frequency stability

typical= ±2% + 0.03%/°C @ 100 kHz
frequency= ±0.5% + 0.015% /°C @ 10 kHz
deviation (circuits trimmed to frequency V

DD

= 10V

±10%)

Applications

• Frequency discriminators

• Timing circuits

• Time-delay applications

• Envelope detection

• Frequency multiplication

• Frequency division

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.

Order Number Package Number Package Description

CD4047BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
CD4047BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

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CD4047BC

Connection Diagram

Pin Assignments for SOIC and DIP

Top View

Function Table

Note 1: External re s is to r between terminals 2 a nd 3. External capacitor between terminals 1 and 3.

Typical Implementation of External Countdown Option

t

EXT

= (N − 1) tA + (tM + tA/2)

FIGURE 1.

Te rminal Connections Output Pulse Typical Output

Function

To V

DD

To V

SS

Input Pulse

From Period or

To Pulse Width

Astable Multivibrator

Free-Running 4, 5, 6, 14 7, 8, 9, 12 10, 11, 13 t

A

(10, 11) = 4.40 RC

True Gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13 t

A

(13) = 2.20 RC

Complement Gating 6, 14 5, 7, 8, 9, 12 4 10, 11, 13

Monostable Multivibrator

Positive-Edge Trigger 4, 14 5, 6, 7, 9, 12 8 10, 11
Negative-Edge Trigger 4, 8, 14 5, 7, 9, 12 6 10, 11 t

M

(10, 11) = 2.48 RC
Retriggerable 4, 14 5, 6, 7, 9 8, 12 10, 11
External Countdown (Note 1) 14 5, 6, 7, 8, 9, 12 Figure 1 Figure 1 Figure 1

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CD4047BC

Block Diagram

Logic Diagram

*Special input prote ction circuit to permit larger input-voltage swi ngs.

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CD4047BC

Absolute Maximum Ratings(Note 2)

(Note 3)

Recommended Operating
Conditions

(Note 3)

Note 2: “Absolute Maximum Ratings” ar e those value s beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should b e operate d at thes e limits. T he table of “Recom­mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actua l device operation.

Note 3: V

SS

= 0V unless otherw is e s pecified.

DC Electrical Characteristics (Note 3)

Note 4: IOH and IOL are tested one output at a time.

DC Supply Voltage (VDD) −0.5V to +18V

DC

Input Voltage (VIN) −0.5V to VDD+0.5V

DC

Storage Temperature Range (TS) −65°C to +150°C
Power Dissipation (P

D

)
Dual-In-Line 700 mW
Small Outline 500 mW

Lead Temperature (T

L

)
(Soldering, 10 seconds) 260°C

DC Supply Voltage (V

DD

) 3V to 15V

DC

Input Voltage (VIN)0 to V

DD VDC

Operating Temperature Range (TA) −40°C to +85°C

Symbol Parameter Conditions

−40°C25°C85°C

Units

Min Max Min Typ Max Min Max

I

DD

Quiescent Device Current VDD = 5V 20 20 150 µA

VDD = 10V 40 40 300 µA
VDD = 15V 80 80 600 µA

V

OL

LOW Level Output Voltage |IO| < 1 µA

VDD = 5V 0.05 0 0.05 0.05 V
VDD = 10V 0.05 0 0.05 0.05 V
VDD = 15V 0.05 0 0.05 0.05 V

V

OH

HIGH Level Output Voltage |IO| < 1 µA

VDD = 5V 4.95 4.95 5 4.95 V
VDD = 10V 9.95 9.95 10 9.95 V
VDD = 15V 14.95 14.95 15 14.95 V

V

IL

LOW Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 1.5 2.25 1.5 1.5 V

VDD = 10V, VO = 1V or 9V 3.0 4.5 3.0 3.0 V
VDD = 15V, VO = 1.5V or 13.5V 4.0 6.75 4.0 4.0 V

V

IH

HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 2.75 3.5 V

VDD = 10V, VO = 1V or 9V 7.0 7.0 5.5 7.0 V
VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 8.25 11.0 V

I

OL

LOW Level Output Current VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA
(Note 4) VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA

VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA

I

OH

HIGH Level Output Current VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA
(Note 4) VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA

VDD = 15V, VO = 13.5V −3.6 −3.0 −8.8 −2.4 mA

I

IN

Input Current VDD = 15V, VIN = 0V −0.3 −10−5−0.3 −1.0 µA

VDD = 15V, VIN = 15V 0.3 10−50.3 1.0 µA

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CD4047BC

AC Electrical Characteristics (Note 5)

T

A

= 25°C, CL = 50 pF, RL = 200k, input tr = tf = 20 ns, unless otherwise specified.

Note 5: AC Parameters are guaranteed by DC c orrelated testing.

Symbol Parameter Conditions Min Typ Max Units

t

PHL

, t

PLH

Propagation Delay Time Astable, VDD = 5V 200 400 ns
Astable to Osc Out

VDD = 10V 100 200 ns
VDD = 15V 80 160 ns

t

PHL

, t

PLH

Astable, Astable to Q, Q

VDD = 5V 550 900 ns
VDD = 10V 250 500 ns

VDD = 15V 200 400 ns

t

PHL

, t

PLH

+ Trigger, − Trigger to Q

VDD = 5V 700 1200 ns
VDD = 10V 300 600 ns

VDD = 15V 240 480 ns

t

PHL

, t

PLH

+ Trigger, Retrigger to Q

VDD = 5V 300 600 ns
VDD = 10V 175 300 ns

VDD = 15V 150 250 ns

t

PHL

, t

PLH

Reset to Q, Q

VDD = 5V 300 600 ns
VDD = 10V 125 250 ns

VDD = 15V 100 200 ns

t

THL

, t

TLH

Transition Time Q, Q, Osc Out

VDD = 5V 100 200 ns
VDD = 10V 50 100 ns

VDD = 15V 40 80 ns

tWL, t

WH

Minimum Input Pulse Duration Any Input

VDD = 5V 500 1000 ns
VDD = 10V 200 400 ns
VDD = 15V 160 320 ns

t

RCL

, t

FCL

+ Trigger, Retrigger, Rise and VDD = 5V 15 µs
Fall Time VDD = 10V 5 µs

VDD = 15V 5 µs

C

IN

Average Input Capacitance Any Input 5 7.5 pF

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CD4047BC

Typical Performance Characteristics

Typical Q, Q

, Osc Out Period Accuracy vs

Supply Voltage (Astable Mode Operation)

Typical Q, Q, Pulse Width Accuracy vs

Supply Voltage Monostable Mode Operation

Typical Q, Q

and Osc Out Period Accuracy

vs Temperature Astable Mode Operation

Typical Q and Q Pulse Width Accuracy vs
Temperature Monostable Mode Oper ation

fQ, Q RC

A 1000 kHz 22k 10 pF
B 100 kHz 22k 100 pF
C 10 kHz 220k 100 pF
D 1 kHz 220k 1000 pF
E 100 Hz 2.2M 1000 pF

t

M

RC

A 2 µs 22k 10 pF
B 7 µs 22k 100 pF
C 60 µs 220k 100 pF
D 550 µs 220k 1000 pF
E 5.5 ms 2.2M 1000 pF

fQ, Q RC

A 1000 kHz 22k 10 pF
B 100 kHz 22k 100 pF
C 10 kHz 220k 100 pF
D 1 kHz 220k 1000 pF

t

M

RC

A 2 µs 22k 10 pF
B 7 µs 22k 100 pF
C 60 µs 220k 100 pF
D 550 µs 220k 1000 pF

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CD4047BC

Timing Diagrams

Astable Mode Monostable Mode

Retrigger Mode

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CD4047BC

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow

Package Number M14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

CD4047BC Low Power Monostable/Astable Multivibrator

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided i n the labe li ng, can be re a­sonably expected to result in a significant injury to the
user.

2. A critical componen t in any com ponent o f a l ife supp ort
device or system whose failu re to perform can b e rea­sonably expected to c ause th e fa i lure of the li fe s upp or t
device or system, or to affect its safety or effectiveness.

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N14A