Datasheet CD4008BMS Datasheet (Intersil Corporation)

Page 1
November 1994
CD4008BMS
CMOS 4-Bit Full Adder With
Parallel Carry Out
Features
• High-Voltage Type (20V Rating)
• 4 Sum Outputs Plus Parallel Look-ahead Carry-Output
• High-Speed Operation - Sum In-To-Sum Out, 160ns Typ; Carry In-To-Carry Out, 5ns Typ. At VDD = 10V, CL=50pF
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current At 20V
• Maximum Input Current of 1µa at 18V Over Full Pack­age-Temperature Range;
- 100nA at 18V and 25oC
• Noise Margin (Over Full Package T emperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
Applications
• Binary Addition/Arithmetic Units
Description
CD4008BMS types consist of four full adder stages with fast look ahead carry provision from stage to stage. Circuitry is included to provide a fast “parallel-carry-out” but to permit high-speed operation in arithmetic sections using several CD4008BMS’s.
CD4008BMS inputs include the four sets of bits to be added, A1 to A4 and B1 to B4, in addition to the “Carry In” bit from a previous section. CD4008BMS outputs include the four sum bits, S1 to S4. In addition to the high speed “parallel-carry­out” which may be utilized at a succeeding CD4008BMS section.
The CD4008BMS is supplied in these 16-lead outline pack­ages:
Braze Seal DIP H4T Frit Seal DIP H1F Ceramic Flatpack H6W
Pinout
A4 B3 A3 B2 A2 B1 A1
VSS
Logic Diagram
HIGH SPEED
PAR CARRY
15
*
B4
1
*
A4
2
*
B3
3
A3
*
4
*
B2
5
*
A2
6
*
B1
7
*
A1
9
*
C1
(CARRY-IN)
VDD = 16
VSS = 8
A
i
0 1 0 1 0 1 0 1
B
i
0 0 1 1 0 0 1 1
CD4008BMS
16
1 2 3 4 5 6 7 8
(CARRY-OUT)
SUM
C4
SUM
C3
SUM
C2
SUM
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION NETWORK
TRUTH TABLE
C
i
0 0 0 0 1 1 1 1
VDD
15
B4
14
CO
13
S4
12
S3
11
S2
10
S1
9
C1
14
CO
13
S4
12
S3
11
S2
10
S1
C
O
0 0 0 1 0 1 1 1
VDD
VSS
SUM
0 1 1 0 1 0 0 1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-675
File Number
3292
Page 2
Specifications CD4008BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +125oC
o
C to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1)
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25
VDD = 18V, VIN = VDD or GND 3 -55oC-10µA
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
VDD = 18V 3 -55oC - 100 nA Output Voltage VOL15 VDD = 15V, No Load 1, 3 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 3 +25oC, +125oC, -55oC 14.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
(Note 2) Input Voltage High
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
(Note 2) Input Voltage Low
(Note 2) Input Voltage High
(Note 2)
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
Thermal Resistance . . . . . . . . . . . . . . . . θ
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55 For TA = +100
o
C
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
o
C to +100oC (Package Type D, F, K). . . . . .500mW
o
C to +125oC (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/oC to 200mW
ja
o
C/W 20oC/W
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
GROUP A
LIMITS
SUBGROUPS TEMPERATURE
o
C-10µA
2 +125oC - 1000 µA
o
C -100 - nA
2 +125oC -1000 - nA
2 +125oC - 1000 nA
VOL <
VDD/2
VDD/2
1, 2, 3 +25oC, +125oC, -55oC- 4 V
1, 2, 3 +25oC, +125oC, -55oC11 - V
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
θ
jc
UNITSMIN MAX
V
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Page 3
Specifications CD4008BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)
Propagation Delay Sum In to Sum Out
Propagation Delay Carry In To Cum Out
Propagation Delay Sum In To Carry Out
Propagation Delay Carry In To Carry Out
Transition Time TTHL
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
TPHL1 TPLH1
TPHL2 TPLH2
TPHL3 TPLH3
TPHL4 TPLH4
TTLH
VDD = 5V, VIN = VDD or GND 9 +25oC - 800 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 740 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 400 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
SUBGROUPS TEMPERATURE
10, 11 +125oC, -55oC - 1080 ns
10, 11 +125oC, -55oC - 999 ns
10, 11 +125oC, -55oC - 540 ns
10, 11 +125oC, -55oC - 270 ns
10, 11 +125oC, -55oC - 270 ns
+125oC - 150 µA
+125oC - 300 µA
+125oC - 600 µA
-55oC
-55oC
-55oC
-55oC
-55oC 0.64 - mA
-55oC 1.6 - mA
-55oC 4.2 - mA
-55oC - -0.64 mA
-55oC - -2.0 mA
LIMITS
UNITSMIN MAX
LIMITS
UNITSMIN MAX
-50mV
-50mV
4.95 - V
9.95 - V
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Page 4
Specifications CD4008BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
-55oC - -1.6 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
o
C - -4.2 mA
-55
Input Voltage Low VIL VDD = 10V, VOH > 9V , VOL < 1V 1, 2 +25
o
C, +125oC,
-3V
-55oC
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,
+7 - V
-55oC
Propagation Delay Sum In To Sum Out
Propagation Delay Carry In To Sum Out
Propagation Delay Sum In To Carry Out
Propagation Delay Carry In To Carry Out
Transition Time TTHL
TPHL1 TPLH1
TPHL2 TPLH2
TPLH3 TPHL3
TPHL4 TPLH4
TTLH
VDD = 10V 1, 2, 3 +25oC - 320 ns VDD = 15V 1, 2, 3 +25oC - 230 ns
o
VDD = 10V 1, 2, 3 +25 VDD = 15V 1, 2, 3 +25
C - 310 ns
o
C - 230 ns VDD = 10V 1, 2, 3 +25oC - 180 ns VDD = 15V 1, 2, 3 +25oC - 130 ns VDD = 10V 1, 2, 3 +25oC - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns VDD = 10V 1, 2, 3 +25oC - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns
Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
UNITSMIN MAX
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC-25µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V N Threshold Voltage
∆VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V
Delta P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V P Threshold Voltage
∆VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V
Delta Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >
VDD = 3V, VIN = VDD or GND
VDD/2
VOL < VDD/2
V
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Page 5
Specifications CD4008BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
Propagation Delay Time TPHL
TPLH
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
Supply Current - MSI-2 IDD ± 1.0µA Output Current (Sink) IOL5 ± 20% x Pre-Test Reading Output Current (Source) IOH5A ± 20% x Pre-Test Reading
CONFORMANCE GROUP
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas Final Test 100% 5004 2, 3, 8A, 8B, 10, 11 Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x
+25oC
Limit
3. See Table 2 for +25oC limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER SYMBOL DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
UNITSMIN MAX
ns
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
CONFORMANCE GROUPS
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4
FUNCTION OPEN GROUND VDD 9V ± -0.5V
Static Burn-In 1 Note 1
Static Burn-In 2 Note 1
Dynamic Burn­In Note 1
Irradiation Note 2
10 - 14 1 - 9, 15 16
10 - 14 8 1 - 7, 9, 15, 16
- 8 16 10 - 14 2, 4, 6, 15 1, 3, 5, 7, 9
10 - 14 8 1 - 7, 9, 15, 16
METHOD
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
TEST READ AND RECORD
OSCILLATOR
50kHz 25kHz
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Page 6
Specifications CD4008BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION OPEN GROUND VDD 9V ± -0.5V
50kHz 25kHz
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V
Typical Propagation Delay
CO
A13 - 16 B13 - 16
A9 - 12 B9 - 12
CD4008
CD4008
Ci
CO
Ci
CO
S13 - 16
S9 - 12
50 + 50 + 90 + 155
50 + 90 + 155
2(50) + 90 + 155
2(Ci - CO) + (Si - CO) + (Ci - SO) = 345
50 90 155
(Ci - CO) + (Si - CO) + (Ci - SO)
A5 - 8 A5 - 8
A1 - 4 B1 - 4
CD4008
CO
CD4008
VSS
S5 - 8
Ci
S1 - 4
Ci
90 + 155 (Si - CO) + (Ci - SO) =90 + 155
160 (Si - SO)
ALL SUMS SETTLED AFTER 345ns
FIGURE 1. PROPAGATION DELAY FOR A 16 BIT ADDER (10V OPERATION)
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
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Page 7
Typical Performance Characteristics
CD4008BMS
AMBIENT TEMPERATURE (TA) = +25oC
500
SUPPLY VOLTAGE (VDD) = 5V
400
300
(tPHL, tPLH) (ns)
200
100
SUM-IN TO SUM-OUT PROPAGATION DELAY TIME
0 20 40 60 80 100 120 140
LOAD CAPACITANCE (CL) (pF)
10V
15V
FIGURE 2. TYPICAL SUM-IN TO SUM-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
AMBIENT TEMPERATURE (TA) = +25oC
600
500
SUPPLY VOLTAGE (VDD) = 5V
400
AMBIENT TEMPERATURE (TA) = +25oC
150
SUPPLY VOLTAGE (VDD) = 5V
125
100
75
50
DELAY TIME (tPHL, tPLH) (ns)
25
CARRY-IN TO CARRY-OUT PROPAGATION
0 20 40 60 80 100 120 140
LOAD CAPACITANCE (CL) (pF)
10V
15V
FIGURE 3. TYPICAL CARRY-IN TO CARRY-OUT PROPAGA-
TION DELAY TIME vs LOAD CAPACITANCE
AMBIENT TEMPERATURE (TA) = +25oC
300
SUPPLY VOLTAGE (VDD) = 5V
250
200
300
200
DELAY TIME (tPHL, tPLH) (ns)
100
CARRY-IN TO CARRY-OUT PROPAGATION
0 20 40 60 80 100 120 140
LOAD CAPACITANCE (CL) (pF)
10V
15V
FIGURE 4. TYPICAL CARRY-IN TO SUM-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
0-5-10-15
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-10V
-15V
0
-5
-10
-15
-20
-25
-30
150
100
DELAY TIME (tPHL, tPLH) (ns)
50
SUM-IN TO CARRY-OUT PROPAGATION
0 20 40 60 80 100 120 140
LOAD CAPACITANCE (CL) (pF)
10V
15V
FIGURE 5. TYPICAL SUM-IN TO CARRY-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
0-5-10-15
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-10V
-15V
0
-5
-10
-15
FIGURE 6. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
7-681
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
Page 8
CD4008BMS
Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (TA) = +25oC
30
25
20
15
10
5
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
0 5 10 15
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
10V
5V
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 8. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
6
10
AMBIENT TEMPERATURE (TA) = +25oC
5
POWER DISSIPATION/PACKAGE (PD) (µW)
10
4
10
3
10
2
10
10
SUPPLY VOLTAGE (VDD) = 15V
110
FIGURE 10. TYPICAL DISSIPATION CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
15.0
12.5
10.0
7.5
5.0
2.5
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
0 5 10 15
FIGURE 9. MINIMUM OUTPUT LOW (SINK) CURRENT
10V
5V
3.5V
LOAD CAPACITANCE (CL) = 15pF
10
INPUT FREQUENCY (fφ) (kHz)
(CL) = 50pF
2
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
10V
5V
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
CHARACTERISTICS
5V
3
10
4
10
Chip Dimensions and Pad Layouts
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10
-3
inch)
METALLIZATION: Thickness: 11kÅ− 14kÅ, AL. PASSIVATION: 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches
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