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CA3028A/B
Datasheet
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Datasheets CA3028A/B Datasheet

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Page 1
SEMICONDUCTOR
November 1996
CA3028A, CA3028B,
Differential/Cascode Amplifiers for Commercial
and Industrial Equipment from DC to 120MHz
Features
• Controlled for Input Offset Voltage, Input Offset Current and Input Bias Current (CA3028 Series Only)
• Balanced Differential Amplifier Configuration with Controlled Constant Current Source
• Single-Ended and Dual-Ended Operation
Applications
• RF and IF Amplifiers (Differential or Cascode)
• DC, Audio and Sense Amplifiers
• Converter in the Commercial FM Band
• Oscillator
• Mixer
• Limiter
• Related Literature
- Application Note AN5337 “Application of the
CA3028 Integrated Circuit Amplifier in the HF and VHF Ranges.” This note covers characteristics of different operating modes, noise performance, mixer, limiter, and amplifier design considerations
Description
The CA3028A and CA3028B are differential/cascode amplifiers designed for use in communications and industrial equipment operating at frequencies from DC to 120MHz.
The CA3028B is like the CA3028A but is capable of pre­mium performance particularly in critical DC and differential amplifier applications requiring tight controls for input offset voltage, input offset current, and input bias current.
The CA3053 is similar to the CA3028A and CA3028B but is recommended for IF amplifier applications.
Ordering Information
PART NUMBER
(BRAND)
CA3028A -55 to 125 8 Pin Metal Can T8.C CA3028AE -55 to 125 8 Ld PDIP E8.3 CA3028AM
(3028A) CA3028AM96
(3028A) CA3028B -55 to 125 8 Pin Metal Can T8.C CA3028BE -55 to 125 8 Ld PDIP E8.3 CA3028BM
(3028B) CA3053 -55 to 125 8 Pin Metal Can T8.C CA3053E -55 to 125 8 Ld PDIP E8.3
TEMP.
RANGE (oC) PACKAGE
-55 to 125 8 Ld SOIC M8.15
-55 to 125 8 Ld SOIC Tape and Reel
-55 to 125 8 Ld SOIC M8.15
M8.15
PKG.
NO.
Pinouts Schematic Diagram
CA3028A/B, CA3053
(METAL CAN)
TOP VIEW
8
1
2
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1996
– +
3
7
6
5
4
CA3028A/B, (PDIP, SOIC)
CA3053 (PDIP)
TOP VIEW
1 2 3 4
8 7 6 5
(Terminal Numbers Apply to All Packages)
1
R
1
7
5kΩ
2
7-6
8 6
Q
1
R
2
2.8kΩ
SUBSTRATE
AND CASE
3
5
4
Q
Q
2
3
R
3
500Ω
File Number 382.3
Page 2
CA3028A, CA3028B, CA3053
Operating Conditions Thermal Information
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
Metal Can Package. . . . . . . . . . . . . . . 225 140
PDIP Package. . . . . . . . . . . . . . . . . . . 155 N/A
SOIC Package. . . . . . . . . . . . . . . . . . . 185 N/A
Maximum Junction Temperature (Metal Can Package) . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Absolute Maximum Voltage Ratings T
The following chart gives the range of voltages which can be applied to the terminals listed horizontally with respect to the terminals listed vertically. For example, the voltage range of the horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V.
TERM
NO.12345678
0 to -15
1
2 3
(Note 2)
4
5 6 Note 3 Note 3
7 Note 3
8
NOTES:
2. Terminal No. 3 is connected to the substrate and case.
3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe, if the specified voltage limits between all other terminals are not exceeded.
4. Limit is -12V for CA3053.
5. Limit is +15V for CA3053.
6. Limit is +12V for CA3053.
7. Limit is +24V for CA3028A and +18V for CA3053.
(Note 4)
0 to -15
(Note 4)
+5 to -11 +5 to -1 +15 to 0
= 25oC
A
0 to -15
(Note 4)
+10 to 0 +15 to 0
+5 to -5 Note 3 Note 3 +20 to 0
(Note 6)
(Note 6) +15 to 0
(Note 6)
(Note 5) 1
Note 3 +15 to 0
(Note 6)
+30 to 0 (Note 7)
Note 3 Note 3 Note 3
+20 to 0 (Note 5)
+15 to 0 (Note 6)
Note 3 Note 3
Note 3
+30 to 0
(Note 7) 3
Absolute Maximum
Current Ratings
TERM
NO.
2
4
5
6
7
8
I
IN
mA
0.6 0.1
4 0.1
0.1 23
20 0.1
0.6 0.1
20 0.1
4 0.1
20 0.1
I
OUT
mA
Electrical Specifications T
PARAMETER SYMBOL TEST CONDITIONS
DC CHARACTERISTICS
Input Offset Voltage (Figures 1, 14)
Input Offset Current (Figures 2, 14)
Input Bias Current (Figures 2, 3, 15, 16)
= 25oC
A
V
VCC = 6V, VEE = -6V - - - - 0.98 5.0 - - - mV
IO
VCC = 12V, VEE = -12V - - - - 0.89 5.0 - - - mV
I
VCC = 6V, VEE = -6V - - - - 0.56 5.0 - - - µA
IO
VCC = 12V, VEE = -12V - - - - 1.06 6.0 - - - µA
I
VCC = 6V, VEE = -6V - 16.6 70 - 16.6 40 - - - µA
I
VCC = 12V, VEE = -12V - 36 106 - 36 80 - - - µA VCC = 9V - - - - - - 29 85 µA VCC = 12V - - - - - - - 36 125 µA
CA3028A CA3028B CA3053
UNITMIN TYP MAX MIN TYP MAX MIN TYP MAX
7-7
Page 3
CA3028A, CA3028B, CA3053
Electrical Specifications T
= 25oC (Continued)
A
PARAMETER SYMBOL TEST CONDITIONS
Quiescent Operating Current (Figures 2, 3, 17, 18, 19)
I6, I8VCC = 6V, VEE = -6V 0.8 1.25 2.0 1.0 1.25 1.5 - - - mA
VCC = 12V, VEE = -12V 2.0 3.3 5.0 2.5 3.3 4.0 - - - mA VCC = 9V - - - - - - 1.2 2.2 3.5 mA VCC = 12V - - - - - - 2.0 3.3 5.0 mA
AGC Bias Current (Into Constant Current Source Terminal 7) (Figures 4, 20)
I
VCC = 12V, V
7
VCC = 12V, V VCC = 9V - - - - - - - 1.15 - mA VCC = 12V - - - - - - - 1.55 - mA
Input Current (Terminal 7)
Power Dissipation (Figures 2, 3, 21)
I
VCC = 6V, VEE = -6V 0.5 0.85 1.0 0.5 0.85 1.0 - - - mA
7
VCC = 12V, VEE = -12V 1.0 1.65 2.1 1.0 1.65 2.1 - - - mA
P
VCC = 6V, VEE = -6V 24 36 54 24 36 42 - - - mW
T
VCC = 12V, VEE = -12V 120 175 260 120 175 220 - - - mW VCC = 9V - - - - - - - 50 80 mW VCC = 12V - - - - - - - 100 150 mW
DYNAMIC CHARACTERISTICS
Power Gain (Figures 5, 6, 7, 22, 24, 26)
G
f = 100MHz Cascode 16 20 - 16 20 - - - - dB
P
VCC = 9V Diff. Amp. 14 17 - 14 17 - - - - dB f = 10.7MHz Cascode
VCC = 9V Diff. Amp.
Noise Figure (Figures 5, 6, 7, 23, 25, 26)
Input Admittance (Figures 27, 28)
Reverse Transfer Admittance
NF f = 100MHz,
VCC = 9V
Y
11
f = 10.7MHz, VCC = 9V
Y
12
f = 10.7MHz, VCC = 9V
(Figures 29, 30)
Forward Transfer Admittance
Y
21
f = 10.7MHz, VCC = 9V
(Figures 31, 32)
Output Admittance (Figures 33, 34)
Output Power (Untuned) (Figures 8, 35)
AGC Range (Maximum Power Gain to Full Cut-
Y
22
f = 10.7MHz, VCC = 9V
P
f = 10.7MHz,
O
VCC = 9V
AGC f = 10.7MHz,
VCC = 9V
off) (Figures 9, 36) Voltage Gain
(Figures 10, 11, 37, 38)
A f = 10.7MHz,
VCC = 9V, RL = 1kΩ
Differential Voltage Gain at f = 1kHz (Figure 12)
AVCC = 6V, VEE = -6V,
RL = 2kΩ VCC = 12V, VEE = -12V,
RL = 1.6kΩ
CA3028A CA3028B CA3053
UNITMIN TYP MAX MIN TYP MAX MIN TYP MAX
= 9V - 1.28 - - 1.28 - - - - mA
AGC
= 12V - 1.65 - - 1.65 - - - - mA
AGC
35 39 - 35 39 - 35 39 - dB
(Note 8)
28 32 - 28 32 - 28 32 - dB
(Note 8) Cascode - 7.2 9.0 - 7.2 9.0 - - - dB Diff. Amp. - 6.7 9.0 - 6.7 9.0 - - - dB Cascode - 0.6 +
j1.6
Diff. Amp. - 0.5 +
j0.5
Cascode - 0.0003
- j0
Diff. Amp. - 0.01 -
j0.0002
Cascode - 99 -
j18
Diff. Amp. - -37 +
j0.5
Cascode - 0 +
j0.08
Diff. Amp. - 0.04 +
j0.23
Diff. Amp.,
- 5.7 - - 5.7 - - - - µW
- - 0.6 + j1.6
- - 0.5 + j0.5
- - 0.0003
- j0
- - 0.01 -
j0.0002
- - 99 -
j18
- - -37 + j0.5
- - 0 +
j0.08
- - 0.04 +
j0.23
- - 0.6 + j1.6
- - 0.5 + j0.5
- - 0.0003
- j0
- - 0.01 -
j0.0002
- - 99 -
j18
- - -37 + j0.5
- - 0 +
j0.08
- - 0.04 +
j0.23
-mS
-mS
-mS
-mS
-mS
-mS
-mS
-mS
50Ω Input­Output
Diff. Amp. - 62 - - 62 - - - - dB
Cascode - 40 - - 40 - - 40 - dB Diff. Amp. - 30 - - 30 - - 30 - dB
---353842---dB
- - - 40 42.5 45 - - - dB
7-8
Page 4
CA3028A, CA3028B, CA3053
Electrical Specifications T
= 25oC (Continued)
A
PARAMETER SYMBOL TEST CONDITIONS
Max Peak-to-Peak Output Voltage at f = 1kHz (Figure 12)
VO(P-P) VCC = 6V, VEE = -6V,
RL = 2kΩ VCC = 12V, VEE = -12V,
RL = 1.6kΩ
Bandwidth at -3dB Point (Figure 12)
BW VCC = 6V, VEE = -6V,
RL = 2kΩ VCC = 12V, VEE = -12V,
RL = 1.6kΩ
Common Mode Input
V
CMRVCC
= 6V, VEE = -6V - - - -2.5 -3.2 to Voltage Range (Figure 13)
Common Mode Rejec­tion Ratio (Figure 13)
Input Impedance at f = 1kHz
Peak-to-Peak Output Current
CMRR VCC = 6V, VEE = -6V - - - 60 110 - - - - dB
Z
I
VCC = 12V, VEE = -12V - - - -5.0 -7 to-97- - -V
VCC = 12V, VEE = -12V - - - 60 90 - - - - dB VCC = 6V, VEE = -6V - - - - 5.5 - - - - kΩ
IN
VCC = 12V, VEE = -12V - - - - 3.0 - - - - kΩ f = 10.7MHz,
P-P
eIN = 400mV, Diff. Amp.
NOTE:
8. Does not apply to CA3053.
CA3028A CA3028B CA3053
UNITMIN TYP MAX MIN TYP MAX MIN TYP MAX
- - - 7.0 11.5 - - - - V
---1523----V
P-P
P-P
- - - - 7.3 - - - - MHz
- - - - 8.0 - - - - MHz
4- - -V
-4.5
VCC = 9V 2.0 4.0 7.0 2.5 4.0 6.0 2.0 4.0 7.0 mA VCC = 12V 3.5 6.0 10 4.5 6.0 8.0 3.5 6.0 10 mA
Test Circuits
V
CC
3µF
1kΩ 1kΩ
DC DIFF.
270Ω
6
2.7Ω
2.7Ω
8
-
3V
+
270Ω
2.7Ω
R 10Ω
NOTE 9
V
NOTE 10
NOTES:
9. Adjust R1 for V
OUT
10. Record Input Offset Voltage.
FIGURE 1. INPUT OFFSET VOLTA GE TEST CIRCUIT FOR
CA3028B
1
1
2.7Ω
DC
IO
VTVM
= 0V ±0.1V.
ICUT
7
5
V
OUT
V
3
EE
VOLTMETER
FLUKE TYPE
80 OR EQUIV.
3µF
V
CC
+
-
6
ICUT
5
-
+
I
+
8
7
-
+
5
EEI6I8
I
6
1
-
I
1
+
NOTE: .
Power Dissipation I3V
I
8
-
3
+
-
I
7
V
EE
+=
3µF
I
3
3µF
+()V
CC
FIGURE 2. INPUT OFFSET CURRENT , INPUT BIAS CURRENT ,
POWER DISSIPATION, AND QUIESCENT OPERATING CURRENT TEST CIRCUIT FOR CA3028A AND CA3028B
7-9
Page 5
CA3028A, CA3028B, CA3053
Test Circuits
1kΩ
2kΩ
I
1
I
5
(Continued)
7
1
CA3053
5
3
I
3
V
CC
I
7
I
8
8
6
I
6
NOTE: Power Dissipation = VCCI3.
FIGURE 3. INPUT BIAS CURRENT , PO WER DISSIPATION AND
QUIESCENT OPERA TING CURRENT TEST CIRCUIT FOR CA3053
2kΩ
1kΩ
V
CC
5
6
ICUT
8
V
CC
1
3
7
I
7
5kΩ
FIGURE 4. A GC BIAS CURRENT TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER CONFIGURA TION) FOR CA3028A AND CA3028B
C
1
50Ω SIGNAL
SOURCE (NOTE 11) OR NOISE DIODE
(NOTE 12)
(MHz)
470pF
f
7
2
ICUT
L
1
4
3
0.001µF
0.001µF
C
C
1
(pF)
2
(pF)
1kΩ
L
2
5
L
(µH)
6
8
1
2kΩ
1
C
VOLTMETER
(NOTE 11) OR
NOISE AMP
(NOTE 12)
L
2
(µH)
2
50Ω RF
10.7 20 - 60 20 - 60 3 - 5 3 - 5 100 3 - 30 3 - 30 0.1 - 0.25 0.15 - 0.3
NOTES:
11. For Power Gain Test.
12. For Noise Figure Test.
13. 10.7MHz Power Gain Test Only.
FIGURE 5. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(CASCODE CONFIGURATION) FOR CA3028A, CA3028B AND CA3053 (NOTE 3)
V
0.001 µF
CC
C
1
50Ω SIGNAL
SOURCE (NOTE 14) OR NOISE DIODE
(NOTE 15)
(MHz)
8
1
L
1
0.001µF
f
(pF)
ICUT
3
C
C
1
2
(pF)
1kΩ
7
6
5
2kΩ
L
1
(µH)
10.7 30 - 60 20 - 50 3 - 6 3 - 6 100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
NOTES:
14. For Power Gain Test.
15. For Noise Figure Test.
16. 10.7MHz Power Gain Test Only.
FIGURE 6. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION AND TERMINAL 7 CONNECTED TO VCC) FOR CA3028A, CA3028B AND CA3053 (NOTE 3)
L
VOLTMETER (NOTE 14 OR
NOISE AMP
L
2
(µH)
2
C
2
50Ω RF
(NOTE 15)
V
CC
7-10
Page 6
CA3028A, CA3028B, CA3053
Test Circuits
C
1
50Ω SIGNAL
SOURCE (NOTE 17) OR NOISE DIODE
(NOTE 18)
(MHz)
L
f
(Continued)
1
1
3
0.001µF
C
1
(pF)
5kΩ
7
ICUT
C
(pF)
1kΩ
8
6
5
2kΩ
L
2
1
(µH)
L
2
C
VOLTMETER
(NOTE 17) OR
NOISE AMP
(NOTE 18)
L
2
(µH)
2
50Ω RF
10.7 30 - 60 20 - 50 3 - 6 3 - 6 100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
NOTES:
17. For Power Gain Test.
18. For Noise Figure Test.
FIGURE 7. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B
V
CC
V
0.01
µF
INPUT
CC
1kΩ
0.01µF
5
50Ω2kΩ
1 3
7
8
ICUT
6
0.01
µF
50Ω
V
CC
OUTPUT
0.01µF
FIGURE 8. OUTPUT POWER TEST CIRCUIT FOR CA3028A
AND CA3028B
5kΩ
1kΩ
8
6
5
2kΩ
L
1
(µH)
L
(µH)
L
2
2
C
2
VOLTMETER
50Ω
SIGNAL
SOURCE
C
1
(MHz)
7
1
3
0.001µF
C
1
(pF)
ICUT
C
(pF)
2
L
1
f
10.7 30 - 60 20 - 50 3 - 6 3 - 6 100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
FIGURE 9. AGC RANGE TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER) FOR CA3028A AND CA3028B
V
50Ω RF
CC
V
CC
10Ω
1kΩ LOAD
8
INPUT
50Ω
0.01µF
7
1
2
ICUT
3
0.01µF
6
5
0.01µF
4
2kΩ
OUTPUT
1kΩ
0.01µF
FIGURE 10. TRANSFER CHARA CTERISTIC (VOL T A GE GAIN) TEST
CIRCUIT (10.7MHz) CASCODE CONFIGURA TION FOR CA3028A, CA3028B AND CA3053
7-11
Page 7
CA3028A, CA3028B, CA3053
Test Circuits
INPUT
0.01µF
50Ω
10µH
(Continued)
1
3
8
ICUT
7
6
0.001µF
1kΩ LOAD
5
1kΩ
2kΩ
V
CC
OUTPUT
10Ω
0.01µF
FIGURE 11. TRANSFER CHARACTERISTIC (V OLTA GE GAIN)
TEST CIRCUIT (10.7MHz) DIFFERENTIAL AMPLIFIER CONFIGURATION FOR CA3028A, CA3028B AND CA3053
V
CC
OSCILLOSCOPE
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
V
DIFF
(RMS)
3µF
WITH HIGH
WITH TYPE D
PLUG-IN
TEKTRONIX
TYPE 502 OR
EQUIVALENT)
INPUT SIGNAL f = 1kHz
5µF
V
= 10mV
IN
(RMS)
3µF
1
(NOTE)
50Ω
5
R
ICUT
R (NOTE)
6
8
3
7
V
EE
NOTE: For R = 1.6kΩ:VCC = 12V, VEE = -12V
For R = 2.0kΩ:VCC = 6V, VEE = -6V.
FIGURE 12. DIFFERENTIAL VOLTAGE GAIN, MAXIMUM PEAK-
TO-PEAK OUTPUT VOLTAGE AND BANDWIDTH TEST CIRCUIT FOR CA3028B
3µF
5µF
INPUT
SIGNAL
f = 1kHz
MODE REJECTION
500Ω S
1
VIN = 0.3V
(RMS)
VXRANGE
OF COMMON
NOTES:
19. For CMR test: S1 to GND.
20. For Input Common Mode Voltage Range Test: S1 to V A()2()0.3()
21.
Common Mode Rejection Ratio 20log
=
------------------------------------ -
10
V
DIFF
RMS()
A = Single-Ended Voltage Gain.
1kΩ 1kΩ
1
5
7
.
X
V
6
ICUT
V
CC
3
EE
8
OSCILLOSCOPE
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
V
DIFF
(RMS)
3µF
WITH HIGH
WITH TYPE D
PLUG-IN
TEKTRONIX
TYPE 502 OR
EQUIVALENT)
FIGURE 13. COMMON MODE REJECTION RATIO AND COMMON MODE INPUT VOLTAGE RANGE TEST CIRCUIT FOR CA3028B
7-12
Page 8
Typical Performance Curves
CA3028A, CA3028B, CA3053
POSITIVE DC SUPPLY VOLTS (VCC) NEGATIVE DC SUPPLY VOLTS (V
EE
= -6V
OFFSET CURRENT
TEMPERATURE (oC)
2.0
1.5 VCC = +6V
V
1.0
INPUT OFFSET CURRENT (µA)
INPUT OFFSET VOLTAGE (mV),
0.5
0
-75 -50 -25 0 25 50 75 100 125
)
EE
VCC = +12V
= -12V
V
EE
FIGURE 14. INPUT OFFSET VOLTA GE AND INPUT OFFSET
CURRENT FOR CA3028B vs TEMPERATURE
POSITIVE DC SUPPLY VOLTS (VCC)
75.0
62.5
50.0
37.5
25.0
INPUT BIAS CURRENT (µA)
12.5
0
VCC = +9V
-75 -50 -25 0 25 50 75 100 125
VCC = +12V
TEMPERATURE (oC)
FIGURE 16. INPUT BIAS CURRENT vs TEMPERA TURE FOR
CA3053
POSITIVE DC SUPPLY VOLTS (VCC) NEGATIVE DC SUPPLY VOLTS (V
75.0
62.5
50.0
37.5
25.0
INPUT BIAS CURRENT (µA)
VCC = +6V
= -6V
V
EE
12.5
0
-75 -50 -25 0 25 50 75 100 125
VCC = +12V V
EE
TEMPERATURE (oC)
= -12V
EE
)
FIGURE 15. INPUT BIAS CURRENT vs TEMPERA TURE FOR
CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
3.5
2.5
QUIESCENT OPERATING CURRENT (mA)
1.5
-75 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
VEE = -12V
VEE = -9V
FIGURE 17. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
3.5
2.5
1.5
QUIESCENT OPERATING CURRENT (mA)
-75 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
VCC = +12V
VCC = +9V
FIGURE 18. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3053
3.5 VCC = 6V
3.0
(mA)
8
2.5
OR I
6
2.0
1.5
1.0
0.5
OPERATING CURRENT, I
0
0 -5 -10 -15
DC EMITTER SUPPLY (V)
FIGURE 19. OPERA TING CURRENT vs VEE VOLTA GE FOR
CA3028A AND CA3028B
7-13
-20
Page 9
CA3028A, CA3028B, CA3053
Typical Performance Curves
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC
T
A
2
1
AGC BIAS CURRENT (mA)
0
0 4 10 12
AGC BIAS, TERMINAL NO. 7 (V)
(Continued)
862
FIGURE 20. AGC BIAS CURRENT vs BIAS VOLTAGE
(TERMINAL 7) FOR CA3028A AND CA3028B
CASCODE CONFIGURATION
= 25oC
T
A
45 40 35 30 25 20 15
POWER GAIN (dB)
10
5 0
10 100
20 30 40 50 60 70 80 90
FREQUENCY (MHz)
VCC = +12V
VCC = +9V
180
170
160
TOTAL POWER DISSIPATION,±12V (mW)
150
VCC = +12V
= -12V
V
EE
VCC = +6V V
= -6V
EE
-50 -25 0 25 50 75 100 125 TEMPERATURE (
o
C)
40
35
30
25
FIGURE 21. POWER DISSIPATION vs TEMPERATURE FOR
CA3028A AND CA3028B
CASCODE CONFIGURATION T
= 25oC, f = 100MHz
A
9
8
7
6
NOISE FIGURE (dB)
5
912
10 11
DC COLLECTOR SUPPLY VOLTAGE (V)
TOTAL POWER DISSIPATION,±6V (mW)
FIGURE 22. POWER GAIN vs FREQUENCY (CASCODE
CONFIGURATION) FOR CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
DIFFERENTIAL AMPLIFIER CONFIGURATION
40
TA = 25oC
35 30 25 20 15
POWER GAIN (dB)
10
5 0
10 100
20 30 40 50 60 70 80 90
FREQUENCY (MHz)
VCC = +12V
VCC = +9V
FIGURE 24. POWER GAIN vs FREQUENCY (DIFFERENTIAL
AMPLIFIER CONFIGURA TION) FOR CA3028A AND CA3028B
FIGURE 23. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (CASCODE CONFIGURATION) FOR CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, f = 100MHz
T
A
9
8
7
6
NOISE FIGURE (dB)
5
912
10 11
DC COLLECTOR SUPPLY VOLTAGE (V)
FIGURE 25. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B
7-14
Page 10
CA3028A, CA3028B, CA3053
Typical Performance Curves
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, VCC = +9V, f = 100MHz
T
A
20
15
10
NOISE FIGURE
5
NOISE FIGURE (dB) OR POWER GAIN (dB)
0
92
FIGURE 26. 100MHz NOISE FIGURE AND POWER GAIN vs
POSITIVE DC BIAS VOLTAGE (V)
BASE-TO-EMITTER BIAS VOLTAGE (TERMINAL 7)
(Continued)
POWER GAIN
CASCODE CONFIGURATION, TA = 25oC I
7
6
) OR
11
) (mS)
5
11
4
3
2
1
SUSCEPTANCE (b
INPUT CONDUCTANCE (g
345678
0
1 100
= 4.5mA, VCC = +9V
C(STAGE)
FREQUENCY (MHz)
FIGURE 27. INPUT ADMITTANCE (Y11) vs FREQUENCY
(CASCODE CONFIGURATION)
FOR CA3028A AND CA3028B
) DIFFERENTIAL AMPLIFIER CONFIGURATION T
= 25oC, VCC = +9V
A
3
IC OF EACH TRANSISTOR = 2.2mA
) OR
11
) (mS)
11
2
1
SUSCEPTANCE (b
INPUT CONDUCTANCE (g
0
1 10010
FREQUENCY (MHz)
b
11
g
11
12
REVERSE TRANSFER CONDUCTANCE (g
CASCODE CONFIGURATION, TA = 25oC I
C(STAGE)
20
) (µS)
15
12
10
5 0
-5
-10
OR SUSCEPTANCE (b
-15
-20 1 100
= 4.5mA, VCC = +9V
FREQUENCY (MHz)
b
11
g
11
10
g
12
b
12
10
FIGURE 28. INPUT ADMITT ANCE (Y11) vs FREQUENCY
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
)
12
REVERSE TRANSFER CONDUCTANCE (g
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, VCC = +9V
T
A
0.3
OF EACH TRANSISTOR = 2.2mA
I
C
) (mS)
0.2
12
0.1
0
-0.1
OR SUSCEPTANCE (b
-0.2
-0.3 20 30 40 50 60 80 200 300
FREQUENCY (MHz)
g
12
b
12
10010
FIGURE 30. REVERSE TRANSADMITTANCE (Y12) vs
FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION)
FIGURE 29. REVERSE TRANSADMITTANCE (Y12) vs
FREQUENCY (CASCODE CONFIGURATION)
)
21
FORW ARD TRANSFER CONDUCTANCE (g
CASCODE CONFIGURATION, TA = 25oC I
100
) (mS)
80
21
60 40 20
0
-20
-40
OR SUSCEPTANCE (b
-60
-80 1 10010
= 4.5mA, VCC = +9V
C(STAGE)
23456789
FREQUENCY (MHz)
FIGURE 31. FORWARD TRANSADMITTANCE (Y21) vs
FREQUENCY (CASCODE CONFIGURATION)
7-15
g
21
b
21
Page 11
CA3028A, CA3028B, CA3053
Typical Performance Curves
)
21
FORW ARD TRANSFER CONDUCTANCE (g
DIFFERENTIAL AMPLIFIER CONFIGURATION T
= 25oC, VCC = +9V
A
IC OF EACH TRANSISTOR = 2.2mA
30
) (mS)
20
21
10
0
-10
-20
OR SUSCEPTANCE (b
-30
-40 1 10010
FREQUENCY (MHz)
(Continued)
b
21
g
21
FIGURE 32. FORWARD TRANSADMITTANCE (Y21) vs
FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION)
DIFFERENTIAL AMPLIFIER CONFIGURATION, T
= 25oC
A
I
OF EACH TRANSISTOR= 2.2mA, VCC = +9V
C
) (mS)
22
0.6
0.5
0.4
0.3
0.2
0.1
OUTPUT CONDUCTANCE (g
0
1 100
10
FREQUENCY (MHz)
b
22
g
22
2
1.5
1.0
0.5
0
CASCODE CONFIGURATION, TA = 25oC I
) (mS)
22
0
-0.02
-0.04
-0.06
OUTPUT CONDUCTANCE (g
-0.08
1 100
= 4.5mA, VCC = +9V
C(STAGE)
b
g
10
FREQUENCY (MHz)
FIGURE 33. OUTPUT ADMITTANCE (Y22) vs FREQUENCY
(CASCODE CONFIGURATION)
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, CONSTANT POWER INPUT = 2µW
T
A
VCC = +12V
VCC = +9V
FREQUENCY (MHz)
) (mS)
22
OUTPUT SUSCEPTANCE (b
10
OUTPUT POWER (µW)
1
10 100
3
) (mS)
22
22
22
2 1 0
OUTPUT SUSCEPTANCE (b
FIGURE 34. OUTPUT ADMITTANCE (Y22) vs FREQUENCY
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, VCC = +9V
T
A
40
f = 10.7MHz
20
0
-20
POWER GAIN (dB)
-40 9 876543210
DC BIAS VOLTAGE ON TERMINAL NO. 7 (V)
100MHz
FIGURE 36. AGC CHARA CTERISTICS FOR CA3028A AND
CA3028B
FIGURE 35. OUTPUT POWER vs FREQUENCY - 50 Ω INPUT
AND 50Ω OUTPUT (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B
CASCODE CONFIGURATION
= 25oC, f = 10.7MHz
T
A
5
4
VCC = +12V
3
2
OUTPUT VOLTAGE (V)
1
0
0 0.150.05 0.1
VCC = +9V
INPUT VOLTAGE (V)
FIGURE 37. TRANSFER CHARACTERISTICS (CASCODE
CONFIGURATION)
7-16
Page 12
CA3028A, CA3028B, CA3053
Typical Performance Curves
FIGURE 38. TRANSFER CHARACTERISTICS (DIFFERENTIAL AMPLIFIER CONFIGURATION)
(Continued)
3.0 DIFFERENTIAL AMPLIFIER CONFIGURATION
= 25oC, f = 10.7MHz
T
A
2.5
2.0
1.5
OUTPUT VOLTAGE (V)
1.0
0.5
VCC = +12V
INPUT VOLTAGE (V)
Glossary of Terms
AGC Bias Current
The current drawn by the device from the AGC voltage source, at maximum AGC voltage.
AGC Range
The total change in voltage gain (from maximum gain to complete cutoff) which may be achiev ed b y application of the specified range of dc voltage to the AGC input terminal of the device.
Common Mode Rejection Ratio
The ratio of the full differential voltage gain to the common mode voltage gain.
Power Dissipation
The total power drain of the device with no signal applied and no external load current.
Input Bias Current
The average value (one half the sum) of the currents at the two input terminals when the quiescent operating voltages at the two output terminals are equal.
Input Offset Current
The difference in the currents at the two input terminals when the quiescent operating voltages at the two output ter­minals are equal.
VCC = +9V
0.10.050
0.15
Input Offset Voltage
The difference in the DC voltages which must be applied to the input terminals to obtain equal quiescent operating voltages (zero output offset voltage) at the output terminals.
Noise Figure
The ratio of the total noise power of the device and a resistive signal source to the noise power of the signal source alone, the signal source representing a generator of zero impedance in series with the source resistance.
Power Gain
The ratio of the signal power developed at the output of the device to the signal power applied to the input, expressed in dB.
Quiescent Operating Current
The average (DC) value of the current in either output terminal.
Voltage Gain
The ratio of the change in output voltage at either output terminal with respect to ground, to a change in input voltage at either input terminal with respect to ground, with the other input terminal at AC ground.
7-17
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