Glassivated PNPN devices designed for high volume consumer
applications such as temperature, light, and speed control; process and
remote control, and warning systems where reliability of operation is
important.
Features
• Glassivated Surface for Reliability and Uniformity
• Power Rated at Economical Prices
• Practical Level Triggering and Holding Characteristics
• Flat, Rugged, Thermopad Construction for Low Thermal Resistance,
High Heat Dissipation and Durability
• Sensitive Gate Triggering
• Pb−Free Packages are Available*
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SCRs
4 A RMS, 200 − 600 Volts
G
A
K
TO−225AA
CASE 077
STYLE 2
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
(Pulse Width v1.0 msec, TC = 80°C)
Operating Junction Temperature RangeT
Storage Temperature RangeT
Mounting Torque (Note 2)
J
stg
−
− 40 to +110°C
− 40 to +150°C
6.0in. lb.
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. V
and V
DRM
voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current
for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate
RRM
source such that the voltage ratings of the devices are exceeded.
2. Torque rating applies with use of compression washer (B52200F006). Mounting torque in excess of 6 in. lb. does not appreciably lower
case-to-sink thermal resistance. Anode lead and heatsink contact pad are common.
THERMAL CHARACTERISTICS (T
= 25°C unless otherwise noted.)
C
CharacteristicSymbolMaxUnit
The r mal Resistance, Junction−to−Case
The r m a l Resistance, Junction−to−Ambient
R
R
Maximum Lead Temperature for Soldering Purposes 1/8 in. from Case for 10 SecondsT
q
JC
q
JA
L
3.0°C/W
75°C/W
260°C
ORDERING INFORMATION
DevicePackageShipping
C106BTO−225AA500 Units / Box
C106BGTO−225AA
500 Units / Box
(Pb−Free)
C106DTO−225AA500 Units / Box
C106DGTO−225AA
500 Units / Box
(Pb−Free)
C106D1*TO−225AA500 Units / Box
C106D1G*TO−225AA
500 Units / Box
(Pb−Free)
C106MTO−225AA500 Units / Box
C106MGTO−225AA
500 Units / Box
(Pb−Free)
C106M1*TO−225AA500 Units / Box
C106M1G*TO−225AA
500 Units / Box
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*D1 signifies European equivalent for D suffix and M1 signifi es European equivalent for M suffix.
†
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2
Page 3
C106 Series
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted.)
C
CharacteristicSymbolMinTypMaxUnit
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current
(V
AK
= Rated V
DRM
or V
, RGK = 1000 Ohms)TJ = 25°C
RRM
ON CHARACTERISTICS
Peak Forward On−State Voltage (Note 3)
(ITM = 4 A)
Gate Trigger Current (Continuous dc) (Note 4)
(VAK = 6 Vdc, RL = 100 Ohms)TJ = 25°C
Peak Reverse Gate Voltage (IGR = 10 mA)
Gate Trigger Voltage (Continuous dc) (Note 4)
(VAK = 6 Vdc, RL = 100 Ohms)TJ = 25°C
Gate Non −Trigger Voltage (Continuous dc) (Note 4)
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak On State Voltage
Holding Current
Voltage Current Characteristic of SCR
+ Current
on state
I
at V
RRM
Reverse Avalanche Region
Anode −
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RRM
Reverse Blocking Region
(off state)
3
Anode +
V
TM
I
H
I
at V
DRM
DRM
Forward Blocking Region
(off state)
+ Voltage
Page 4
C106 Series
110
100
90
°T , CASE TEMPERATURE ( C)
80
70
60
50
HALF SINE WAVE
40
RESISTIVE OR INDUCTIVE LOAD.
50 to 400 Hz
30
C
20
10
0.4.81.61.22.02.43.2
AVERAGE ON-STATE CURRENT (AMPERES)
I
T(AV)
Figure 1. Average Current DeratingFigure 2. Maximum On−State Power Dissipation
100
mI
DC
2.8
3.6
4.0
10
8
HALF SINE WAVE
RESISTIVE OR INDUCTIVE LOAD
50 TO 400Hz.
6
4
2
0
0
I
AVERAGE ON-STATE CURRENT (AMPERES)
T(AV)
(AV)
P , AVERAGE ON-STATE POWER DISSIPATION (WATTS)
1000
mI , HOLDING CURRENT ( A)
JUNCTION TEMPERATURE ≈ 110 °C
DC
3.6.4.81.61.22.02.43.24.02.6
, GATE TRIGGER CURRENT ( A)
, GATE TRIGGER VOLTAGE (V)
V
GT
1
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. Typical Gate Trigger Current versus
Junction Temperature
1.0
0.9
0.8
0.7
0.6
0.5
0.4
GT
0.3
0.2
TJ, JUNCTION TEMPERATURE (°C)
100
H
10
65
95−40 −25 −1020535508010110
65
TJ, JUNCTION TEMPERATURE (°C)
95−40 −25 −10205355080
110
Figure 4. Typical Holding Current versus
Junction Temperature
1000
mI , LATCHING CURRENT ( A)
100
L
110
10
95−40 −25 −10205355080
65
TJ, JUNCTION TEMPERATURE (°C)
110
65
95−45 −25 −10205355080
Figure 5. Typical Gate Trigger Voltage versus
Junction Temperature
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Figure 6. Typical Latching Current versus
Junction Temperature
4
Page 5
C106 Series
PACKAGE INTERCHANGEABILITY
The dimensional diagrams below compare the critical dimensions of the ON Semiconductor C-106 package with
competitive devices. It has been demonstrated that the smaller dimensions of the ON Semiconductor package make it
compatible in most lead-mount and chassis-mount applications. The user is advised to compare all critical dimensions for
mounting compatibility.
.400
.295
____
.305
.145
____
.155
.148
____
.158
123
.050
____
.095
.020
____
.026
.425
____
.435
.575
____
.655
.040
.094 BSC
.025
____
.035
.115
____
.130
_
5 TYP
.095
____
.105
.015
____
.025
.045
____
.055
____
.360
.127
.135
____
.115
.385
____
.365
.420
____
.400
.105
____
.095
____
DIA
.123
.520
____
.480
.315
____
.285
.105
____
.095
.054
____
.046
.026
____
.019
.190
____
.170
ON Semiconductor C-106 Package
Competitive C-106 Package
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5
Page 6
C106 Series
PACKAGE DIMENSIONS
TO−225
CASE 77−09
ISSUE Z
−B−
−A−
K
F
M
U
Q
132
H
V
G
0.25 (0.010)B
S
D
2 PL
M
0.25 (0.010)B
A
C
J
R
M
M
A
M
M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 077−01 THRU −08 OBSOLETE, NEW STANDARD
077−09.
DIM MINMAXMINMAX
A 0.425 0.435 10.80 11.04
B 0.295 0.3057.507.74
C 0.095 0.1052.422.66
D 0.020 0.0260.510.66
F0.115 0.1302.933.30
G0.094 BSC2.39 BSC
H 0.050 0.0951.272.41
J 0.015 0.0250.390.63
K 0.575 0.655 14.61 16.63
M5 TYP5 TYP
__
Q 0.148 0.1583.764.01
R 0.045 0.0651.151.65
S 0.025 0.0350.640.88
U 0.145 0.1553.693.93
V 0.040−−−1.02−−−
STYLE 2:
PIN 1. CATHODE
2. ANODE
3. GATE
MILLIMETERSINCHES
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
C106/D
6
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