Datasheet BUV48 Datasheet (ON Semiconductor)

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

SEMICONDUCTOR TECHNICAL DATA

Order this document

by BUV48/D



       

The BUV48/BUV48A transistors are designed for high–voltage, high–speed, power switching in inductive circuits where fall time is critical. They are particularly suited for line–operated switchmode applications such as:

• Switching Regulators

• Inverters

• Solenoid and Relay Drivers

• Motor Controls

• Deflection Circuits

Fast Turn–Off Times

60 ns Inductive Fall Time — 25_C (Typ)

120 ns Inductive Crossover Time — 25_C (Typ) Operating Temperature Range –65 to +175_C 100_C Performance Specified for:

Reverse–Biased SOA with Inductive Loads

Switching Times with Inductive Loads

Saturation Voltage

Leakage Currents (125_C)



15 AMPERES

NPN SILICON

POWER TRANSISTORS

400 AND 450 VOLTS

V

(BR)CEO

850–1000 VOLTS

V

(BR)CEX

150 WATTS

CASE 340D–02

TO–218 TYPE

MAXIMUM RATINGS

Rating

Collector–Emitter Voltage Collector–Emitter Voltage (VBE = –1.5 V) Emitter Base Voltage Collector Current — Continuous

ОООООООООООООООООООО

— Peak (1) — Overload

Base Current — Continuous

ОООООООООООООООООООО

— Peak (1)

Total Power Dissipation — TC = 25_C

ОООООООООООООООООООО

— TC = 100_C

Derate above 25_C

Operating and Storage Junction Temperature Range

THERMAL CHARACTERISTICS

ОООООООООООООООООООООООООООООООО

Characteristic

Thermal Resistance, Junction to Case Maximum Lead Temperature for Soldering Purposes:

1/8″ from Case for 5 Seconds

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.

Symbol

V

CEO(sus)

V

CEX

V

EB

I

C

I

ÎÎ

CM I

OI

I

B

ÎÎ

I

BM

P

D

ÎÎ

TJ, T

Symbol

R

θJC

T

L

BUV48

400 850

ОООООО

stg

–65 to +175

7

15 30 60

5

20

150

75

1

Max

1

275

BUV48A

450

1000

Unit

Vdc Vdc Vdc Adc

ÎÎ

Adc

ÎÎ

Watts

ÎÎ

W/_C

_

C

Unit

_

C/W

_

C

SWITCHMODE is a trademark of Motorola, Inc.

REV 8

 Motorola, Inc. 1996

Motorola Bipolar Power Transistor Device Data

1

 

ÎÎÎ

Î

(I

C

200 mA, I

B

mH BUV48

Î

400

Î

ÎÎÎ

Î

(V

CE

Rated V

CEX

R

BE

Ω)T

C

25_C

0.5

Î

I

10 A, I

2 A BUV48

C

,B,

T

V

300 V

(T

25_C)

I

B1

A

IB1 1.6 A

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25_C unless otherwise noted)

C

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS (1)

Collector–Emitter Sustaining Voltage (Table 1)

=

ОООООООООООООООООО

=

= 0) L = 25

BUV48A

Collector Cutoff Current

(V

= Rated Value, V

CEX

ОООООООООООООООООО

(V

= Rated Value, V

CEX

= 1.5 Vdc)

BE(off)

= 1.5 Vdc, TC = 125_C)

BE(off)

Collector Cutoff Current

=

,

= 10

=

_

TC = 125_C

Emitter Cutoff Current

ОООООООООООООООООО

(VEB = 5 Vdc, IC = 0)

Emitter–Base Breakdown Voltage

(IE = 50 mA – IC = 0)

ОООООООООООООООООО

V

CEO(sus)

ÎÎÎÎÎ

I

CEX

ÎÎ

I

CER

450

—

ÎÎ

—

— —

I

EBO

ÎÎ

V

(BR)EBO

ÎÎ

—

ÎÎ

7

—

— —

ÎÎ

—

ÎÎ

—

— —

—

ÎÎ

—

ÎÎ

—

— —

ÎÎ

0.2

ÎÎ

2

3

0.1

ÎÎ

—

ÎÎ

Vdc

ÎÎ

mAdc

ÎÎ

mAdc

ÎÎ

Vdc

ÎÎ

SECOND BREAKDOWN

Second Breakdown Collector Current with Base Forward Biased

ОООООООООООООООООО

Clamped Inductive SOA with Base Reverse Biased

ОООООООООООООООООО

ON CHARACTERISTICS (1)

ОООООООООООООООООООООООООООООООО

DC Current Gain

ОООООООООООООООООО

(IC = 10 Adc, VCE = 5 Vdc) BUV48 (IC = 8 Adc, VCE = 5 Vdc) BUV48A

ОООООООООООООООООО

Collector–Emitter Saturation Voltage

(IC = 10 Adc, IB = 2 Adc)

ОООООООООООООООООО

(IC = 15 Adc, IB = 3 Adc) BUV48 (IC = 10 Adc, IB = 2 Adc, TC = 100_C)

ОООООООООООООООООО

(IC = 8 Adc, IB = 1.6 Adc)

ОООООООООООООООООО

(IC = 12 Adc, IB = 2.4 Adc) BUV48A (IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)

ОООООООООООООООООО

Base–Emitter Saturation Voltage

(IC = 10 Adc, IB = 2 Adc) BUV48

ОООООООООООООООООО

(IC = 10 Adc, IB = 2 Adc, TC = 100_C) (IC = 8 Adc, IB = 1.6 Adc) BUV48A

ОООООООООООООООООО

(IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)

I

S/b

ÎÎ

RBSOA

ÎÎ

h

FE

ÎÎ

V

CE(sat)

ÎÎ

V

BE(sat)

ÎÎ

ОООООООО

ÎÎ

See Figure 12 See Figure 13

8 8

— — — — — —

— — — —

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

1.5

ÎÎ

5 2

ÎÎ

1.5

ÎÎ

5 2

ÎÎ

1.6

ÎÎ

1.6

ÎÎ

1.6

ÎÎ

Vdc

ÎÎ

Vdc

ÎÎ

DYNAMIC CHARACTERISTICS

Output Capacitance

ОООООООООООООООООО

(VCB = 10 Vdc, IE = 0, f

= 1 MHz)

test

C

ob

ÎÎ

—

ÎÎ

—

ÎÎ

350

ÎÎ

pF

ÎÎ

SWITCHING CHARACTERISTICS Resistive Load (Table 1)

ОООООООООООООООООООООООООООООООО

Delay Time Rise Time Storage Time Fall Time

=

C

IC = 8 A, IB, = 1.6 A BUV48A Duty Cycle v 2%, V

= 30 µs,

p

, =

B

= 5 V

BE(off)

=

CC

t

d

t

r

t

s

t

f

— — — —

0.1

0.4

1.3

0.2

0.7 2

0.4

µs

Inductive Load, Clamped (Table 1)

Storage Time

ООООО

Fall Time

ООООО

Storage Time

ООООО

Crossover Time

ООООО

Fall Time

ООООО

ОООООООО

IC = 10 A BUV48 I

= 2 A

= 2

ОООООООО

IC = 8 A BUV48A IB1 = 1.6 A

ОООООООО

t

ÎÎÎÎ_ÎÎ

=

C

ÎÎÎÎ

(TC = 100_C)

ÎÎÎÎ

sv t

fi

ÎÎ

t

sv

ÎÎ

t

c

ÎÎ

t

fi

ÎÎ

ÎÎ—ÎÎ

1.3

0.06

1.5

0.3

0.17

ÎÎ—ÎÎ

2.5

ÎÎ

0.6

ÎÎ

0.35

ÎÎ

µs

ÎÎ

(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle v 2%. Vcl = 300 V, V

= 5 V, Lc = 180 µH

BE(off)

2

Motorola Bipolar Power Transistor Device Data

DC CHARACTERISTICS

 

, DC CURRENT GAIN

FE

h

0.7

0.5

50 30

20

10

7 5

3 2

1

5 3

2

1

VCE = 5 V

1

90%

10%

2 3 5 8 10 20 30 50

IC, COLLECTOR CURRENT (AMPS)

Figure 1. DC Current Gain

βf = 5

90%

10%

, COLLECTOR–EMITTER VOL TAGE (VOLTS)

CE

V

10

0.5

0.3

0.1

0.7

0.5

5 3

1

0.1

7.5 A

IC = 5 A

TC = 25°C

0.3 0.5 IB, BASE CURRENT (AMPS)

10 A 15 A

Figure 2. Collector Saturation Region

βf = 5

2

1

TJ = 25°C

1234

TJ = 100°C

0.3

0.2

, COLLECTOR–EMITTER VOL TAGE (VOLTS)

CE

V

0.1

IC, COLLECTOR CURRENT (AMPS)

Figure 3. Collector–Emitter Saturation V oltage

4

10

VCE = 250 V

3

µ

10

TJ = 150°C

2

10

125°C

100°C

1

10

, COLLECTOR CURRENT ( A)

0

C

10

I

–1

10

–0.4

REVERSE

°

C

75

25°C

–0.2 0 0.2 0.4 0.6

VBE, BASE–EMITTER VOLTAGE (VOLTS)

FORWARD

Figure 5. Collector Cutoff Region

, BASE–EMITTER VOLTAGE (VOLTS)

BE

V

C, CAPACITANCE (pF)

0.3

10 k

1 k

100

10

0.1

1

0.3 3 IC, COLLECTOR CURRENT (AMPS)

Figure 4. Base–Emitter V oltage

C

ib

C

ob

TJ = 25°C

10

VR, REVERSE VOLTAGE (VOLTS)

Figure 6. Capacitance

1011 2 3 7 10 5020 305

100 1000

Motorola Bipolar Power Transistor Device Data

3

 

V

CEO(sus)

T able 1. Test Conditions for Dynamic Performance

RBSOA AND INDUCTIVE SWITCHING RESISTIVE SWITCHING

+10 V

INPUT

0

CONDITIONS

PW Varied to Attain IC = 200 mA

L

= 25 mH, VCC = 10 V

coil

R

= 0.7 Ω

coil

VALUES

CIRCUIT

SEE ABOVE FOR DETAILED CONDITIONS

TEST CIRCUITS

20

1

INPUT

2

1

2

INDUCTIVE TEST CIRCUIT

TUT

1N4937

OR

EQUIVALENT

V

clamp

RS =

Ω

0.1

PULSES

δ

= 3%

220 100

680 pF

L R VCC = 20 V

R

coil

L

coil

V

CC

= 180 µH

coil

100

= 0.05 Ω

I

C

V

CE

I

C(pk)

D1

1N4934D1 D2 D3 D4

D3

= 300 V

t

f

t

2

22 µF

22

0.22

tf Clamped

t

33

2 W

160

MM3735

680 pF

2N3763

160

33

2 W

V

clamp

RB ADJUSTED TO ATTAIN DESIRED I

t

1

VCE

or

V

clamp

TIME

+10 V

2N6438

D3

0.1

D4

2N6339

µ

F

t

MR854

Ib1 ADJUST

µ

F

Ib2 ADJUST

dTb ADJUST

dT

MR854

V

CC

B1

t1 Adjusted to Obtain I

C

L

coil (IC

t1 ≈

V

L

coil (IC

t2 ≈

V

Clamp

Test Equipment

Scope — Tektronix

475 or Equivalent

CC

)

pk

)

pk

TURN–ON TIME

I

B1

IB1 adjusted to

obtain the forced

hFE desired

TURN–OFF TIME

Use inductive switching

driver as the input to

the resistive test circuit.

VCC = 300 V RL = 83 Ω Pulse Width = 10 µs

RESISTIVE TEST CIRCUITOUTPUT WAVEFORMS

TUT

1 2

R

L

V

CC

IC pk

90% V

CE(pk)

I

C

t

sv

t

rv

90% I

t

fi

V

CE(pk)

C(pk)

t

ti

10

βf = 5

8

IC = 10 A

6

t

c

V

CE

I

B

90% I

B1

TIME

10% V

CE(pk)

10%

IC pk

2% I

4

C

, BASE CURRENT (AMPS)I

2

B2(pk)

0

123456

V

, BASE–EMITTER VOLTAGE (VOLTS)

BE(off)

Figure 7. Inductive Switching Measurements Figure 8. Peak–Reverse Current

4

Motorola Bipolar Power Transistor Device Data

SWITCHING TIMES NOTE

 

In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined.

tsv= Voltage Storage Time, 90% IB1 to 10% V

trv= Voltage Rise Time, 10–90% V

tfi= Current Fall Time, 90–10% I tti= Current Tail, 10–2% I

C

tc= Crossover Time, 10% V

clamp

C

to 10% I

clamp

C

An enlarged portion of the inductive switching waveforms is

INDUCTIVE SWITCHING

5 3

2

TC = 100°C

1

µ

0.7

0.5

t, TIME ( s)

0.3

0.2

βf = 5

0.1 1

25

37

IC, COLLECTOR CURRENT (AMPS)

TC = 25°C

2010 30

50

shown in Figure 7 to aid in the visual identity of these terms.

For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN–222:

P

= 1/2 VCCIC(tc) f

SWT In general, trv + tfi ] tc. However, at lower test currents this relationship may not be valid.

As is common with most switching transistors, resistive switching is specified at 25_C and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a “SWITCHMODE” transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100_C.

1

0.5

0.3

0.2

µ

0.1

t, TIME ( s)

0.05

0.03

0.02

0.01 12 5 5037 2010 30

t

c

t

fi

β

= 5

f

IC, COLLECTOR CURRENT (AMPS)

TC = 100°C

TC = 25°C

3 2

1

0.5

0.3

µ

0.2

0.1

t, TIME ( s)

0.05

0.03

0.02

0.01 0

Figure 9. Storage Time, t

t

sv

t

c

t

fi

12 45

3

βf, FORCED GAIN

sv

689710

Figure 11a. Turn–Off Times versus Forced Gain

TC = 25°C IC = 10 A V

= 5 V

BE(off)

Figure 10. Crossover and Fall Times

3 2

1

t

0.5

0.3

µ

0.2

0.1

t, TIME ( s)

0.05

0.03

0.02

0.01 01 2 453689710

Ib2/Ib

sv

t

c

t

fi

1

Figure 11b. Turn–Off Times versus Ib2/Ib

T

= 25°C

C

IC = 10 A

βf = 5 V

1

Motorola Bipolar Power Transistor Device Data

5

 

The Safe Operating Area figures shown in Figures 12 and 13 are specified for these devices under the test conditions shown.

30 10

5 2

1

0.5

0.2

0.1

0.05

, COLLECTOR CURRENT (AMPS)

C

I

0.02

0.01 1

DC

TC = 25°C

LIMIT ONLY FOR TURN ON

2 20 500

550

VCE, COLLECTOR–EMITTER VOL TAGE (VOLTS)

1 ms

tr ≤ 0.7 µs

200

100010 100

Figure 12. Forward Bias Safe Operating Area

50

40

30

20

10

, COLLECTOR CURRENT (AMPS)

C

I

0

V

BE(off) TC = 100°C

IC/IB

VCE, COLLECTOR–EMITTER VOL TAGE (VOLTS)

BUV48 BUV48A

= 5 V

≥

5

200 400

600

800 1000

FIgure 13. Reverse Bias Safe Operating Area

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 12 is based on TC = 25_C; T variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC v 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 12 may be found at any case temperature by using the appropriate curve on Figure 14.

T

may be calculated from the data in Figure 11. At high

J(pk)

case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage current conditions during reverse biased turn–off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 13 gives RBSOA characteristics.

J(pk)

is

100

SECOND BREAKDOWN

DERATING

120

160 200

POWER DERATING F ACT OR (%)

80

60

40

20

THERMAL DERATING

0

40 80

TC, CASE TEMPERATURE (°C)

Figure 14. Power Derating

6

Motorola Bipolar Power Transistor Device Data

0.5

 

1

D = 0.5

0.2

0.1

0.05

RESISTANCE (NORMALIZED)

0.02

r(t), EFFECTIVE TRANSIENT THERMAL

0.01

0.02

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

0.1 0.50.2

0.05 1 2 5 10 20 50 100 200 500

OVERLOAD CHARACTERISTICS

100

TC = 25°C

80

60

40

20

, COLLECTOR CURRENT (AMPS)

C

I

0

tp = 10 µs

VCE, COLLECTOR–EMITTER VOL TAGE (VOLTS)

Figure 16. Rated Overload Safe Operating Area

(OLSOA)

BUV48A

BUV48

300

R

(t) = r(t) R

θ

JC

θ

= 1

JC

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

J(pk)

t, TIME (ms)

°

C/W MAX

– TC = P

θ

(pk)

JC

1

R

Figure 15. Thermal Response

OLSOA applies when maximum collector current is limited and known. A good example is a circuit where an inductor is inserted between the transistor and the bus, which limits the rate of rise of collector current to a known value. If the transistor is then turned off within a specified amount of time, the magnitude of collector current is also known.

Maximum allowable collector–emitter voltage versus collector current is plotted for several pulse widths. (Pulse width is defined as the time lag between the fault condition and the removal of base drive.) Storage time of the transistor has been factored into the curve. Therefore, with bus voltage and maximum collector current known, Figure 16 defines the

500100 400

450200

maximum time which can be allowed for fault detection and shutdown of base drive.

OLSOA is measured in a common–base circuit (Figure 18) which allows precise definition of collector–emitter voltage and collector current. This is the same circuit that is used to measure forward–bias safe operating area.

P

(pk)

t

1

t

(t)

θ

JC

2

DUTY CYCLE, D = t1/t

2

1000 2000

OLSOA

5

4

3

(AMP)

C

I

2

1

0

RBE = 2.2

RBE = 10

Ω

24

Ω

dV/dt (KV/µs)

RBE = 100

RBE = 0

6810

Figure 17. IC = f(dV/dt)

Motorola Bipolar Power Transistor Device Data

Ω

500 µF

Notes:

• VCE = VCC + V

• Adjust pulsed current source

for desired IC, t

BE

p

500 V

V

EE

V

CC

Figure 18. Overload SOA Test Circuit

7

 

P ACKAGE DIMENSIONS

C

B

U

L

S

K

4

123

Q

E

A

D

J

H

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

DIM MIN MAX MIN MAX

A ––– 20.35 ––– 0.801 B 14.70 15.20 0.579 0.598 C 4.70 4.90 0.185 0.193 D 1.10 1.30 0.043 0.051 E 1.17 1.37 0.046 0.054 G 5.40 5.55 0.213 0.219 H 2.00 3.00 0.079 0.118

J 0.50 0.78 0.020 0.031 K 31.00 REF 1.220 REF L ––– 16.20 ––– 0.638 Q 4.00 4.10 0.158 0.161 S 17.80 18.20 0.701 0.717 U 4.00 REF 0.157 REF V 1.75 REF 0.069

INCHESMILLIMETERS

V

G

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

CASE 340D–02

TO–218 TYPE

ISSUE B

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MFAX: RMF AX0@email.sps.mot.com – TOUCHT ONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

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Motorola Bipolar Power Transistor Device Data

BUV48/D

*BUV48/D*