Datasheet BUK9620-55A Specification

1. Description

2. Features

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

Rev. 01 — 29 January 2001 Product specification

N-channel enhancement mode field-effect powertransistorina plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.

Product availability:

BUK9520-55A in SOT78 (TO-220AB)
BUK9620-55A in SOT404 (D

■ TrenchMOS™ technology

■ Q101 compliant

■ 175 °C rated

■ Logic level compatible.

2

-PAK).

3. Applications

c

c

■ Automotive and general purpose power switching:

◆ 12 V and 24 V loads

◆ Motors, lamps and solenoids.

4. Pinning information

Table 1: Pinning - SOT78 and SOT404, simplified outline and symbol

Pin Description Simplified outline Symbol

1 gate (g)
2 drain (d)
3 source (s)
mb mounting base;

connected to drain (d)

MBK106

12mb3

SOT78 (TO-220AB)

mb

2

13

SOT404 (D

MBK116

2

-PAK)

g

MBB076

d

s

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

V
I
P
T
R

DS

D

tot
j
DSon

drain-source voltage (DC) − 55 V
drain current (DC) Tmb=25°C; VGS=5V − 54 A
total power dissipation Tmb=25°C − 118 W
junction temperature − 175 °C
drain-source on-state resistance VGS=5V; ID= 25 A; Tj=25°C1720mΩ

= 4.5 V; ID= 25 A; Tj=25°C − 21 mΩ

V

GS

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

V

GSM

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

DR

I

DRM

Avalanche ruggedness

W

DSS

drain-source voltage (DC) − 55 V
drain-gate voltage (DC) RGS=20kΩ−55 V
gate-source voltage (DC) −±10 V
non-repetitive gate-source voltage tp≤ 50 µs −±15 V
drain current (DC) Tmb=25°C; VGS=5V;

− 54 A

Figure 2 and 3

T

= 100 °C; VGS=5V;Figure 2 − 38 A

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;

− 217 A

Figure 3

total power dissipation Tmb=25°C; Figure 1 − 118 W
storage temperature −55 +175 °C
operating junction temperature −55 +175 °C

reverse drain current (DC) Tmb=25°C − 54 A
pulsed reverse drain current Tmb=25°C; pulsed; tp≤ 10 µs − 217 A

non-repetitive avalanche energy unclamped inductive load; ID=48A;

≤ 55 V; VGS=5V; RGS=50Ω;

V

DS

starting T

mb

=25°C

− 115 mJ

9397 750 07794

Product specification Rev. 01 — 29 January 2001 2 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

120

P

der

(%)

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

P

P

der

tot

----------------------

P

tot 25 C°()

100%×=

03na19

Tmb (oC)

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

120

I

der
(%)

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

03aa24

Tmb (oC)

VGS≥ 4.5 V

I

I

der

D

------------------ -

I

D25C°()

100%×=

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

03nc94

I

D

(A)

R

= VDS/ I

2

10

P

10

1

1 10

DSon

δ =

t

p

T

D

t

p

T

t

D.C.

VDS (V)

tp = 10 us

100 us

1 ms

10 ms

100 ms

10

2

Tmb=25°C; IDM single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 07794

© Philips Electronics N.V. 2001. All rights reserved.

Product specification Rev. 01 — 29 January 2001 3 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Value Unit

R

th(j-a)

R

th(j-mb)

thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W

mounted on printed circuit board;

50 K/W
minimum footprint; SOT404
package

thermal resistance from junction to mounting

Figure 4 1.2 K/W

base

7.1 Transient thermal impedance

10

Z

th(j-mb)

(K/W)

1

10

10

10

-1

-2

-3
10

δ = 0.5

0.2

0.1

0.05

0.02

Single Shot

-6

P

-5

10

-4

10

-3

10

-2

10

10

03nc95

t

p

δ =

T

t

p

-1

t

T

1

tp (s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

9397 750 07794

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Product specification Rev. 01 — 29 January 2001 4 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

8. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise specified

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown
voltage

V

I

DSS

I

GSS

R

GS(th)

DSon

gate-source threshold voltage ID= 1 mA; VDS=VGS;

drain-source leakage current VDS= 55 V; VGS=0V

gate-source leakage current VGS= ±10 V; VDS=0V − 2 100 nA
drain-source on-state

resistance

Dynamic characteristics

C
C
C
t

d(on)

t

r

t

d(off)

t

f

L

L

iss
oss
rss

d

s

input capacitance VGS=0V; VDS=25V;
output capacitance − 290 346 pF
reverse transfer capacitance − 194 266 pF
turn-on delay time VDD= 30 V; RL= 1.2 Ω;
rise time − 124 − ns
turn-off delay time − 92 − ns
fall time − 93 − ns
internal drain inductance from drain lead 6 mm from

internal source inductance from source lead to source

ID= 0.25 mA; VGS=0V

=25°C55−−V

T

j

= −55 °C50−−V

T

j

Figure 9

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 −−V

T

j

= −55 °C −−2.3 V

T

j

=25°C − 0.05 10 µA

T

j

= 175 °C −−500 µA

T

j

VGS=5V; ID=25A;

Figure 7 and 8

=25°C − 17 20 mΩ

T

j

= 175 °C −−40 mΩ

T

j

= 4.5 V; ID=25A −−21 mΩ

V

GS

=10V; ID=25A − 15 18 mΩ

V

GS

− 1660 2210 pF

f = 1 MHz; Figure 12

− 19 − ns

=5V; RG=10Ω

V

GS

− 4.5 − nH

package to centre of die
from contact screw on

− 3.5 − nH
mounting base to centre of
die SOT78

from upper edge of drain

− 2.5 − nH
mounting base to centre of
die SOT404

− 7.5 − nH
bond pad

9397 750 07794

Product specification Rev. 01 — 29 January 2001 5 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

Table 5: Characteristics

…continued

Tj=25°C unless otherwise specified

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

V

SD

source-drain (diode forward)
voltage

t

rr

Q

r

reverse recovery time IS=20A;dIS/dt = −100 A/µs
recovered charge − 81 − nC

200

I

D

(A)

180
160
140
120
100

80
60
40
20

0

0246810

VGS (V) =

8

IS= 25 A; VGS=0V;

Figure 15

= −10 V; VDS=30V

V

GS

9

03nc91

10

VDS (V)

7
6

5

4

3

2.2

− 0.85 1.2 V

− 52 − ns

30

R

DSon

(mΩ)

25

20

15

10

246810

03nc90

VGS (V)

Tj=25°C; tp= 300 µsT

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

03nc92

5

ID (A)

R

DSon

(mΩ)

Tj=25°C

50

VGS (V) =

40

30

20

10

0 50 100 150

3.43.23

3.6

3.8

4

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

=25°C; ID=25A

j

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

2.2
2

a

1.8

1.6

1.4

1.2
1

0.8

0.6

0.4

0.2
0

-60 -20 20 60 100 140 180

R

DSon

a

=

----------------------------

R

DSon 25 C°()

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

03aa28

Tj (oC)

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Product specification Rev. 01 — 29 January 2001 6 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

2.5

V

GS(th)

(V)

2

1.5

1

0.5

0

-60 -20 20 60 100 140 180

ID= 1 mA; VDS=V

max

typ

min

GS

03aa33

Tj (oC)

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

50

g

fs

(S)

40

30

20

10

0

0 20406080

03nc88

ID (A)

-1

10

I

D

-2

(A)

10

-3

10

-4

10

-5

10

-6

10

0

Tj=25°C; VDS=V

min

0.5 1 1.5 2 2.5 3

GS

03aa36

maxtyp

VGS (V)

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

03nc93

VDS (V)

10

Ciss

Coss
Crss

2

C (pF)

4500

4000
3500

3000

2500
2000

1500

1000

500

0

-2

10

-1

10

1 10

Tj=25°C; VDS=25V VGS= 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values.

Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical
values.

9397 750 07794

Product specification Rev. 01 — 29 January 2001 7 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

120

I

D

(A)

100

80

60

40

20

0

0246

Tj = 25 oC

03nc89

Tj = 175 oC

VGS (V)

V
(V)

5

GS

4

3

2

1

0

VDS=25V Tj=25°C; ID=25A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

120

I

S

(A)

100

80

60

Fig 14. Gate-source voltage as a function of turn-on

gate charge; typical values.

Tj = 175 oC

03nc87

V

= 14V

DD

VDD = 44V

0102030

03nc86

QG (nC)

40

20

0

0.0 0.5 1.0 1.5

Tj = 25 oC

VSD (V)

VGS=0V

Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.

9397 750 07794

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Product specification Rev. 01 — 29 January 2001 8 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

9. Package outline

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78

AE

P

A

1

q

D

1

D

(1)

L

2

b

L

1

L

1

mounting

base

Q

123

b

e

e

0 5 10 mm

scale

c

DIMENSIONS (mm are the original dimensions)

b

A

4.5

4.1

A

1.39

1.27

1

UNIT

mm

Note

1. Terminals in this zone are not tinned.

OUTLINE
VERSION

SOT78 SC-463-lead TO-220AB

b

c

1

1.3

1.0

0.7

0.4

0.9

0.7

IEC JEDEC EIAJ

D

D

15.8

6.4

15.2

5.9

REFERENCES

e

E

1

10.3

9.7

2.54

L

15.0

13.5

3.30

2.79

(1)

L

2

L

1

max.

3.0

qQ

P

3.8

3.0

3.6

2.7

EUROPEAN

PROJECTION

2.6

2.2

ISSUE DATE

99-09-13
00-09-07

Fig 16. SOT78 (TO-220AB).

9397 750 07794

Product specification Rev. 01 — 29 January 2001 9 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads
(one lead cropped)

A

E

D

1

D

H

D

mounting

base

2

A

1

SOT404

13

e e

DIMENSIONS (mm are the original dimensions)

0.64

0.46

D

max.

11

UNIT

mm

A

4.50

4.10

OUTLINE
VERSION

SOT404

A

1.40

1.27

b

1

0.85

0.60

IEC JEDEC EIAJ

D

1

1.60

10.30

1.20

9.70

REFERENCES

b

0 2.5 5 mm

scale

E

eLpH

2.90

2.54

2.10

D

15.40

14.80

Qc

2.60

2.20

L

p

c

Q

EUROPEAN

PROJECTION

ISSUE DATE

98-12-14
99-06-25

Fig 17. SOT404 (D2-PAK).

9397 750 07794

Product specification Rev. 01 — 29 January 2001 10 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

10. Soldering

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

handbook, full pagewidth

8.15

7.95

4.85

8.35

2.25

4.60

2.15

1.50

0.30

3.00

1.50

10.85

10.60

10.50

7.50

7.40

1.70

8.275

5.40

8.075

0.20

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig 18. Reflow soldering footprint for SOT404.

5.08

1.20

1.30

1.55

MSD057

9397 750 07794

© Philips Electronics N.V. 2001. All rights reserved.

Product specification Rev. 01 — 29 January 2001 11 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

11. Revision history

Table 6: Revision history

Rev Date CPCN Description

01 20010129 - Product Specification; initial version

TrenchMOS™ logic level FET

9397 750 07794

Product specification Rev. 01 — 29 January 2001 12 of 15

© Philips Electronics N.V. 2001. All rights reserved.

Philips Semiconductors

12. Data sheet status

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

Datasheet status Product status Definition

Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may

change in any manner without notice.

Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips

Semiconductors reserves the right to make changes at any time without notice in order to improve design and
supply the best possible product.

Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any

time without notice in order to improve design and supply the best possible product.

[1] Please consult the most recently issued data sheet before initiating or completing a design.

13. Definitions

Short-form specification — The data in a short-form specification is

extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.

Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.

Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.

[1]

14. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

9397 750 07794

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Product specification Rev. 01 — 29 January 2001 13 of 15

Philips Semiconductors

BUK9520-55A; BUK9620-55A

TrenchMOS™ logic level FET

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Internet: http://www.semiconductors.philips.com

(SCA71)

9397 750 07794

Product specification Rev. 01 — 29 January 2001 14 of 15

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Philips Semiconductors

BUK9520-55A; BUK9620-55A

Contents

1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

7.1 Transient thermal impedance . . . . . . . . . . . . . . 4

8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

12 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 13

13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

14 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

TrenchMOS™ logic level FET

© Philips Electronics N.V. 2001. Printed in The Netherlands

All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.

The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.

Date of release: 29 January 2001 Document order number: 9397 750 07794