Datasheet BUK556-60H Datasheet (Philips)

Page 1
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H Logic level FET

GENERAL DESCRIPTION QUICK REFERENCE DATA

N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT level field-effectpower transistor in a plastic envelope. V The device is intended for use in I automotive and general purpose P switching applications. T
D
R
DS
tot j
DS(ON)

PINNING - TO220AB PIN CONFIGURATION SYMBOL

PIN DESCRIPTION
tab
d
1 gate 2 drain 3 source
tab drain
123
g
s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
DS
V
DGR
±VGSGate-source voltage - - 15 V I
D
I
D
I
DM
P
tot
T
stg
T
j
Drain-source voltage - - 60 V Drain-gate voltage RGS = 20 k -60V
Drain current (DC) Tmb = 25 ˚C - 60 A Drain current (DC) Tmb = 100 ˚C - 44 A Drain current (pulse peak Tmb = 25 ˚C - 240 A value) Total power dissipation Tmb = 25 ˚C - 150 W Storage temperature - - 55 175 ˚C Junction Temperature - - 175 ˚C

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R R
th j-mb th j-a
From junction to mounting base - - 1.0 K/W From junction to ambient - 60 - K/W
October 1993 1 Rev 1.000
Page 2
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H
Logic level FET

STATIC CHARACTERISTICS

Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)

DYNAMIC CHARACTERISTICS

Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
d
L
s
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 60 - - V voltage Gate threshold voltage VDS = VGS; ID = 1 mA 1.0 1.5 2.0 V Zero gate voltage drain current VDS = 60 V; VGS = 0 V; - 1 10 µA Zero gate voltage drain current VDS = 60 V; VGS = 0 V; Tj = 125 ˚C - 0.1 1.0 mA Gate source leakage current VGS = ±15 V; VDS = 0 V - 10 100 nA Drain-source on-state VGS = 5 V; ID = 25 A - 18 22 m resistance
Forward transconductance VDS = 25 V; ID = 25 A 17 30 - S Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2200 2800 pF
Output capacitance - 700 1000 pF Feedback capacitance - 280 400 pF
Turn-on delay time VDD = 30 V; ID = 3 A; - 40 50 ns Turn-on rise time VGS = 5 V; RGS = 50 ; - 150 250 ns Turn-off delay time R Turn-off fall time - 190 250 ns
= 50 - 350 450 ns
gen
internal drain inductance Measured from contact screw on - 5 - nH
tab to centre of die
internal drain inductance Measured from drain lead 6 mm - 5 - nH
from package to centre of die
internal source inductance Measured from source lead 6 mm - 12.5 - nH
from package to source bond pad

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V t
rr
Q
SD
rr
Continuous reverse drain - - - 60 A current Pulsed reverse drain current - - - 240 A Diode forward voltage IF = 50 A; VGS = 0 V - 1.1 2.0 V
Reverse recovery time IF = 50 A; -dIF/dt = 100 A/µs; - 80 - ns Reverse recovery charge VGS = -10 V; VR = 30 V - 0.4 - µC

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
October 1993 2 Rev 1.000
Drain-source non-repetitive ID = 50 A; VDD 25 V; - - 150 mJ unclamped inductive turn-off VGS = 5 V; RGS = 50 ; Tmb = 25 ˚C energy
Page 3
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H Logic level FET
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID / IDmax % Normalised Current Derating
120
100
80
60
40
20
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
D 25 ˚C
= f(Tmb)
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
10
1
0.1
0.01
0.001
Zth j-mb / (K/W)
D =
0.5
0.2
0.1
0.05
0.02
0
1E-05 1E-03 1E-01 1E+01
t / s
P
D
BUKx56-lv
p
p
t
t
D =
T
t
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID / A BUK5y6-60A
150
10
8
100
50
0
0 2 4 6 8 10 12
7
VGS / V =
6
5
4.5 4
3.5 3
2.5
VDS / V
Fig.5. Typical output characteristics, Tj = 25 ˚C
ID = f(VDS); parameter V
GS
.
ID / A
1000
100
RDS(ON) = VDS/ ID
10
1
1 100
DC
10
VDS / V
BUK556-60H
tp = 10 us
100 us
1 ms
10 ms 100 ms
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
RDS(ON) / Ohm
0.1
0.08
0.06
0.04
0.02
0
3 3.5 4
0 20 40 60 80 100 120 140
ID / A
Fig.6. Typical on-state resistance, Tj = 25 ˚C
R
p
= f(ID); parameter V
DS(ON)
BUK5y6-60A
4.5 5
6
7
VGS / V = 10
.
GS
October 1993 3 Rev 1.000
Page 4
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H Logic level FET
ID / A BUK5y6-60A
150
Tj / C = 25
100
50
0
0 2 4 6 8 10
VGS / V
150
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter T
gfs / S BUK5y6-60A
40 35 30 25 20 15 10
5 0
0 20 40 60 80 100
Fig.8. Typical transconductance, Tj = 25 ˚C
ID / A
.
gfs = f(ID); conditions: VDS = 15 V
VGS(TO) / V
2
1
0
-60 -20 20 60 100 140 180
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage.
V
j
= f(Tj); conditions: ID = 1 mA; VDS = V
GS(TO)
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
0 0.4 0.8 1.2 1.6 2 2.4
SUB-THRESHOLD CONDUCTION
2 %
typ
VGS / V
GS
98 %
Fig.11. Sub-threshold drain current.
ID = f(V
; conditions: Tj = 25 ˚C; VDS = V
GS)
GS
a
2.0
1.5
1.0
0.5
0
-60 -20 20 60 100 140 180
Normalised RDS(ON) = f(Tj)
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 25 A; VGS = 5 V
C / pF
10000
1000
100
10
0 20 40
VDS / V
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
BUK5y6-60A
, C
iss
oss
Ciss
Coss Crss
, C
rss
.
October 1993 4 Rev 1.000
Page 5
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H Logic level FET
VGS / V BUK5y6-60A
10
9 8 7 6 5 4 3 2 1 0
0 20 40 60 80
VDS / V =12
QG / nC
48
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); conditions: ID = 50 A; parameter V
GS
IF / A BUK5y6-60A
200
150
100
50
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Tj / C = 25
VSDS / V
150
DS
Fig.14. Typical reverse diode current.
IF = f(V
); conditions: V
SDS
= 0 V; parameter T
GS
j
WDSS%
120 110 100
90 80 70 60 50 40 30 20 10
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.15. Normalised avalanche energy rating.
W
% = f(Tmb); conditions: ID = 50 A
DSS
+
L
VDS
VGS
DSS
T.U.T.
/(BV
0
RGS
Fig.16. Avalanche energy test circuit.
W
= 0.5 LI
DSS
2
D
BV
DSS−VDD
-
R 01
shunt
)
VDD
-ID/100
October 1993 5 Rev 1.000
Page 6
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H
Logic level FET

MECHANICAL DATA

Dimensions in mm Net Mass: 2 g
10,3 max
1,3
3,7
4,5 max
3,0 max
not tinned
1,3
max
(2x)
123
2,54 2,54
2,8
3,0
13,5
min
0,9 max (3x)
5,9
min
15,8
max
0,6
2,4
Fig.17. TO220AB; pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to mounting instructions for TO220 envelopes.
3. Epoxy meets UL94 V0 at 1/8".
October 1993 6 Rev 1.000
Page 7
Philips Semiconductors Product Specification
PowerMOS transistor BUK556-60H
Logic level FET

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
October 1993 7 Rev 1.000
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