Datasheet BUK545-200B, BUK545-200A Datasheet (Philips)

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

GENERAL DESCRIPTION QUICK REFERENCE DATA

N-channel enhancement mode SYMBOL PARAMETER MAX. MAX. UNIT
logic level field-effect power
transistor in a plastic full-pack BUK545 -200A -200B
envelope. V
The device is intended for use in I
Switched Mode Power Supplies P
(SMPS), motor control, welding, T
DC/DC and AC/DC converters, and R
in automotive and general purpose resistance; V

DS

D

tot
j

DS(ON)

switching applications.

PINNING - SOT186 PIN CONFIGURATION SYMBOL

Drain-source voltage 200 200 V
Drain current (DC) 7.6 7 A
Total power dissipation 30 30 W
Junction temperature 150 150 ˚C
Drain-source on-state 0.23 0.28 Ω

5 V

GS =

PIN DESCRIPTION

case

d

1 gate
2 drain
3 source

case isolated

123

g

s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V

±V
±V

I

D

I

D

I

DM

P
T
T

DS
DGR

GS
GSM

tot
stg
j

Drain-source voltage - - 200 V
Drain-gate voltage RGS = 20 kΩ - 200 V
Gate-source voltage - - 15 V
Non-repetitive gate-source voltage tp ≤ 50 µs - 20 V

-200A -200B

Drain current (DC) Ths = 25 ˚C - 7.6 7 A
Drain current (DC) Ths = 100 ˚C - 4.8 4.4 A
Drain current (pulse peak value) Ths = 25 ˚C - 30 28 A

Total power dissipation Ths = 25 ˚C - 30 W
Storage temperature - - 55 150 ˚C
Junction Temperature - - 150 ˚C

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

R

th j-hs

R

th j-a

April 1993 1 Rev 1.100

Thermal resistance junction to with heatsink compound - - 4.17 K/W
heatsink
Thermal resistance junction to - 55 - K/W
ambient

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

STATIC CHARACTERISTICS

Ths = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

I

DSS

I

DSS

I

GSS

R

DS(ON)

DYNAMIC CHARACTERISTICS

Ths = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

g

fs

C

iss

C

oss

C

rss

t

d on

t

r

t

d off

t

f

L

d

L

s

Drain-source breakdown VGS = 0 V; ID = 0.25 mA 200 - - V
voltage
Gate threshold voltage VDS = VGS; ID = 1 mA 1.0 1.5 2.0 V
Zero gate voltage drain current VDS = 200 V; VGS = 0 V; Tj = 25 ˚C - 1 10 µA
Zero gate voltage drain current VDS = 200 V; VGS = 0 V; Tj =125 ˚C - 0.1 1.0 mA
Gate source leakage current VGS = ±10 V; VDS = 0 V - 10 100 nA
Drain-source on-state VGS = 5 V; BUK545-200A - 0.2 0.23 Ω
resistance ID = 7 A BUK545-200B - 0.24 0.28 Ω

Forward transconductance VDS = 25 V; ID = 7 A 8.0 15 - S
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1600 2000 pF

Output capacitance - 180 250 pF
Feedback capacitance - 55 80 pF

Turn-on delay time VDD = 30 V; ID = 3 A; - 25 40 ns
Turn-on rise time VGS = 5 V; RGS = 50 Ω; - 45 75 ns
Turn-off delay time R
Turn-off fall time - 40 55 ns

= 50 Ω - 140 180 ns

gen

Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH

from package to centre of die

Internal source inductance Measured from source lead 6 mm - 7.5 - nH

from package to source bond pad

ISOLATION LIMITING VALUE & CHARACTERISTIC

Ths = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

isol

Repetitive peak voltage from all R.H. ≤ 65% ; clean and dustfree - 1500 V
three terminals to external
heatsink

C

isol

Capacitance from T2 to external f = 1 MHz - 12 - pF
heatsink

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Ths = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I
I

V
t

Q

DR

DRM

SD

rr

rr

Continuous reverse drain - - - 7.6 A
current
Pulsed reverse drain current - - - 30 A
Diode forward voltage IF = 7.6 A ; VGS = 0 V - 1.0 1.5 V

Reverse recovery time IF = 7.6 A; -dIF/dt = 100 A/µs; - 150 - ns
Reverse recovery charge VGS = 0 V; VR = 30 V - 1.3 - µC

April 1993 2 Rev 1.100

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

AVALANCHE LIMITING VALUE

Ths = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

W

DSS

Drain-source non-repetitive ID = 14 A ; VDD ≤ 100 V ; - - 100 mJ
unclamped inductive turn-off VGS = 5 V ; RGS = 50 Ω
energy

PD%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Normalised Power Derating

with heatsink compound

Ths / C

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

ID%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Ths / C

= f(Ths)

D 25 ˚C

Normalised Current Derating

with heatsink compound

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

= f(Ths); conditions: VGS ≥ 5 V

D 25 ˚C

ID / A

100

A

B

10

1

0.1

RDS(ON) = VDS/ID

DC

1 10 100 1000

VDS / V

BUK545-200A,B

tp = 10 us

100 us

1 ms
10 ms

100 ms

Fig.3. Safe operating area. Ths = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

Zth / (K/W)

10

D =

0.5

1

0.2

0.1

0.05

0.1

0.02

t / s

P

D

0.01

0.001

0

1E-07 1E-05 1E-03 1E-01 1E+01

BUKx45-lv

p

p

t

t

D =

T

t

T

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-hs

p

April 1993 3 Rev 1.100

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

ID / A

30

5

20

10

0

0 2 4 6 8 10 12 14 16 18 20

10

VDS / V

BUK555-200A

VGS / V =

4

3

Fig.5. Typical output characteristics, Tj = 25 ˚C

ID = f(VDS); parameter V

RDS(ON) / Ohm

1.0

0.8

0.6

0.4

0.2

0

0 4 8 12 16 20 24 28

2.5 3

ID / A

GS

BUK555-200A

3.5

VGS / V =

4

5

10

Fig.6. Typical on-state resistance, Tj = 25 ˚C

R

= f(ID); parameter V

DS(ON)

GS

gfs / S

20

15

10

5

0

0 4 8 12 16 20 24 28

.

Fig.8. Typical transconductance, Tj = 25 ˚C

ID / A

BUK555-200A

.

gfs = f(ID); conditions: VDS = 25 V

a

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2
0

-60 -40 -20 0 20 40 60 80 100 120 140

.

Fig.9. Normalised drain-source on-state resistance.

a = R

DS(ON)/RDS(ON)25 ˚C

Normalised RDS(ON) = f(Tj)

Tj / C

= f(Tj); ID = 7 A; VGS = 5 V

ID / A

30

20

10

Tj / C = 25

0

0 2 4 6 8

150

VGS / V

BUK555-200A

Fig.7. Typical transfer characteristics.

ID = f(VGS) ; conditions: VDS = 25 V; parameter T

j

VGS(TO) / V

2

1

0

-60 -40 -20 0 20 40 60 80 100 120 140

max.

typ.

min.

Tj / C

Fig.10. Gate threshold voltage.

V

= f(Tj); conditions: ID = 1 mA; VDS = V

GS(TO)

GS

April 1993 4 Rev 1.100

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

ID / A

1E-01

1E-02

1E-03

1E-04

1E-05

1E-06

0 0.4 0.8 1.2 1.6 2 2.4

SUB-THRESHOLD CONDUCTION

2 %

typ

VGS / V

98 %

Fig.11. Sub-threshold drain current.

ID = f(V

10000

1000

100

10

Fig.12. Typical capacitances, C

C = f(VDS); conditions: VGS = 0 V; f = 1 MHz

; conditions: Tj = 25 ˚C; VDS = V

GS)

C / pF

0 20 40

VDS / V

BUK5y5-200

, C

iss

oss

Ciss

Coss

Crss

, C

GS

rss

IF / A

30

20

Tj / C = 150 25

10

0

0 1 2

VSDS / V

BUK555-200A

Fig.14. Typical reverse diode current.

IF = f(V

120
110
100

90
80
70
60
50
40
30
20
10

.

Fig.15. Normalised avalanche energy rating.

); conditions: V

SDS

WDSS%

0

20 40 60 80 100 120 140

W

% = f(Ths); conditions: ID = 14 A

DSS

= 0 V; parameter T

GS

Ths / C

j

VGS / V

12

10

8

6

4

2

0

0 20 40

QG / nC

Fig.13. Typical turn-on gate-charge characteristics.

V

= f(QG); conditions: ID = 14 A; parameter V

GS

BUK555-200

VDS / V =40

160

DS

L

VDS

VGS

DSS

T.U.T.

/(BV

0

RGS

Fig.16. Avalanche energy test circuit.

W

= 0.5 ⋅LI

DSS

2

D

⋅ BV

R 01

shunt

DSS−VDD

VDD

+

-

-ID/100

)

April 1993 5 Rev 1.100

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

MECHANICAL DATA

Dimensions in mm
Net Mass: 2 g

3.5 max

not tinned

10.2
max

5.7

max

3.2

3.0

4.4

0.9

0.5

4.4

4.0

seating

plane

13.5
min

4.4

max

2.9 max

7.9

7.5
17

max

123

M

0.4

5.08

Fig.17. SOT186; The seating plane is electrically isolated from all terminals.

Notes

1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.

2. Refer to mounting instructions for F-pack envelopes.

3. Epoxy meets UL94 V0 at 1/8".

0.9

0.7

2.54

top view

0.55 max

1.3

April 1993 6 Rev 1.100

Philips Semiconductors Product Specification

PowerMOS transistor BUK545-200A/B
Logic level FET

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

 Philips Electronics N.V. 1996

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.

The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

April 1993 7 Rev 1.100