Datasheet BUK482-100A Datasheet (Philips)

Page 1
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope suitable for surface V mount applications. I The device is intended for use in P automotive and general purpose T switching applications. R
DS
D
tot j
DS(ON)
PINNING - SOT223 PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V Drain current (DC) 1.8 A Total power dissipation 1.8 W Junction temperature 150 ˚C Drain-source on-state 0.28 resistance; VGS = 10 V
PIN DESCRIPTION
4
d
1 gate 2 drain 3 source 4 drain (tab)
1
23
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V V ±V I
D
I
D
I
DM
P T T
DS DGR
GS
tot stg j
Drain-source voltage - - 100 V Drain-gate voltage RGS = 20 k - 100 V Gate-source voltage - - 30 V Drain current (DC) T Drain current (DC) T Drain current (pulse peak value) T Total power dissipation T
= 25 ˚C - 1.8 A
amb
= 100 ˚C - 1.1 A
amb
= 25 ˚C - 7.2 A
amb
= 25 ˚C - 1.8 W
amb
Storage temperature - - 55 150 ˚C Junction Temperature - - 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R R
th j-b th j-amb
From junction to board From junction to ambient Mounted on PCB of Fig.17 - - 70 K/W
1
Mounted on any PCB - 40 - K/W
1 Temperature measured 1-3 mm from tab.
January 1998 1 Rev 1.100
Page 2
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 100 - - V voltage Gate threshold voltage VDS = VGS; ID = 1 mA 2.1 3.0 4.0 V Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 1 10 µA Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 125 ˚C - 0.1 1.0 mA Gate source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA Drain-source on-state VGS = 10 V; ID = 1.8 A - 0.21 0.28 resistance
Forward transconductance VDS = 25 V; ID = 1.8 A 1.5 2.5 - S Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 300 500 pF
Output capacitance - 90 120 pF Feedback capacitance - 35 50 pF
Turn-on delay time VDD = 30 V; ID = 3 A; - 9 14 ns Turn-on rise time VGS = 10 V; RGS = 50 ; - 25 40 ns Turn-off delay time R Turn-off fall time - 20 40 ns
= 50 - 3045ns
gen
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V t
rr
Q
SD
rr
Continuous reverse drain - - - 1.8 A current Pulsed reverse drain current - - - 7.2 A Diode forward voltage IF = 1.8 A; VGS = 0 V - 0.85 1.1 V
Reverse recovery time IF = 1.8 A; -dIF/dt = 100 A/µs; - 80 - ns Reverse recovery charge VGS = -10 V; VR = 30 V - 0.30 - µC
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
Drain-source non-repetitive ID = 1.8 A; VDD 25 V; - - 40 mJ unclamped inductive turn-off VGS = 10 V; RGS = 50 ; energy T
= 25 ˚C
amb
January 1998 2 Rev 1.100
Page 3
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
Tamb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Tamb / C
= f(T
D 25 ˚C
Normalised Current Derating
amb
)
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
D 25 ˚C
= f(T
); conditions: VGS ≥ 10 V
amb
ID / A
10
1
0.1
0.01
RDS(ON) = VDS/ID
DC
0.1 1 10 100 VDS / V
Fig.4. Safe operating area. T
ID & IDM = f(VDS); IDM single pulse; parameter t
ID / A BUK482-100A
7
20
10
6
6.5
5
4
3
2
1
0
0 2 4 6 8 10
6
VDS / V
BUK482-100A
tp = 10 us 100 us
1 ms
10 ms
100 ms
1 s 10 s
= 25 ˚C.
amb
VGS/V = 5.5
4.5
5
4
Fig.5. Typical output characteristics, Tj = 25 ˚C
ID = f(VDS); parameter V
GS
p
.
P
D
BUKX82-100
t
p
D =
T
RDS(ON)/ Ohm
1
4 4.5 5 5.5
0.9
0.8
0.7
0.6
t
p
T
t
0.5
0.4
0.3
0.2
0.1 0
0 2 4 6
ID / A
Fig.6. Typical on-state resistance, Tj = 25 ˚C
R
= f(ID); parameter V
DS(ON)
BUK482-100A
6VGS/V =
10 20
.
GS
Zth j-amb / (K/W)
1E+02
D =
0.5
1E+01
1E+00
0.2
0.1
0.05
0.02
1E-01
0
1E-02
1E-07 1E-05 1E-03 1E-01 1E+01 1E+03
t / s
Fig.3. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-amb
January 1998 3 Rev 1.100
Page 4
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
ID/ A
7
6
5
4
3
2
1
0
0 2 4 6 8
Tj/ C = 150
VGS/ V
BUK482-100A
25
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter T
gfs/ S
5
4
3
2
BUK482-100A
VGS(TO) / V
4
3
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage.
V
j
= f(Tj); conditions: ID = 1 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
GS
98 %
1
0
0 2 4 6
Fig.8. Typical transconductance, Tj = 25 ˚C
ID/ A
.
gfs = f(ID); conditions: VDS = 25 V
a
2.0
1.5
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Normalised RDS(ON) = f(Tj)
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 1.8 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
10000
1000
100
10
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
C / pF
0 20 40
VDS / V
, C
iss
oss
Ciss
Coss
Crss
, C
GS
rss
.
January 1998 4 Rev 1.100
Page 5
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
VGS/ V
12
10
8
6
4
2
0
0 2 4 6 8 10
QG/ nC
VDS/ V = 20
80
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); conditions: ID = 1.8 A; parameter V
GS
IF/ A
7
6
5
4
Tj/ C = 150
3
2
1
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
25
VSDS/ V
BUK482-100A
DS
Fig.14. Typical reverse diode current.
IF = f(V
); conditions: V
SDS
= 0 V; parameter T
GS
j
WDSS% Normalised Avalanche Energy
120 110 100
90 80 70 60 50 40 30 20 10
0
20 40 60 80 100 120 140
Tamb/ C
Fig.15. Normalised avalanche energy rating.
W
% = f(T
DSS
); conditions: ID = 1.8 A
amb
+
L
VDS
VGS
DSS
T.U.T.
/(BV
0
RGS
Fig.16. Avalanche energy test circuit.
W
= 0.5 LI
DSS
2
D
BV
DSS−VDD
-
R 01
shunt
)
VDD
-ID/100
January 1998 5 Rev 1.100
Page 6
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
PRINTED CIRCUIT BOARD
Dimensions in mm.
36
18
60
4.6
9
10
7
50
15
4.5
Fig.17. PCB for thermal resistance and power rating for SOT223.
PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick).
January 1998 6 Rev 1.100
Page 7
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
MECHANICAL DATA
Dimensions in mm Net Mass: 0.11 g
16
max
1.8
max
0.32
0.24
0.10
0.02
10 max
13
1.05
0.85
6.7
6.3
3.1
2.9
4
1
2.3
23
0.80
0.60
4.6
B
A
7.3
6.7
M
B
0.1
3.7
3.3
(4x)
Fig.18. SOT223 surface mounting package.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to surface mounting instructions for SOT223 envelope.
3. Epoxy meets UL94 V0 at 1/8".
AM0.2
January 1998 7 Rev 1.100
Page 8
Philips Semiconductors Product Specification
PowerMOS transistor BUK482-100A
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
January 1998 8 Rev 1.100
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