The BTS 7970B is a fully integrated high current half
bridge for motor drive applications. It is part of the
NovalithICTM family containing one p-channel highside
MOSFET and one n-channel lowside MOSFET with an
integrated driver IC in one package. Due to the p-channel
highside switch the need for a charge pump is eliminated
thus minimizing EMI. Interfacing to a microcontroller is
made easy by the integrated driver IC which features
logic level inputs, diagnosis with current sense, slew rate
adjustment, dead time generation and protection against overtemperature, overvoltage,
undervoltage, overcurrent and short circuit.
The BTS 7970B provides a cost optimized solution for protected high current PWM
motor drives with very low board space consumption.
BTS 7970B
P-TO-263-7
Basic Features
• Path resistance of typ. 16 mΩ @25°C
• Low quiescent current of typ. 7 µA @ 25 °C
• PWM capability of up to 25 kHz combined with active freewheeling
• Switched mode current limitation for reduced power dissipation in overcurrent
• Current limitation level of 68 A typ. / 50 A min.
• Status flag diagnosis with current sense capability
• Overtemperature shut down with latch behaviour
• Overvoltage lock out
• Undervoltage shut down
• Driver circuit with logic level inputs
• Adjustable slew rates for optimized EMI
TypePackage
BTS 7970BP-TO-263-7
Data Sheet2Rev. 2.0, 2006-05-09
Page 4
High Current PN Half Bridge
BTS 7970B
Overview
1Overview
The BTS 7970B is part of the NovalithIC family containing three separate chips in one
package: One p-channel highside MOSFET and one n-channel lowside MOSFET
together with a driver IC, forming a fully integrated high current half-bridge. All three
chips are mounted on one common leadframe, using the chip on chip and chip by chip
technology. The power switches utilize vertical MOS technologies to ensure optimum on
state resistance. Due to the p-channel highside switch the need for a charge pump is
eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the
integrated driver IC which features logic level inputs, diagnosis with current sense, slew
rate adjustment, dead time generation and protection against overtemperature,
overvoltage, undervoltage, overcurrent and short circuit. The BTS 7970B can be
combined with other BTS 7970B to form H-bridge and 3-phase drive configurations.
1.1Block Diagram
BTS 7970B
HS base-chip
VS
Top-chip
IN
INH
SR
IS
Gate Driver
Dead Time Gen.
Slew Rate Adj.
UV Shut Down
OV Lock Out
OT Shut Dow n
Current Lim.
Diagnosis
Current Sense
LS bas e-c hip
OUT
GND
Figure 1Block Diagram
Data Sheet3Rev. 2.0, 2006-05-09
Page 5
High Current PN Half Bridge
BTS 7970B
1.2Terms
Following figure shows the terms used in this data sheet.
V
VS ,VS
I
IN
V
IN
I
INH
V
INH
I
SR
V
SR
I
IS
V
IS
Figure 2Terms
IN
INH
BTS 7970B
SR
IS
VS
GND
I
IVS, -I
D(HS)
GND,ID(LS)
OUT
I
OUT
V
SD (L S)
V
DS(HS)
, I
L
Overview
V
OUT
Data Sheet4Rev. 2.0, 2006-05-09
Page 6
High Current PN Half Bridge
BTS 7970B
2Pin Configuration
2.1Pin Assignment
BTS 7970B
P-TO-263-7
8
123567
4
Figure 3Pin Assignment BTS 7970B and (top view)
Pin Configuration
2.2Pin Definitions and Functions
PinSymbolI/OFunction
1GND-Ground
2INIInput
Defines whether high- or lowside switch is activated
3INHIInhibit
When set to low device goes in sleep mode
4,8OUTOPower output of the bridge
5SRISlew Rate
The slew rate of the power switches can be adjusted
by connecting a resistor between SR and GND
6ISOCurrent Sense and Diagnosis
7VS-Supply
Bold type: Pin needs power wiring
Data Sheet5Rev. 2.0, 2006-05-09
Page 7
High Current PN Half Bridge
BTS 7970B
Maximum Ratings
3Maximum Ratings
-40 °C < Tj < 150 °C (unless otherwise specified)
PosParameterSymbolLimitsUnit Test Condition
min max
Electrical Maximum Ratings
3.0.1 Supply voltage
3.0.2Logic Input Voltage
3.0.3 HS/LS continuous drain
current
3.0.4HS pulsed drain currentI
3.0.5 LS pulsed drain currentI
3.0.6PWM currentI
3.0.7 Voltage at SR pin
3.0.8 Voltage between VS and
IS pin
3.0.9 Voltage at IS pinV
Thermal Maximum Ratings
3.0.10 Junction temperature
3.0.11 Storage temperature
ESD Susceptibility
3.0.12 ESD susceptibility
V
VS
V
IN
V
INH
I
D(HS)
I
D(LS)
D(HS)
D(LS)
OUT
V
SR
V
VS -VIS
IS
T
j
T
stg
V
ESD
-0.345V
-0.35.3V
-4444
1)
ATC < 85°C
switch active
-90901)ATC < 85°C
= 10ms
t
pulse
-90901)A
1)
-5555Af = 1kHz, DC = 50%
single pulse
-6060Af = 20kHz, DC = 50%
-0.31.0V
-0.345V
-2045V
-40150°C
-55150°C
kVHBM
2)
IN, INH, SR, IS
OUT, GND, VS
1)
Maximum reachable current may be smaller depending on current limitation level
2)
ESD susceptibility HBM according to EIA/JESD 22-A 114B
-2
-6
2
6
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the device. Exposure to maximum rating conditions
for extended periods of time may affect device reliability
Data Sheet6Rev. 2.0, 2006-05-09
Page 8
High Current PN Half Bridge
BTS 7970B
Maximum Single Pulse Current
100
90
80
70
60
[A]
50
max
I
40
30
20
10
0
1,0E-031,0E-021,0E-011,0E+001,0E+01
t
pulse
Maximum Ratings
[s]
Figure 4BTS 7970B Maximum Single Pulse Current
This diagram shows the maximum single pulse current that can be driven for a given
t
pulse time
. The maximum reachable current may be smaller depending on the
pulse
current limitation level. Pulse time may be limited due to thermal protection of the device.
Data Sheet7Rev. 2.0, 2006-05-09
Page 9
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4Block Description and Characteristics
4.1Supply Characteristics
T
– 40 °C <
Pos.ParameterSymbol Limit ValuesUnit Test Conditions
General
4.1.1 Operating Voltage
4.1.2 Supply Current
4.1.3 Quiescent CurrentI
< 150 °C, 8 V < VS < 18 V, IL = 0A (unless otherwise specified)
j
min. typ.max.
V
S
I
VS(on)
5.5–28 VVS increasing
–23mAV
= 5 V
INH
V
= 0 V or 5 V
IN
R
=0 Ω
SR
DC-mode
normal operation
(no fault condition)
VS(off)
–715µAV
––65µA
= 0 V
INH
V
= 0 V or 5 V
IN
T
<85 °C
j
V
= 0 V
INH
V
= 0 V or 5 V
IN
25
[A]
20
VS(of f)
I
15
10
5
0
-4004080120160
[°C]
T
Figure 5Quiescent Current (typ.) vs. Junction Temperature
Data Sheet8Rev. 2.0, 2006-05-09
Page 10
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4.2Power Stages
The power stages of the BTS 7970B consist of a p-channel vertical DMOS transistor for
the high side switch and a n-channel vertical DMOS transistor for the low side switch. All
protection and diagnostic functions are located in a separate top chip. Both switches can
be operated up to 25 kHz, allowing active freewheeling and thus minimizing power
dissipation in the forward operation of the integrated diodes.
R
The on state resistance
junction temperature
Figure 6.
High Side Switc h
25
mΩ
20
R
ON(HS)
15
10
5
481216202428
is dependent on the supply voltage VS as well as on the
ON
T
. The typical on state resistance characteristics are shown in
j
Low Side Switc h
25
mΩ
20
R
ON(LS)
= 150°C
T
j
= 25° C
T
j
T
= -40°C
j
V
15
10
V
S
5
481216202428
Tj = 150°C
Tj = 25° C
Tj = -40°C
V
S
V
Figure 6Typical On State Resistance vs. Supply Voltage
Data Sheet9Rev. 2.0, 2006-05-09
Page 11
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4.2.1Power Stages - Static Characteristics
– 40 °C < Tj < 150 °C, 8 V < VS < 18 V (unless otherwise specified)
Due to active freewheeling, diode is conducting only for a few µs, depending on R
R
ON(HS)
I
L(LKHS)
V
DS(HS)
R
ON(LS)
I
L(LKLS)
V
SD(LS)
mΩI
–
7
–
10912.5
––1µAV
––50 µA
V
–
0.9
1.5
–
0.8
1.1
–
0.6
0.8
mΩI
–
91412
–
18
––1µAV
––15 µA
V
–
0.9
1.5
–
0.8
1.1
–
0.6
0.8
SR
= 20 A
OUT
V
= 13.5 V
S
T
= 25 °C
j
T
= 150 °C
j
= 0 V
INH
V
= 0 V
OUT
T
< 85 °C
j
V
= 0 V
INH
V
= 0 V
OUT
T
= 150 °C
j
I
=-9A
OUT
T
= -40 °C
j
T
= 25 °C
j
T
= 150 °C
j
=-20A
OUT
V
= 13.5V
S
T
= 25 °C
j
T
= 150 °C
j
= 0 V
INH
V
= V
OUT
T
< 85 °C
j
V
= 0 V
INH
V
= V
OUT
T
= 150 °C
j
I
= 9 A
OUT
T
= -40 °C
j
T
= 25 °C
j
T
= 150 °C
j
S
S
Data Sheet10Rev. 2.0, 2006-05-09
Page 12
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4.2.2Switching Times
IN
t
V
OUT
90%
10%
Figure 7Definition of switching times high side (R
IN
V
OUT
90%
dr(HS)tr(HS)
t
df( LS)tf(LS)
∆V
OUT
t
df(H S)tf(HS)
∆V
OUT
to GND)
load
t
dr(LS)tr(LS)
t
90%
10%
t
t
90%
10%
∆V
OUT
∆V
OUT
10%
t
Figure 8Definition of switching times low side (R
load
to VS)
Due to the timing differences for the rising and the falling edge there will be a slight
difference between the length of the input pulse and the length of the output pulse. It can
be calculated using the following formulas:
The device provides integrated protection functions. These are designed to prevent IC
destruction under fault conditions described in the data sheet. Fault conditions are
considered as “outside” normal operating range. Protection functions are not to be used
for continuous or repetitive operation, with the exception of the current limitation
(Chapter 4.3.4). In a fault condition the BTS 7970B will apply the highest slew rate
possible independent of the connected slew rate resistor. Overvoltage, overtemperature
and overcurrent are indicated by a fault current I
at the IS pin as described in the
IS(LIM)
paragraph “Status Flag Diagnosis With Current Sense Capability” on Page 18 and
Figure 12.
In the following the protection functions are listed in order of their priority. Overvoltage
lock out overrides all other error modes.
4.3.1Overvoltage Lock Out
To assure a high immunity against overvoltages (e.g. load dump conditions) the device
shuts the lowside MOSFET off and turns the highside MOSFET on, if the supply voltage
is exceeding the over voltage protection level
again with a hysteresis
voltage
V
. In H-bridge configuration, this behavior of the BTS 7970B will lead to
OV(ON)
V
OV(HY)
if the supply voltage decreases below the switch-on
V
. The IC operates in normal mode
OV(OFF)
freewheeling in highside during over voltage.
4.3.2Undervoltage Shut Down
To avoid uncontrolled motion of the driven motor at low voltages the device shuts off
(output is tri-state), if the supply voltage drops below the switch-off voltage
IC becomes active again with a hysteresis
switch-on voltage
V
UV(ON)
.
V
UV(HY)
if the supply voltage rises above the
V
UV(OFF)
. The
4.3.3Overtemperature Protection
The BTS 7970B is protected against overtemperature by an integrated temperature
sensor. Overtemperature leads to a shut down of both output stages. This state is
t
latched until the device is reset by a low signal with a minimum length of
pin, provided that its temperature has decreased at least the thermal hysteresis ∆
reset
at the INH
T in the
meantime.
Repetitive use of the overtemperature protection might reduce lifetime.
4.3.4Current Limitation
The current in the bridge is measured in both switches. As soon as the current in forward
I
direction in one switch (high side or low side) is reaching the limit
deactivated and the other switch is activated for
Data Sheet14Rev. 2.0, 2006-05-09
t
. During that time all changes at the
CLS
, this switch is
CLx
Page 16
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
IN pin are ignored. However, the INH pin can still be used to switch both MOSFETs off.
After t
after 2 *
the switches return to their initial setting. The error signal at the IS pin is reset
CLS
t
. Unintentional triggering of the current limitation by short current spikes
CLS
(e.g. inflicted by EMI coming from the motor) is suppressed by internal filter circuitry. Due
to thresholds and reaction delay times of the filter circuitry the effective current limitation
I
level
depends on the slew rate of the load current dI/dt as shown in Figure 10
CLx
I
I
I
CLx0
L
CLx
t
CLS
t
Figure 9Timing Diagram Current Limitation (Inductive Load)
Low SideSwitchHigh Side Switch
90
85
[A]
80
CLH
I
70
65
60
50
I
CLH0
75
55
0500100015002000
Tj = -40° C
Tj = 25° C
T
= 150°C
j
dIL/dt
[A/ms]
90
[A]
80
CLL
I
I
CLL0
= - 40°C
T
70
60
50
0500100015002000
j
Tj = 25°C
Tj = 150°C
dIL/dt
[A/ms]
Figure 10Current Limitation Level vs. Current Slew Rate dI/dt
Data Sheet15Rev. 2.0, 2006-05-09
Page 17
High Current PN Half Bridge
BTS 7970B
High Side Switch
80
A
75
I
CLH
70
65
60
6810121416182 0
Tj = -40°C
Tj = 25° C
Tj = 150°C
V
V
S
Block Description and Characteristics
Low Side Switch
80
A
75
I
CLL
70
65
60
6810121416182 0
Tj = -40°C
Tj = 25°C
Tj = 150°C
V
V
S
Figure 11Typical Current Limitation Detection Levels vs. Supply Voltage
In combination with a typical inductive load, such as a motor, this results in a switched
mode current limitation. That way of limiting the current has the advantage that the power
dissipation in the BTS 7970B is much smaller than by driving the MOSFETs in linear
mode. Therefore it is possible to use the current limitation for a short time without
exceeding the maximum allowed junction temperature (e.g. for limiting the inrush current
during motor start up). However, the regular use of the current limitation is allowed only
as long as the specified maximum junction temperature is not exceeded. Exceeding this
temperature can reduce the lifetime of the device.
4.3.5Short Circuit Protection
The device is short circuit protected against
• output short circuit to ground
• output short circuit to supply voltage
• short circuit of load
The short circuit protection is realized by the previously described current limitation in
combination with the over-temperature shut down of the device.
Please note: Due to the higher priority of the overvoltage protection the short circuit
protection is inactive in overvoltage conditions.
4.3.7 Current limitation
detection level high
side
4.3.8 Current limitation
detection level low
side
Current Limitation Timing
4.3.9 Shut off time for HS
and LS
Thermal Shut Down
4.3.10 Thermal shut down
junction temperature
4.3.11 Thermal switch on
junction temperature
4.3.12 Thermal hysteresis∆
4.3.13 Reset pulse at INH pin
(INH low)
V
UV(ON)
V
UV(OFF)
UV(HY)
V
OV(ON)
V
OV(OFF)
V
OV(HY)
I
CLH0
I
CLL0
t
CLS
T
jSD
T
jSO
––5.5VVS increasing
4.0–5.4 VVS decreasing
–0.2–V –
27.8––VVS decreasing
28–30 VVS increasing
–0.2–V –
A
V
54
50
54
50
76
98
–
73
–
70
90
A
71
90
–
68
–
65
82
S
T
= -40 °C
j
T
= 25 °C
j
T
= 150 °C
j
V
S
T
= -40 °C
j
T
= 25 °C
j
T
= 150 °C
j
70115210 µsVS=13.5V
155175200 °C–
150–190 °C–
T–7–K–
t
reset
4––µs–
=13.5 V
=13.5V
Data Sheet17Rev. 2.0, 2006-05-09
Page 19
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4.4Control and Diagnostics
4.4.1Input Circuit
The control inputs IN and INH consist of TTL/CMOS compatible schmitt triggers with
hysteresis which control the integrated gate drivers for the MOSFETs. Setting the INH
pin to high enables the device. In this condition one of the two power switches is switched
on depending on the status of the IN pin. To deactivate both switches, the INH pin has
to be set to low. No external driver is needed. The BTS 7970B can be interfaced directly
to a microcontroller.
4.4.2Dead Time Generation
In bridge applications it has to be assured that the highside and lowside MOSFET are
not conducting at the same time, connecting directly the battery voltage to GND. This is
assured by a circuit in the driver IC, generating a so called dead time between switching
off one MOSFET and switching on the other. The dead time generated in the driver IC is
automatically adjusted to the selected slew rate.
4.4.3Adjustable Slew Rate
In order to optimize electromagnetic emission, the switching speed of the MOSFETs is
adjustable by an external resistor. The slew rate pin SR allows the user to optimize the
balance between emission and power dissipation within his own application by
R
connecting an external resistor
to GND.
SR
4.4.4Status Flag Diagnosis With Current Sense Capability
The status pin IS is used as a combined current sense and error flag output. In normal
operation (current sense mode), a current source is connected to the status pin, which
delivers a current proportional to the forward load current flowing through the active high
side switch. If the high side switch is inactive or the current is flowing in the reverse
I
direction no current will be driven except for a marginal leakage current
R
external resistor
value of 19500 for the current sense ratio
V
leads to
= (IL / 19.5 A)V.
IS
determines the voltage per output current. E.g. with the nominal
IS
k
= IL / IIS, a resistor value of RIS = 1kΩ
ILIS
Due to the good long term stability and the low temperature coefficient it is possible to
improve the absolute current sense accuracy in the application by calibration. For best
results it is recommended to do a two-point calibration.
In case of a fault condition the status output is connected to a current source which is
independent of the load current and provides I
. The maximum voltage at the IS pin
IS(lim)
is determined by the choice of the external resistor and the supply voltage. In case of
I
current limitation the
Data Sheet18Rev. 2.0, 2006-05-09
is activated for 2 * t
IS(lim)
CLS
.
IS(LK)
. The
Page 20
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
Normal Operation:
Current Sense Mode
VS
ESD-ZD
IS
IIS~ I
Load
I
IS(lim)
Sense
Output
Logic
V
R
IS
IS
Figure 12Sense Current and Fault Current
[mA]
I
IS
I
IS(lim)
Fault Condit ion:
Error Flag M ode
VS
Sense
I
IS(lim)
Output
Logic
ESD-ZD
IS
V
R
IS
IS
e
u
l
a
v
s
i
l
i
k
r
e
w
o
l
e
h
i
g
h
Cur r ent Sense M ode
e
u
l
a
v
s
i
l
i
k
r
Error Flag Mode
I
CLL
/ I
CLH
[A]
I
L
Figure 13Sense Current vs. Load Current
Data Sheet19Rev. 2.0, 2006-05-09
Page 21
High Current PN Half Bridge
BTS 7970B
Block Description and Characteristics
4.4.5Truth Table
Device StateInputsOutputsMode
INHINHSS LSS IS
Normal operation0XOFF OFF 0Stand-by mode
10OFF ON0LSS active
11ONOFF CSHSS active
Over-voltage (OV)XXONOFF 1Shut-down of LSS,
HSS activated,
error detected
Under-voltage (UV)XXOFF OFF 0UV lockout
Overtemperature (OT)0XOFF OFF 0Stand-by mode, reset
of latch
1XOFF OFF 1Shut-down with latch,
error detected
Current limitation11OFF ON1Switched mode, error
detected
10ONOFF 1Switched mode, error
detected
1)
Will return to normal operation after t
; Error signal is reset after 2*t
CLS
(see Chapter 4.3.4)
CLS
1)
1)
Inputs:SwitchesStatus Flag IS:
0 = Logic LOWOFF = switched offCS = Current sense mode
4.4.6Electrical Characteristics - Control and Diagnostics
– 40 °C < Tj < 150 °C, 8 V < VS < 18 V (unless otherwise specified)
Pos.ParameterSymbolLimit ValuesUnit Test Conditions
min.typ. max.
Control Inputs (IN and INH)
4.4.1High level voltage
INH, IN
4.4.2 Low level voltage
INH, IN
4.4.3 Input voltage
hysteresis
4.4.4 Input current
4.4.5 Input currentI
Current Sense
4.4.6 Current sense ratio in
static on-condition
k
= IL / I
ILIS
IS
4.4.7 Maximum analog
sense current, sense
current in fault
condition
4.4.8 Isense leakage current
4.4.9 Isense leakage current,
active high side switch
4.4.10 Current sense ratio
long term drift
1)
4.4.11 Current sense ratio
4.4.12-0.055 -0.025 0.005IL= 20 A
4.4.13-0.05 -0.025 0
1)
temperature
coefficient
Not subject to production test, specified by design.
1)
V
INH(H)
V
IN(H)
V
INH(L)
V
IN(L)
V
INHHY
V
INHY
I
INH(H)
I
IN(H)
INH(L)
I
IN(L)
k
ILIS
I
IS(lim)
I
ISL
I
ISH
dk
ILIS
dk
ILIS
–1.75
2.152V–
1.6
1.11.4–V–
––350
mV –
200––
–30150 µAVIN = V
–25125 µAVIN = V
10
13
19.5
12
19.5
10
19.5
456.5mAVS = 13.5 V
––1µAVIN= 0 V or
–1200µAVIN = V
-1.51.5%Q100 qualification
/dT-0.12 -0.025 0.06 %/K IL= 10 A
25
26
28
3
R
IS
I
= 40 A
L
I
= 20 A
L
I
= 10 A
L
R
= 1kΩ
IS
V
INH
I
= 0 A
L
I
= 40 A
L
INH
INH
= 1 kΩ
= 0 V
INH
= 5.3 V
=0.4 V
= 5 V
Data Sheet21Rev. 2.0, 2006-05-09
Page 23
High Current PN Half Bridge
BTS 7970B
Thermal Characteristics
5Thermal Characteristics
PosParameterSymbolLimitsUnit Test Condition
min max
5.0.1 Thermal Resistance
Junction-Case, Low Side Switch
R
thjc(LS)
= ∆T
j(LS)
/ P
v(LS)
5.0.2 Thermal Resistance
Junction-Case, High Side Switch
R
thjc(HS)
= ∆T
j(HS)
/ P
v(HS)
5.0.3 Thermal Resistance
Junction-Case, both Switches
R
(
thjc
P
v(HS)
= max[∆T
+ P
v(LS)
j(HS)
)
, ∆T
j(LS)
] /
5.0.4 Thermal Resistance
Junction-Ambient
Note: Thermal characteristics are not subject to production test - specified by design.
R
thjc(LS)
R
thjc(HS)
R
thjc
R
thja
–1.8K/W
–0.9K/W
–1.0K/W
–35K/W6cm2 cooling
area
Data Sheet22Rev. 2.0, 2006-05-09
Page 24
High Current PN Half Bridge
BTS 7970B
6Application
6.1Application Example
MicrocontrollerReverse Polarit y
µC
I/O I/O I/O I/O I/O
I/O
Reset
Vdd
Vss
BTS 7970B
INH
IN
IS
SR
VS
OUT
GND
High Current H -Bridge
Voltage Regulator
WO
RO
Q
D
TLE
4278G
GND
M
I
VS
OUT
GND
Protection
BTS 7970B
INH
IN
IS
SR
SPD
50P03L
Application
V
S
Figure 14Application Example: H-Bridge with two BTS 7970B
6.2Layout Considerations
Due to the fast switching times for high currents, special care has to be taken to the PCB
layout. Stray inductances have to be minimized in the power bridge design as it is
necessary in all switched high power bridges. The BTS 7970B has no separate pin for
power ground and logic ground. Therefore it is recommended to assure that the offset
between the ground connection of the slew rate resistor, the current sense resistor and
ground pin of the device (GND / pin 1) is minimized. If the BTS 7970B is used in a Hbridge or B6 bridge design, the voltage offset between the GND pins of the different
devices should be small as well.
A ceramic capacitor from VS to GND close to each device is recommended to provide
current for the switching phase via a low inductance path and therefore reducing noise
and ground bounce. A reasonable value for this capacitor would be about 470 nF.
The digital inputs need to be protected from excess currents (e.g. caused by induced
voltage spikes) by series resistors in the range of 10 kΩ.
Data Sheet23Rev. 2.0, 2006-05-09
Page 25
High Current PN Half Bridge
Y
BTS 7970B
7Package Outlines P-TO-263-7
P-TO-263-7
(Plastic Transistor Single Outline Package)
9.9
7.5
6.6
3
.
0
±
1
2
5
.
1
0
.
)
±
0
9
±
.
2
.
2
4
.
9
1
0
(
1
17
A
5
.
6
0...0.1 5
+0.1
7 x 0. 6
-0.03
6 x 1.27
0.25MAB
1) Shear and punch direction no burrs this surf ace
Back side, heatsink contour
All metal sufaces tin plated, except area of cut .
Package Outlines P-TO-263-7
4.4
+0.1
1.3
-0.02
B
0.05
5
.
1)
0
5
.
±
0
±
7
0.1
.
7
4
.
2
2.4
0
±
.
0
5
.
1
8
°
M
A
X
.
5
0.1
B
Footprint
5
1
.
6
1
6
.
4
10.8
4
.
9
0.47
0.8
8.42
HLGF1019
ou can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
SMD = Surface Mounted Device
Data Sheet24Rev. 2.0, 2006-05-09
Dimensions in mm
Page 26
High Current PN Half Bridge
BTS 7970B
8Revision History
Version DateChanges / Comments
Rev. 0.1 2005-07-20 Target Data Sheet
Rev. 1.0 2006-05-04 Preliminary Data Sheet
Rev. 2.0 2006-05-09 Data Sheet
Revision History
Data Sheet252006-05-09
Page 27
High Current PN Half Bridge
BTS 7970B
Edition 2006-05-09
Published by
Infineon Technologies AG
81726 München, Germany
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Data Sheet262006-05-09
Page 28
http://www.infineon.com
Published by Infineon Technologies AG
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