Datasheet BTS 740S2 Datasheet (INFINEON)

Page 1
PROFET® BTS 740S2
Smart High-Side Power Switch Two Channels: 2 x 30m Current Sense
Product Summary Package
bb(on)
5.0...34V
P-DSO-20-9
Active channels one two parallel On-state Resistance R Nominal load current I Current limitation I
ON L(NOM) L(SCr)
30m
5.5A 8.5A 24A 24A
15m
General Description
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input,
diagnostic feedback and proportional load current sense monolithically integrated in Smart SIPMOS technology.
Fully protected by embedded protection functions
Applications
µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
CMOS compatible input
Undervoltage and overvoltage shutdown with auto-restart and hysteresis
Fast demagnetization of inductive loads
Logic ground independent from load ground
Protection Functions
Short circuit protection
Overload protection
Current limitation
Thermal shutdown
Overvoltage protection (including load dump) with external
resistor
Reverse battery protection with external resistor
Loss of ground and loss of V
Electrostatic discharge protection (ESD)
protection
bb
Diagnostic Functions
Proportinal load current sense
Diagnostic feedback with open drain output
Open load detection in OFF-state with external resistor
Feedback of thermal shutdown in ON-state
IN1 ST1 IS1
IN2 ST2 IS2
Vbb
Logic
Channel
1
Logic
Channel
2
PROFET
GND
OUT 1
Load 1
OUT 2
Load 2
Data Sheet 1 1999-06-16
Page 2
Functional diagram
g
y
O
BTS 740S2
IN1
ST1
IS1
GND1
IN2
ST2
IS2
GND2
overvoltage
protection
internal
e suppl
volta
ESD
gate
control
+
charge
logic
pump
temperature
sensor
Open load
detection
Current
sense
Control and protection circuit
of
channel 2
current limit
clamp for
inductive load
R
1
GND1
Channel 1
PROFET
VBB
OUT1
LOAD
OUT2
Pin Definitions and Functions
Pin Symbol Function
1,10, 11,12, 15,16, 19,20 3IN1 7 IN2 logic high signal 17,18 OUT1 13,14 OUT2 of channel 1,2. Both pins of each output have
4 ST1 8 ST2 open drain, invers to input level 2 GND1 6 GND2 5IS1 9IS2
V
bb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance
Input 1,2, activates channel 1,2 in case of
Output 1,2, protected high-side power output
to be connected in parallel for operation according ths spec (e.g. k
). Design the wiring
ilis
for the max. short circuit current
Diagnostic feedback 1,2 of channel 1,2,
Ground 1 of chip 1 (channel 1) Ground 2 of chip 2 (channel 2) Sense current output 1,2; proportional to the
load current, zero in the case of current limitation of the load current
Pin configuration
(top view)
V
1 20 V
bb
GND1 2 19 V
IN1 3 18 OUT1
ST1 4 17 OUT1
IS1 5 16 V
GND2 6 15 V
IN2 7 14 OUT2
ST2 8 13 OUT2
IS2 9 12 V Vbb10 11 V
bb bb
bb bb
bb bb
Data Sheet 2 1999-06-16
Page 3
BTS 740S2
)
T
T
I
E
I
E
)
(
)
Maximum Ratings at
T
= 25˚C unless otherwise specified
j
Parameter Symbol Values Unit
Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection
T
= -40 ...+150˚C
j,start
Load current (Short-circuit current, see page 5) Load dump protection1)
2)
R
= 2 Ω,
I
t
= 200 ms; IN = low or high,
d
each channel loaded with
V
LoadDump
R
=
= 7.0 ,
L
V
+
V
,
V
s
= 13.5 V
A
A
Operating temperature range Storage temperature range
Power dissipation (DC (all channels active)
4)
= 25˚C :
a
= 85˚C :
a
V
bb
V
bb
I
L
V
Load dump
T
j
T
stg
P
tot
43 V 34 V
self-limited A
3
)
-40 ...+150
60 V
˚C
-55 ...+150
3.8
W
2.0
Maximal switchable inductance, single pulse V
= 12V,
bb
= 5.5 A, = 8.5 A,
see diagrams on page 10
Electrostatic discharge capability (ESD
Human Body Model
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5k; C=100pF
Input voltage (DC) Current through input pin (DC)
Current through status pin (DC) Current through current sense pin (DC)
see internal circuit diagram page 9
T
= 150˚C4),
j,start
= 370 mJ, 0 one channel:
AS
= 790 mJ, 0 two parallel channels:
AS
out to all other pins shorted:
IN:
ST, IS:
Z
V
V I
I I
IN ST IS
L
ESD
IN
1816mH
1.0
kV
4.0
8.0
-10 ... +16 V ±2.0
mA
±5.0
±14
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ Max
Thermal resistance junction - soldering point
junction - ambient
4)
4),5)
each channel:
one channel active:
R R
thjs thja
all channels active:
1)
Supply voltages higher than V resistor for the GND connection is recommended.
2)
R
= internal resistance of the load dump test pulse generator
I
3)
V
Load dump
4)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm connection. PCB is vertical without blown air. See page 15
5)
Soldering point: upper side of solder edge of device pin 15. See page 15
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
require an external current limit for the GND and status pins (a 150
bb(AZ)
2
(one layer, 70µm thick) copper area for V
-- -- 12
--
--
40 33
K/W
--
--
bb
Data Sheet 3 1999-06-16
Page 4
BTS 740S2
T
j
g
T
j
Electrical Characteristics
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150˚C,
Load Switching Capabilities and Characteristics
V
= 12 V unless otherwise specified
bb
min typ max
On-state resistance (Vbb to OUT);
each channel,
two parallel channels,
IL = 5 A
T
T
= 25˚C :
j
= 150˚C:
j
T
= 25˚C:
j
Output voltage drop limitation at small load currents,
I
= 0.5 A
L
see page 14
T
=-40...+150˚C:
j
Nominal load current one channel active:
two parallel channels active:
Device on PCB
6)
T
,
a
= 85˚C,
T
150˚C
j
Output current while GND disconnected or pulled up;
V
= 30 V,
bb
see diagram page 9; (not tested specified by design)
Turn-on time7) IN to 90% Turn-off time IN
R
= 12
L
Slew rate on 10 to 30% Slew rate off
70 to 40%
V
= 0,
IN
V
OUT
V V
7)
OUT
7) OUT
,
R
,
R
= 12 :
L
= 12 :
L
to 10%
V
OUT
: :
R
V I
I
t t
d
-dV/dt
ON
ON(NL)
L(NOM)
L(GNDhigh)
on off
V
/dt
on
off
--
27 54
14
30 60
15
m
-- 50 -- mV
4.9
7.8
5.5
8.5
-- A
-- -- 8 mA
25 25
70 80
150
200
µs
0.1 -- 1 V/µs
0.1 -- 1 V/µs
Operating Parameters
Operating voltage Undervoltage shutdown Undervoltage restart
8)
=-40...+25˚C:
T
=+150˚C:
j
V
bb(on)
V
bb(under)
V
bb(u rst)
5.0 -- 34 V
3.2 -- 5.0 V
-- 4.5 5.5
6.0
Undervoltage restart of charge pump see dia
Undervoltage hysteresis
V
bb(under)
Overvoltage shutdown Overvoltage restart Overvoltage hysteresis
6)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
connection. PCB is vertical without blown air. See page 15
)
7
See timing diagram on page 11.
8)
At supply voltage increase up to
ram page 13
V
=
bb(u rst)
-
V
bb(under)
=-40...+25˚C:
T
=150˚C:
j
V
V V
2
(one layer, 70µm thick) copper area for V
V
= 4.7 V typ without charge pump,
bb
bb(ucp)
V
bb(under)
bb(over) bb(o rst)
V
bb(over)
V
--
--
4.7
--
-- 0.5 -- V
34 -- 43 V 33 -- -- V
-- 1 -- V
V
OUT
bb
- 2 V
6.5
7.0
bb
Data Sheet 4 1999-06-16
V
V
Page 5
BTS 740S2
T
j
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150˚C,
V
= 12 V unless otherwise specified
bb
min typ max
Overvoltage protection
I
=40 mA
bb
Standby current V
IN
see diagram page 10
= 0;
10
Leakage output current (included in
V
IN = 0
Operating current
I
=
I
+
GND
GND1
I
GND2
9)
T
=+25...+150˚C:
)
11)
,
V
= 5V,
IN
j
T
=-40˚C...25˚C:
j
I
bb(off)
, one channel on:
two channels on:
Protection Functions
Current limit,
(see timing diagrams, page 12)
Repetitive short circuit current limit,
T
=
T
each channel
j
jt
two parallel channels
(see timing diagrams, page 12)
Initial short circuit shutdown time
(see timing diagrams on page 12)
T
Output clamp (inductive load switch off)
at V
ON(CL)
= Vbb - V
OUT
,
I
L
= 40 mA
=25˚C...150˚C:
T
j
Thermal overload trip temperature Thermal hysteresis
=-40:
T
=150˚C:
j
)
=-40˚C:
T
j
=25˚C:
T
j
=+150˚C:
T
j
=25˚C:
j,start
12)
=-40˚C:
T
j
V
bb(AZ)
I
bb(off)
I
L(off)
I
GND
I
L(lim)
I
L(SCr)
t
off(SC)
V
ON(CL)
T
jt
T
jt
41 43
--
--
47
24
--
--
52
8
30
µA
50
-- -- 20 µA
--
--
48 40 31
--
--
1.2
2.4
56 50 37
24 24
36mA
65 58 45
--
--
-- 2.0 -- ms
41 43
47
--
--
52
150 -- -- ˚C
-- 10 -- K
V
A
A
V
Reverse Battery
Reverse battery voltage Drain-source diode voltage (V
= - 4.0 A,
I
L
9)
Supply voltages higher than V resistor in the GND connection is recommended). See also circuit diagram page 9.
10)
Measured with load; for the whole device; all channels off
11)
Add
)
12
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest V
ON(CL)
13)
Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 9).
T
j = +150˚C
I
, if
I
ST
> 0
ST
13)
-
V
bb
out
bb(AZ)
bb
require an external current limit for the GND and status pins (a 150
)
> V
V
-
V
ON(CL)
ON
in table of protection functions and
-- -- 32 V
-- 600 -- mV
Data Sheet 5 1999-06-16
Page 6
BTS 740S2
j
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150˚C,
Diagnostic Characteristics
Current sense ratio
V
= 0...5 V,
IS
k
ILIS
=
I
I
/
L
IS
Current sense output voltage limitation
T
= -40 ...+150˚C
j
Current sense leakage/offset current
T
= -40 ...+150˚C
j
V
Current sense settling time to
positive input slope,
(not tested, specified by design)
Current sense settling time to 10% of
negative input slope,
(not tested, specified by design)
Current sense rise time (60% to 90%) after change
of load current
(not tested, specified by design)
Open load detection voltage Internal output pull down
(pin 17,18 to 2 resp. 13,14 to 6),
V
bb(on)
IN
V
bb
=5 V,
I
(
IS(SH)
I
= 2.5
L
= 12 V unless otherwise specified
14)
, static on-condition,
15)
= 6.5
V
...27V,
T
= -40˚C,
j
T
= -40˚C,
j
T
= 25...+150˚C,
T
= 25...+150˚C,
j
V
IN
V
=5 V,
IN
V
= 0,
IS
not tested, specified by design)
I
= 0
L
I
= 5
L
16)
V
OUT
V
=0,
V
= 0
OUT
I
IS static
5 A
±10% after
5 A
0 A
(off-condition)
=5 V
I
L
I
= 0.5 A: 3100 4800 7800
L
I
L
I
= 0.5 A:
L
I
IS IS
IS
I
I
= 0,
= 0, = 0,
(short circuit)
static after
IS
= 5 A:
L
I I
= 5 A:
= 5 A:
= 0:
L
= 0:
L
k
ILIS
V
IS(lim)
I
IS(LL)
I
IS(LH)
I
IS(SH)
t
son(IS)
t
soff(IS)
t
slc(IS)
V
OUT(OL)
R
O
min typ max
4350 4800 5800
4350 3800
4800 4800
5350 6300
5.4 6.1 6.9 V
0-- 1
µA
0--15 0--10
-- -- 300
-- 30 100
-- 10 --
µs
µs
µs
234V 51540k
14)
This range for the current sense ratio refers to all devices. The accuracy of the
k
a factor of two by matching the value of In the case of current limitation the sense current
High. See figure 2c, page 12.
15)
Valid if
16)
External pull up resistor required for open load detection in off state.
V
bb(u rst)
was exceeded before.
for every single device.
ILIS
I
is zero and the diagnostic feedback potential
IS
k
can be raised at least by
ILIS
V
ST
is
Data Sheet 6 1999-06-16
Page 7
BTS 740S2
g
T
j
I
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150˚C,
V
= 12 V unless otherwise specified
bb
min typ max
Input and Status Feedback
Input resistance
(see circuit page 9)
Input turn-on threshold voltage Input turn-off threshold voltage
17)
R V
V
Input threshold hysteresis Off state input current On state input current Delay time for status with open load
V
= 0.4 V:
IN
V
IN
= 5 V:
I I
t
after Input neg. slope (see diagram page 13) Status delay after positive input slope
(not tested, specified by design)
t
Status delay after negative input slope
(not tested, specified by design)
t
Status output (open drain) Zener limit voltage ST low volta
Status leakage current,
T
=-40...+150˚C,
j
e
=-40...+25˚C,
T
= +150˚C,
j
V
= 5 V,
ST
I
= +1.6 mA:
ST
= +1.6 mA:
ST
I
= +1.6 mA:
ST
T
=25 ... +150˚C:
j
V V
I
I
IN(T+) IN(T-)
V
IN(T) IN(off) IN(on) d(ST OL3)
don(ST)
doff(ST)
ST(high) ST(low)
ST(high)
3.0 4.5 7.0 k
-- -- 3.5 V
1.5 -- -- V
-- 0.5 -- V 1--50µA
20 50 90 µA
-- 400 -- µs
-- 13 --
-- 1 --
5.4
--
--
6.1
--
--
6.9
0.4
0.7
µs
µs
V
-- -- 2 µA
17)
If ground resistors R
are used, add the voltage drop across these resistors.
GND
Data Sheet 7 1999-06-16
Page 8
Truth Table
Input 1 Output 1 Status 1
Input 2 Output 2 Status 2
BTS 740S2
Current
Sense 1
Current
Sense 2
level level level I
Normal operation Current­limitation Short circuit to GND
Over­temperature Short circuit to V
bb
Open load L
Undervoltage L
Overvoltage L
Negative output
L
H
L
H
L
H
L
H
L
H
H
H
H
L
H
L
H
L
18
)
L
L
L H H
21
)
L
H
L
L
L
L
L
H (L
H
L H H H H
H H
19)
L
L H
L H
L
22)
)
LL H 0
IS 0
nominal
0 0 0 0
0 0 0
<nominal
0 0
0 0 0 0
20)
voltage clamp
L = "Low" Level X = don’t care Z = high impedance, potential depends on external circuit H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 13) Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a ’Wired OR’ function with a single pull-up resistor. The current sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.
Terms
I
V
bb
bb
I
IN1
I
V
V
ST1
IN1
V
ST1
I
IS1
IS1
Leadframe
3
IN1
ST1
4
IS1
5
R
PROFET
GND1
V
bb
Chip 1
GND1
2
I
GND1
OUT1
17,18
V
I
L1
V
OUT1
ON1
ST2
I
IS2
IS2
Leadframe
7
IN2
ST2
8
IS2
9
R
GND2
V
bb
PROFET
Chip 2
GND2
6
OUT2
I
GND2
I
IN2
I
V
V
ST2
IN2
V
13,14
V
I
L2
V
OUT2
ON2
Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External R
optional; two resistors R
GND
GND1
, R
= 150 or a single resistor R
GND2
= 75 for reverse
GND
battery protection up to the max. operating voltage.
18)
The voltage drop over the power transistor is
V
-
V
bb
> 3V typ. Under this condition the sense current
OUT
I
IS
zero
19)
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R is used, an offset voltage at the GND and ST pins will occur and the V
20)
Low ohmic short to
21)
Power Transistor off, high impedance
22)
with external resistor between V
V
may reduce the output current
bb
and OUT
BB
I
and therefore also the sense current
L
signal may be errorious.
ST low
I
IS
GND
.
Data Sheet 8 1999-06-16
is
Page 9
BTS 740S2
Input circuit (ESD protection), IN1 or IN2
R
IN
I
ESD-ZD
I
GND
I
I
The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
Status output, ST1 or ST2
+5V
R
ST(ON)
GND
ESD-Zener diode: 6.1 V typ., max 5.0 mA; R at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
ESD-
ZD
ST
ST(ON)
< 375
Overvoltage and reverse batt. protection
+ 5V
R
ST
R
V
R
IS
V
= 6.1 V typ.,
Z1
R
=15k,
ST
R
I
IN
ST
IS
V
Z1
V
Z2
R
=4.5k typ.,
I
Logic
R
Signal GND
= 47 V typ.,
R
=1kΩ,
IS
GND
R
GND
V
Z2
PROFET
GND
R
V
In case of reverse battery the current has to be limited by the load. Temperature protection is not active
+ V
OUT
R
Load
Load GND
= 150 Ω,
=15kΩ,
bb
Open-load detection OUT1 or OUT2
OFF-state diagnostic condition:
V
> 3 V typ.; IN low
OUT
V
bb
R
EXT
Current sense output
V
IS
R
IS
I
IS
ESD-ZD
IS
GND
ESD-Zener diode: 6.1 V typ., max 14 mA;
R
= 1 k nominal
IS
Inductive and overvoltage output clamp,
OUT1 or OUT2
+V
bb
V
Z
V
ON
OUT
OFF
ST
Logic
GND disconnect
IN
ST
VbbV
IN
V
ST
Signal GND
V
bb
PROFET
GND
R
V
GND
V
Out
O
OUT
OUT
V
clamped to
ON
V
ON(CL)
= 47 V typ.
Power GND
Any kind of load. In case of IN = high is Due to V
GND
> 0, no V
= low signal available.
ST
V
OUT
V
-
V
IN
IN(T+)
Data Sheet 9 1999-06-16
.
Page 10
BTS 740S2
GND disconnect with GND pull up
V
PROFET
>
V
bb
GND
IN
V
-
GND
V
IN(T+)
OUT
device stays off
V
V
bb
V
IN
Any kind of load. If V Due to V
> 0, no VST = low signal available.
GND
IN
ST
ST
GND
Vbb disconnect with energized inductive load
high
IN
ST
V
bb
PROFET
GND
OUT
Inductive load switch-off energy dissipation
E
bb
E
AS
V
E
L
bb
PROFET
GND
1
/
=
·L·I
2
OUT(CL)
OUT
2 L
ON(CL)·iL
|) ln (1+
Z
Ω:
|V
L
L
R
L
(t) dt,
I
·R
L
OUT(CL)
L
IN
=
ST
Energy stored in load inductance:
While demagnetizing load inductance, the energy dissipated in PROFET is
E
= Ebb + EL - ER= ∫ V
AS
with an approximate solution for RL > 0
I
· L
AS
=
L
(V
+ |V
bb
·R
2
L
E
E
Load
E
L
E
R
)
|
V
bb
For inductive load currents up to the limits defined by Z
L
(max. ratings and diagram on page 10) each switch is protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb dis­connection with energized inductive load all the load current flows through the GND connection.
Maximum allowable load inductance for a single switch off
L = f (IL );
ZL [mH]
1000
100
10
T
j,start
=
150˚C, V
(one channel)
bb
4)
= 12 V, RL = 0
1
23456789101112
IL [A]
Data Sheet 10 1999-06-16
Page 11
BTS 740S2
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2
Figure 1a: Switching a resistive load, change of load current in on-condition:
IN
ST
V
I
L
I
IS
OUT
t
don(ST)
t
on
tt
Load 1
t
son(IS)
Load 2
t
soff(IS)
t
doff(ST)
t
off
Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition:
IN
V
OUT
90%
t
on
dV/dto n
slc(IS)slc(IS)
10%
I
L
t
off
t
dV/dto ff
t
The sense signal is not val i d during settling time after turn or change of load current.
Figure 1b: Vbb turn on:
IN1
IN2
V
bb
V
OUT1
V
OUT2
ST1 open drain
ST2 open drain
proper turn on under all conditions
Figure 2b: Switching a lamp:
IN
ST
V
OUT
I
L
The initial peak current should be l i mited by the lamp and not by
t
the current limit of t he device.
t
Data Sheet 11 1999-06-16
Page 12
BTS 740S2
Figure 2c: Switching a lamp with current limit:
IN
ST
V
OUT
I
L
I
IS
Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling
IN1
I
L1
IS 1 = 0
ST 1
t
other channel: normal operation
I
L(lim)
I
L(SCr)
t
off(SC)
t
Figure 2d: Switching an inductive load
IN
ST
V
OUT
I
L
I
L(OL)
*) if the time constant of load is too large, open-load-status may occur
Heating up of the chip may require several millisec onds , depending on external conditions
Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2)
IN1/2
I + I
L1 L2
2xI
L(lim)
t
t
off(SC)
S 1= IS 2 = 0
I
L(SCr)
T 1/2
t
ST1 and ST2 have to be configured as a ’Wired OR’ function ST1/2 with a single pull-up res i stor.
Data Sheet 12 1999-06-16
Page 13
Figure 4a: Overtemperature:
IN
<
T
T
j
jt
Reset if
BTS 740S2
Figure 6a: Undervoltage:
IN
ST
V
OUT
T
J
Figure 5a: Open load: detection (with R turn on/off to open load
EXT
ST
V
I
I
L
IS
bb
V
bb(under)
not defined
V
bb(u cp)
V
bb(u rst)
t
t
Figure 6b: Undervoltage restart of charge pump
),
V
V
on
ON(CL)
IN
ST
V
I
L
I
IS
OUT
open load
t
d(ST OL3)
off­state
V
bb(under)
V
bb(u rst)
on-state
V
bb(u cp)
V
bb(over)
V
bb(o rst)
off­state
V
bb
t
charge pump start s at
V
bb(ucp)
=4.7 V typ.
Data Sheet 13 1999-06-16
Page 14
BTS 740S2
Figure 7a: Overvoltage:
IN
ST
V
bb
I
L
I
IS
V
ON(CL)
V
bb(over)
V
bb(o rst)
Figure 8b: Current sense ratio:
15000
k
ILIS
10000
5000
0
t
012345678910111213
[A]
I
L
Figure 8a: Current sense versus load current23::
1.3
[mA] I
1.2
IS
1.1 1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1 0
0123456
[A]
Figure 9a: Output voltage drop versus load current:
V
[V]
ON
0.2 R
ON
0.1
V
ON(NL)
[A]
I
L
I
L
0.0
012345678
23
This range f or the current sense ratio refers to all
k
devices. The accuracy of the
can be raised at
ILIS
least by a factor of two by matching the value of
for every single device.
k
ILIS
Data Sheet 14 1999-06-16
Page 15
Package and Ordering Code
Standard: P-DSO-20-9
Sales Code BTS 740 L2
Ordering Code Q67060-S7012-A2
All dimensions in millimetres
Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15.
BTS 740S2
  !" #$%!&% '
%(((
))*
+,
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to
warranties of non-infringement, regarding circuits, descriptions and charts stated herein.
Infineon Technologiesis an approved CECC manufacturer.
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Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support de­vices or systems with the express written approval of Infineon Technol­ogies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or eff ectiv eness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm max. power dissipation P I
L(NOM)
2
active heatsink area) as a reference for
, nominal load current
and thermal resistance R
tot
thja
Data Sheet 15 1999-06-16
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