connection. PCB is vertical without blown air. See page 15
)
7
See timing diagram on page 11.
8)
At supply voltage increase up to
ram page 13
V
=
bb(u rst)
-
V
bb(under)
=-40...+25˚C:
T
=150˚C:
j
V
∆
V
V
2
(one layer, 70µm thick) copper area for V
V
= 4.7 V typ without charge pump,
bb
bb(ucp)
V
bb(under)
bb(over)
bb(o rst)
V
bb(over)
V
--
--
4.7
--
--0.5--V
34--43V
33----V
--1--V
≈
V
OUT
bb
- 2 V
6.5
7.0
bb
Data Sheet41999-06-16
V
V
Page 5
BTS 740S2
T
j
Parameter and Conditions, each of the two channelsSymbolValuesUnit
at Tj = -40...+150˚C,
V
= 12 V unless otherwise specified
bb
mintypmax
Overvoltage protection
I
=40 mA
bb
Standby current
V
IN
see diagram page 10
= 0;
10
Leakage output current (included in
V
IN =0
Operating current
I
=
I
+
GND
GND1
I
GND2
9)
T
=+25...+150˚C:
)
11)
,
V
=5V,
IN
j
T
=-40˚C...25˚C:
j
I
bb(off)
, one channel on:
two channels on:
Protection Functions
Current limit,
(see timing diagrams, page 12)
Repetitive short circuit current limit,
T
=
T
each channel
j
jt
two parallel channels
(see timing diagrams, page 12)
Initial short circuit shutdown time
(see timing diagrams on page 12)
T
Output clamp (inductive load switch off)
at V
ON(CL)
= Vbb - V
OUT
,
I
L
= 40 mA
=25˚C...150˚C:
T
j
Thermal overload trip temperature
Thermal hysteresis
=-40:
T
=150˚C:
j
)
=-40˚C:
T
j
=25˚C:
T
j
=+150˚C:
T
j
=25˚C:
j,start
12)
=-40˚C:
T
j
V
bb(AZ)
I
bb(off)
I
L(off)
I
GND
I
L(lim)
I
L(SCr)
t
off(SC)
V
ON(CL)
T
jt
∆
T
jt
41
43
--
--
47
24
--
--
52
8
30
µA
50
----20µA
--
--
48
40
31
--
--
1.2
2.4
56
50
37
24
24
36mA
65
58
45
--
--
--2.0--ms
41
43
47
--
--
52
150----˚C
--10--K
V
A
A
V
Reverse Battery
Reverse battery voltage
Drain-source diode voltage (V
=-4.0A,
I
L
9)
Supply voltages higher than V
resistor in the GND connection is recommended). See also
circuit diagram page 9.
10)
Measured with load; for the whole device; all channels off
11)
Add
)
12
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
13)
Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 9).
T
j =+150˚C
I
, if
I
ST
> 0
ST
13)
-
V
bb
out
bb(AZ)
bb
require an external current limit for the GND and status pins (a 150 Ω
)
> V
V
-
V
ON(CL)
ON
in table of protection functions and
----32V
--600--mV
Data Sheet51999-06-16
Page 6
BTS 740S2
j
Parameter and Conditions, each of the two channelsSymbolValuesUnit
at Tj = -40...+150˚C,
Diagnostic Characteristics
Current sense ratio
V
= 0...5 V,
IS
k
ILIS
=
I
I
/
L
IS
Current sense output voltage limitation
T
= -40 ...+150˚C
j
Current sense leakage/offset current
T
= -40 ...+150˚C
j
V
Current sense settling time to
positive input slope,
(not tested, specified by design)
Current sense settling time to 10% of
negative input slope,
(not tested, specified by design)
Current sense rise time (60% to 90%) after change
of load current
(not tested, specified by design)
Open load detection voltage
Internal output pull down
(pin 17,18 to 2 resp. 13,14 to 6),
V
bb(on)
IN
V
bb
=5 V,
I
(
IS(SH)
I
= 2.5
L
= 12 V unless otherwise specified
14)
, static on-condition,
15)
= 6.5
V
...27V,
T
= -40˚C,
j
T
= -40˚C,
j
T
= 25...+150˚C,
T
= 25...+150˚C,
j
V
IN
V
=5 V,
IN
V
= 0,
IS
not tested, specified by design)
I
= 0
L
I
= 5
L
16)
V
OUT
V
=0,
V
= 0
OUT
I
IS static
5 A
±10% after
5 A
0 A
(off-condition)
=5 V
I
L
I
= 0.5 A:310048007800
L
I
L
I
= 0.5 A:
L
I
IS
IS
IS
I
I
= 0,
= 0,
= 0,
(short circuit)
static after
IS
= 5 A:
L
I
I
= 5 A:
= 5 A:
= 0:
L
= 0:
L
k
ILIS
V
IS(lim)
I
IS(LL)
I
IS(LH)
I
IS(SH)
t
son(IS)
t
soff(IS)
t
slc(IS)
V
OUT(OL)
R
O
mintypmax
435048005800
4350
3800
4800
4800
5350
6300
5.46.16.9V
0-- 1
µA
0--15
0--10
----300
--30100
--10--
µs
µs
µs
234V
51540kΩ
14)
This range for the current sense ratio refers to all devices. The accuracy of the
k
a factor of two by matching the value of
In the case of current limitation the sense current
High. See figure 2c, page 12.
15)
Valid if
16)
External pull up resistor required for open load detection in off state.
V
bb(u rst)
was exceeded before.
for every single device.
ILIS
I
is zero and the diagnostic feedback potential
IS
k
can be raised at least by
ILIS
V
ST
is
Data Sheet61999-06-16
Page 7
BTS 740S2
g
T
j
I
Parameter and Conditions, each of the two channelsSymbolValuesUnit
at Tj = -40...+150˚C,
V
= 12 V unless otherwise specified
bb
mintypmax
Input and Status Feedback
Input resistance
(see circuit page 9)
Input turn-on threshold voltage
Input turn-off threshold voltage
17)
R
V
V
Input threshold hysteresis∆
Off state input current
On state input current
Delay time for status with open load
V
= 0.4 V:
IN
V
IN
= 5 V:
I
I
t
after Input neg. slope (see diagram page 13)
Status delay after positive input slope
(not tested, specified by design)
t
Status delay after negative input slope
(not tested, specified by design)
t
Status output (open drain)
Zener limit voltage
ST low volta
Status leakage current,
T
=-40...+150˚C,
j
e
=-40...+25˚C,
T
= +150˚C,
j
V
= 5 V,
ST
I
= +1.6 mA:
ST
= +1.6 mA:
ST
I
= +1.6 mA:
ST
T
=25 ... +150˚C:
j
V
V
I
I
IN(T+)
IN(T-)
V
IN(T)
IN(off)
IN(on)
d(ST OL3)
don(ST)
doff(ST)
ST(high)
ST(low)
ST(high)
3.04.57.0kΩ
----3.5V
1.5----V
--0.5--V
1--50µA
205090µA
--400--µs
--13--
--1--
5.4
--
--
6.1
--
--
6.9
0.4
0.7
µs
µs
V
----2µA
17)
If ground resistors R
are used, add the voltage drop across these resistors.
GND
Data Sheet71999-06-16
Page 8
Truth Table
Input 1Output 1Status 1
Input 2Output 2Status 2
BTS 740S2
Current
Sense 1
Current
Sense 2
levellevellevelI
Normal
operation
Currentlimitation
Short circuit to
GND
Overtemperature
Short circuit to
V
bb
Open loadL
UndervoltageL
OvervoltageL
Negative output
L
H
L
H
L
H
L
H
L
H
H
H
H
L
H
L
H
L
18
)
L
L
L
H
H
21
)
L
H
L
L
L
L
L
H (L
H
L
H
H
H
H
H
H
19)
L
L
H
L
H
L
22)
)
LL H0
IS
0
nominal
0
0
0
0
0
0
0
<nominal
0
0
0
0
0
0
20)
voltage clamp
L = "Low" LevelX = don’t careZ = high impedance, potential depends on external circuit
H = "High" LevelStatus signal after the time delay shown in the diagrams (see fig 5. page 13)
Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status
outputs ST1 and ST2 have to be configured as a ’Wired OR’ function with a single pull-up resistor. The current
sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.
Terms
I
V
bb
bb
I
IN1
I
V
V
ST1
IN1
V
ST1
I
IS1
IS1
Leadframe
3
IN1
ST1
4
IS1
5
R
PROFET
GND1
V
bb
Chip 1
GND1
2
I
GND1
OUT1
17,18
V
I
L1
V
OUT1
ON1
ST2
I
IS2
IS2
Leadframe
7
IN2
ST2
8
IS2
9
R
GND2
V
bb
PROFET
Chip 2
GND2
6
OUT2
I
GND2
I
IN2
I
V
V
ST2
IN2
V
13,14
V
I
L2
V
OUT2
ON2
Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20
External R
optional; two resistors R
GND
GND1
, R
=150 Ω or a single resistor R
GND2
=75 Ω for reverse
GND
battery protection up to the max. operating voltage.
18)
The voltage drop over the power transistor is
V
-
V
bb
> 3V typ. Under this condition the sense current
OUT
I
IS
zero
19)
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R
is used, an offset voltage at the GND and ST pins will occur and the V
20)
Low ohmic short to
21)
Power Transistor off, high impedance
22)
with external resistor between V
V
may reduce the output current
bb
and OUT
BB
I
and therefore also the sense current
L
signal may be errorious.
ST low
I
IS
GND
.
Data Sheet81999-06-16
is
Page 9
BTS 740S2
Input circuit (ESD protection), IN1 or IN2
R
IN
I
ESD-ZD
I
GND
I
I
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
Status output, ST1 or ST2
+5V
R
ST(ON)
GND
ESD-Zener diode: 6.1V typ., max 5.0 mA; R
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
ESD-
ZD
ST
ST(ON)
< 375 Ω
Overvoltage and reverse batt. protection
+ 5V
R
ST
R
V
R
IS
V
= 6.1 V typ.,
Z1
R
=15kΩ,
ST
R
I
IN
ST
IS
V
Z1
V
Z2
R
=4.5kΩ typ.,
I
Logic
R
Signal GND
= 47 V typ.,
R
=1kΩ,
IS
GND
R
GND
V
Z2
PROFET
GND
R
V
In case of reverse battery the current has to be limited
by the load. Temperature protection is not active
+ V
OUT
R
Load
Load GND
= 150 Ω,
=15kΩ,
bb
Open-load detection OUT1 or OUT2
OFF-state diagnostic condition:
V
> 3 V typ.; IN low
OUT
V
bb
R
EXT
Current sense output
V
IS
R
IS
I
IS
ESD-ZD
IS
GND
ESD-Zener diode: 6.1 V typ., max 14 mA;
R
= 1 kΩ nominal
IS
Inductive and overvoltage output clamp,
OUT1 or OUT2
+V
bb
V
Z
V
ON
OUT
OFF
ST
Logic
GND disconnect
IN
ST
VbbV
IN
V
ST
Signal GND
V
bb
PROFET
GND
R
V
GND
V
Out
O
OUT
OUT
V
clamped to
ON
V
ON(CL)
= 47 V typ.
Power GND
Any kind of load. In case of IN=high is
Due to V
GND
>0, no V
= low signal available.
ST
V
OUT
≈
V
-
V
IN
IN(T+)
Data Sheet91999-06-16
.
Page 10
BTS 740S2
GND disconnect with GND pull up
V
PROFET
>
V
bb
GND
IN
V
-
GND
V
IN(T+)
OUT
device stays off
V
V
bb
V
IN
Any kind of load. If V
Due to V
>0, no VST = low signal available.
GND
IN
ST
ST
GND
Vbb disconnect with energized inductive
load
high
IN
ST
V
bb
PROFET
GND
OUT
Inductive load switch-off energy
dissipation
E
bb
E
AS
V
E
L
bb
PROFET
GND
1
/
=
·L·I
2
OUT(CL)
OUT
2
L
ON(CL)·iL
|) ln(1+
Z
Ω:
|V
L
L
R
L
(t) dt,
I
·R
L
OUT(CL)
L
IN
=
ST
Energy stored in load inductance:
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
= Ebb + EL - ER= ∫ V
AS
with an approximate solution for RL > 0
I
·L
AS
=
L
(V
+|V
bb
·R
2
L
E
E
Load
E
L
E
R
)
|
V
bb
For inductive load currents up to the limits defined by Z
L
(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current
flows through the GND connection.
Maximum allowable load inductance for
a single switch off
L = f (IL );
ZL [mH]
1000
100
10
T
j,start
=
150˚C, V
(one channel)
bb
4)
=12V, RL =0Ω
1
23456789101112
IL [A]
Data Sheet101999-06-16
Page 11
BTS 740S2
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and
channel 2
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IN
ST
V
I
L
I
IS
OUT
t
don(ST)
t
on
tt
Load 1
t
son(IS)
Load 2
t
soff(IS)
t
doff(ST)
t
off
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
IN
V
OUT
90%
t
on
dV/dto n
slc(IS)slc(IS)
10%
I
L
t
off
t
dV/dto ff
t
The sense signal is not val i d during settling time after turn or
change of load current.
Figure 1b: Vbb turn on:
IN1
IN2
V
bb
V
OUT1
V
OUT2
ST1 open drain
ST2 open drain
proper turn on under all conditions
Figure 2b: Switching a lamp:
IN
ST
V
OUT
I
L
The initial peak current should be l i mited by the lamp and not by
t
the current limit of t he device.
t
Data Sheet111999-06-16
Page 12
BTS 740S2
Figure 2c: Switching a lamp with current limit:
IN
ST
V
OUT
I
L
I
IS
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
IN1
I
L1
IS 1 = 0
ST 1
t
other channel: normal operation
I
L(lim)
I
L(SCr)
t
off(SC)
t
Figure 2d: Switching an inductive load
IN
ST
V
OUT
I
L
I
L(OL)
*) if the time constant of load is too large, open-load-status may
occur
Heating up of the chip may require several millisec onds , depending
on external conditions
Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
IN1/2
I + I
L1 L2
2xI
L(lim)
t
t
off(SC)
S 1= IS 2 = 0
I
L(SCr)
T 1/2
t
ST1 and ST2 have to be configured as a ’Wired OR’ function
ST1/2 with a single pull-up res i stor.
Data Sheet121999-06-16
Page 13
Figure 4a: Overtemperature:
IN
<
T
T
j
jt
Reset if
BTS 740S2
Figure 6a: Undervoltage:
IN
ST
V
OUT
T
J
Figure 5a: Open load: detection (with R
turn on/off to open load
EXT
ST
V
I
I
L
IS
bb
V
bb(under)
not defined
V
bb(u cp)
V
bb(u rst)
t
t
Figure 6b: Undervoltage restart of charge pump
),
V
V
on
ON(CL)
IN
ST
V
I
L
I
IS
OUT
open load
t
d(ST OL3)
offstate
V
bb(under)
V
bb(u rst)
on-state
V
bb(u cp)
V
bb(over)
V
bb(o rst)
offstate
V
bb
t
charge pump start s at
V
bb(ucp)
=4.7 V typ.
Data Sheet131999-06-16
Page 14
BTS 740S2
Figure 7a: Overvoltage:
IN
ST
V
bb
I
L
I
IS
V
ON(CL)
V
bb(over)
V
bb(o rst)
Figure 8b: Current sense ratio:
15000
k
ILIS
10000
5000
0
t
012345678910111213
[A]
I
L
Figure 8a: Current sense versus load current23::
1.3
[mA]I
1.2
IS
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0123456
[A]
Figure 9a: Output voltage drop versus load current:
V
[V]
ON
0.2
R
ON
0.1
V
ON(NL)
[A]
I
L
I
L
0.0
012345678
23
This range f or the current sense ratio refers to all
k
devices. The accuracy of the
can be raised at
ILIS
least by a factor of two by matching the value of
for every single device.
k
ILIS
Data Sheet141999-06-16
Page 15
Package and Ordering Code
Standard: P-DSO-20-9
Sales CodeBTS 740 L2
Ordering CodeQ67060-S7012-A2
All dimensions in millimetres
Definition of soldering point with temperature Ts:
upper side of solder edge of device pin 15.
The information herein is given to describe certain components and
shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to
warranties of non-infringement, regarding circuits, descriptions and
charts stated herein.
Infineon Technologiesis an approved CECC manufacturer.
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office in
Germany or our Infineon Technologies Representatives worldwide (see
address list).
-
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the
safety or eff ectiv eness of that device or system. Life support devices or
systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other persons may
be endangered.
Printed circuit board (FR4, 1.5mm thick, one layer
70µm, 6cm
max. power dissipation P
I
L(NOM)
2
active heatsink area) as a reference for
, nominal load current
and thermal resistance R
tot
thja
Data Sheet151999-06-16
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