Datasheet BTS 5210G Datasheet (lnfineon)

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BTS 5210G

Smart High-Side Power Switch

Two Channels: 2 x 140mΩ

Status Feedback

Product Summary Package

Operating Voltage V

Active channels one two parallel On-state Resistance R Nominal load current I Current limitation I

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and

diagnostic feedback, monolithically integrated in Smart SIPMOS

• Providing embedded protective functions

5.5...40V

bb

140mΩ 70mΩ

ON

2.4A 3.9A

L(NOM)

6.5A 6.5A

L(SCr)



technology.

P-DSO-14

Applications

• µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads

• All types of resistive, inductive and capacitve loads

• Most suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• Very low standby current

• CMOS compatible input

• Improved electromagnetic compatibility (EMC)

• Fast demagnetization of inductive loads

• Stable behaviour at undervoltage

• Wide operating voltage range

• Logic ground independent from load ground

Protection Functions Block Diagram

• Short circuit protection

• Overload protection

• Current limitation

• Thermal shutdown

• Overvoltage protection (including load dump) with external

resistor

• Reverse battery protection with external resistor

• Loss of ground and loss of V

protection

bb

• Electrostatic discharge protection (ESD)

IN1

ST1

IN2

ST2

Vbb

Logic Channel 1 Channel 2

Load 2

Load 1

Diagnostic Function

GND

• Diagnostic feedback with open drain output

• Open load detection in OFF-state

• Feedback of thermal shutdown in ON-state

Infineon Technologies AG 1 2003-Oct-01

BTS 5210G

g

Functional diagram

GND

volta

internal

e supply

logic

gate

control

+

charge

pump

IN1

ST1

ESD

temperature

sensor

Open load

detection

channel 1

IN2

control and protection circuit

ST2

equivalent to

channel 1

current limit

clamp for

inductive load

reverse

battery

protection

VBB

OUT1

OUT2

Infineon Technologies AG 2 2003-Oct-01

BTS 5210G

Pin Definitions and Functions

Pin Symbol Function

Positive power supply voltage. Design the

1,7, 8,14

V

bb

2 GND Logic Ground 3 IN1 5 IN2 4 ST1

6 ST2

12,13 OUT1

9,10 OUT2

11 NC Not Connected

wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance

Input 1,2 activates channel 1,2 in case

of logic high signal

Diagnostic feedback 1,2 of channel 1,2

open drain

Output 1,2 protected high-side power output of channel 1,2. Design the wiring for the max. short circuit current; both output pins have to

be connected in parallel for operation according this spec.

Pin configuration

(top view)

V

1 • 14 V

bb

GND 2 13 OUT1

IN1 3 12 OUT1

ST1 4 11 NC

IN2 5 10 OUT2

ST2 6 9 OUT2

Vbb 7 8 Vbb

bb

Infineon Technologies AG 3 2003-Oct-01

BTS 5210G Maximum Ratings at T

= 25°C unless otherwise specified

j

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 6) Vbb 43 V Supply voltage for full short circuit protection

T

= -40 ...+150°C

j,start

Vbb 36 V

Load current (Short-circuit current, see page 6) IL self-limited A

3

Load dump protection1) V

2)

R

= 2 Ω, td = 400 ms; IN = low or high,

I

LoadDump

= VA + Vs, VA = 13.5 V

V

Load dump

)

60 V

each channel loaded with RL = 13.5 Ω, Operating temperature range Storage temperature range Power dissipation (DC)4) Ta = 25°C: (all channels active)

T

= 85°C:

a

Maximal switchable inductance, single pulse V

= 12V, T

bb

= 150°C4), see diagrams on page 10

j,start

IL = 2.9 A, EAS = 65 mJ, 0 Ω one channel: IL = 5.7 A, E

= 125 mJ, 0 Ω two parallel channels:

AS

Electrostatic discharge capability (ESD) IN:

Tj T

stg

P

3,05

tot

ZL

V

1.0

ESD

(Human Body Model) ST: out to all other pins shorted: acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC) see internal circuit diagram page 9 VIN -10 ... +16 V Current through input pin (DC) Pulsed current through input pin5) Current through status pin (DC)

I

IN

I

INp

IST

-40 ...+150

°C

-55 ...+150 W

1,59

11,2

mH

5,6

kV

4.0

8.0

±0.3

mA

±5.0 ±5.0

1)

Supply voltages higher than V

resistor for the GND connection is recommended.

2)

RI = internal resistance of the load dump test pulse generator

3)

V

Load dump

4)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air. See page 14

5)

only for testing

is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

require an external current limit for the GND and status pins (a 150Ω

bb(AZ)

2

(one layer, 70µm thick) copper area for Vbb

Infineon Technologies AG 4 2003-Oct-01

BTS 5210G Thermal Characteristics

Parameter and Conditions Symbol Values Unit

Thermal resistance junction - soldering point

6)7)

each channel: R junction – ambient6) @ 6 cm2 cooling area one channel active: all channels active:

min typ max

R

thjs thja

-- -- 15

--

-45 40

--

K/W

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

min typ max

On-state resistance (Vbb to OUT); I

= 2 A

L

each channel, Tj = 25°C:

T

= 150°C:

j

two parallel channels, Tj = 25°C:

see diagram, page 11

Nominal load current one channel active:

two parallel channels active:

Device on PCB Output current while GND disconnected or pulled up

V

= 32 V, V

bb

see diagram page 9

Turn-on time9) IN to 90% V Turn-off time IN R

= 12 Ω

L

Slew rate on 9) 10 to 30% V Slew rate off 9) 70 to 40% V

6)

, Ta = 85°C, Tj ≤ 150°C

= 0,

IN

8)

OUT

to 10% V

, R

OUT

, RL = 12 Ω: -dV/dt

OUT

= 12 Ω: dV/dton 0.2 -- 1.0 V/µs

L

: :

;

RON

I

ton t

1.8

L(NOM)

L(GNDhigh)

off

-- -- 2 mA

0.2 -- 1.1 V/µs

off

--

3.4

--

110 210

55

2.4

140

mΩ

280

70

-- A

3.9

100 100

250

270

µs

6)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air. See page 14

7)

Soldering point: upper side of solder edge of device pin 15. See page 14

8)

not subject to production test, specified by design

9)

See timing diagram on page 12.

2

(one layer, 70µm thick) copper area for Vbb

Infineon Technologies AG 5 2003-Oct-01

BTS 5210G

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Operating Parameters

min typ max

Operating voltage V Undervoltage switch off

10)

Tj =-40°C...25°C: V

Tj =125°C: -- -- 4.5 Overvoltage protection

I

= 40 mA

bb

Standby current V

= 0; see diagram page 11 T

IN

13)

12)

Tj =-40°C...25°C:

=150°C:

j

V I

Tj =125°C: -- -- 8 Off-State output current (included in I

V

= 0; each channel

IN

Operating current

one channel on: all channels on:

Protection Functions

Current limit, V

14)

, V

= 5V,

IN

15)

= 0V, (see timing diagrams, page 12)

out

)

bb(off)

=-40°C:

Tj

=25°C:

Tj

=+150°C:

Tj

I

5.5 -- 40 V

bb(on)

-- -- 4.5 V

bb(u so)

11)

41 47 52 V

bb(AZ)

--

bb(off)

--

-- 1 5 µA

L(off)

GND

--

L(lim)

-5

5

--

0.5

1.0

-9

--

12

11)

0.9

1.7

14

8

µA

mA

A

--

Repetitive short circuit current limit,

Tj = Tjt each channel two channels

(see timing diagrams, page 12)

Initial short circuit shutdown time T

V

= 0V (see timing diagrams on page 12)

out

Output clamp (inductive load switch off)

at V

ON(CL)

= Vbb - V

, IL= 40 mA

OUT

j,start

16)

=25°C:

I

--

L(SCr)

t V

-- 2 -- ms

off(SC)

41 47 52 V

ON(CL)

--

6.5

--

A

--

Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis

∆

Tjt -- 10 -- K

10)

is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage falling below the lower limit of Vbb(on)

11)

not subject to production test, specified by design

12)

Supply voltages higher than V resistor for the GND connection is recommended). See also V circuit diagram on page 9.

13)

Measured with load; for the whole device; all channels off

14)

Add I

15)

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.

16)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest

V

ST

ON(CL)

, if IST > 0

require an external current limit for the GND and status pins (a 150Ω

bb(AZ)

in table of protection functions and

ON(CL)

Infineon Technologies AG 6 2003-Oct-01

BTS 5210G

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Reverse Battery

Reverse battery voltage Drain-source diode voltage (V

= - 2.0 A, Tj = +150°C

IL

17)

-Vbb -- -- 32 V

)

> V

out

bb

Diagnostic Characteristics

min typ max

-VON -- 600 -- mV

Open load detection voltage V

Input and Status Feedback

18)

Input resistance

(see circuit page 9) Input turn-on threshold voltage V Input turn-off threshold voltage V

OUT(OL)1

RI 2.5 4.0 6.0 kΩ

IN(T+) IN(T-)

Input threshold hysteresis ∆ V Status change after positive input slope

19)

t

d(STon)

1.7 2.8 4.0 V

-- -- 2.5 V

1.0 -- -- V

-- 0.2 -- V

IN(T)

-- 10 20 µs with open load Status change after positive input slope

19)

t

d(STon)

30 -- -- µs with overload Status change after negative input slope

t

d(SToff)

-- -- 500 µs with open load Status change after negative input slope

19)

t

-- -- 20 µs

d(SToff)

with overtemperature Off state input current VIN = 0.4 V: I On state input current VIN = 5 V: I

5 -- 20 µA

IN(off)

10 35 60 µA

IN(on)

Status output (open drain) Zener limit voltage IST = +1.6 mA: ST low voltage IST = +1.6 mA:

V

ST(high)

V

ST(low)

5.4

--

0.6

--

V

17)

Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source

diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and circuit page 9).

18)

If ground resistors R

19)

not subject to production test, specified by design

are used, add the voltage drop across these resistors.

GND

Infineon Technologies AG 7 2003-Oct-01

BTS 5210G

Truth Table

( each channel )

Normal operation L Open load L

Overtemperature L

IN OUT ST

L

H

H Z

H

H L

H

L

H H

20)

L

H H L

L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal valid after the time delay shown in the timing diagrams

Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 2 in parallel, the status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor.

Terms

Leadframe (V External R

) is connected to pin 1,7,8,14

bb

optional; single resistor R

GND

operating voltage.

I

bb

V

bb

V

IN1

IN2

I

IN1

I

IN2

I

ST1

I

ST2

V

ST1

ST2

1,7,8,14

Leadframe

V

R

GND

bb

PROFET

GND

2

OUT1

OUT2

I

GND

12,13

9,10

3

IN1

5

IN2

4

ST1

6

ST2

V

ON2

V

OUT2

V

ON1

I

L1

I

L2

OUT1

= 150 Ω for reverse battery protection up to the max.

GND

20)

L, if potential at the Output exceeds the OpenLoad detection voltage

Infineon Technologies AG 8 2003-Oct-01

BTS 5210G

Input circuit (ESD protection), IN1 or IN2

R

IN

I

ESD-ZD

I

GND

I

The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Status output, ST1 or ST2

R

ST(ON)

GND

ESD-Zener diode: 6.1 V typ., max 0.3 mA; R at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

ESDZD

+5V

ST

ST(ON)

< 375 Ω

Overvolt. and reverse batt. protection

+ 5V

R

ST

R

I

IN

Logic

ST

R

ST

V

Z1

= 6.1 V typ., VZ2 = 47 V typ., R

V

Z1

R

= 15 kΩ, RI= 3.5 kΩ typ.

ST

R

Signal GND

GND

V

Z2

GND

In case of reverse battery the load current has to be limited by the load. Temperature protection is not active

+ V

bb

OUT

R

Load

Load GND

= 150 Ω,

Open-load detection, OUT1 or OUT2

OFF-state diagnostic condition: Open Load, if V

> 3 V typ.; IN low

OUT

V

bb

Inductive and overvoltage output clamp,

OUT1 or OUT2

VON clamped to V

V

ON(CL)

Z

= 47 V typ.

Power GND

+V

V

bb

ON

OUT

OFF

Logic

unit

GND disconnect

Open load

detection

IN

ST

VbbV

IN

V

ST

Signal GND

V

bb

PROFET

GND

V

GND

OUT

R

EXT

V

OUT

Any kind of load. In case of IN = high is V Due to V

GND

> 0, no V

= low signal available.

ST

OUT

≈ V

IN

- V

IN(T+)

Infineon Technologies AG 9 2003-Oct-01

.

BTS 5210G

GND disconnect with GND pull up

V

PROFET

> V

GND

IN

bb

V

- V

OUT

GND

device stays off

IN(T+)

V

bb

V

IN

Any kind of load. If V Due to V

> 0, no VST = low signal available.

GND

IN

ST

GND

Vbb disconnect with energized inductive load

high

V

bb

IN

ST

For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb.

Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection.

V

bb

PROFET

GND

OUT

Inductive load switch-off energy dissipation

E

bb

E

AS

E

V

IN

=

ST

bb

PROFET

GND

OUT

L

Z

L

{

R

E

L

Energy stored in load inductance:

·L·I

2

2 L

1

/

=

E

L

While demagnetizing load inductance, the energy dissipated in PROFET is

= Ebb + EL - ER= V

E

AS

ON(CL)·iL

with an approximate solution for RL > 0

· L

I

AS

=

L

(V

+ |V

OUT(CL)

bb

·R

2

L

|) ln (1+

E

Ω:

|V

(t) dt,

·R

I

L

OUT(CL)

)

|

Maximum allowable load inductance for a single switch off (one channel)

L = f (I

L

ZL [mH]

1000

); T

j,start

150°C, V

=

bb

4)

= 12 V, RL = 0 Ω

Load

L

R

100

10

1

123456

I

L

[A]

Infineon Technologies AG 10 2003-Oct-01

BTS 5210G

Typ. on-state resistance

R

= f (Vbb,T

ON

R

[mOhm]

ON

); IL = 2 A, IN = high

j

240

Tj = 150°C

180

120

25°C

-40°C

60

0

5 7 9 11 30 40

V

bb

[V]

Typ. standby current

I

= f (T

bb(off)

[µA]

I

bb(off)

45

); V

j

= 9...34 V, IN1,2 = low

bb

40

35

30

25

20

15

10

5

0

-50 0 50 100 150 200

T

[°C]

j

Infineon Technologies AG 11 2003-Oct-01

BTS 5210G

Timing diagrams

All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4

Figure 1a: Vbb turn on:

IN1

IN2

Figure 2b: Switching a lamp:

IN

V

bb

V

OUT1

V

OUT2

ST1 open drain

ST2 open drain

Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition:

IN

ST

V

OUT

I

L

t

Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling

IN1

other channel: normal operation

t

V

OUT

I

L1

90%

t

on

dV/dton

dV/dtoff

t

off

I

L(lim)

I

L(SCr)

10%

t

I

L

t

ST

Heating up of the chip may require several millisec onds, depending on external conditions

off(SC)

t

Infineon Technologies AG 12 2003-Oct-01

BTS 5210G

IN1

Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2)

IN1/2

I + I

L1 L2

2xI

L(lim)

I

L(SCr)

t

off(SC)

ST1/2

ST1 and ST2 have to be configured as a ' Wi red OR' function ST1/2 with a single pull-up res i stor.

Figure 4a: Overtemperature: Reset if T

<Tjt

j

Figure 5a: Open load: detection in OFF-state, turn on/off to open load Open load of channel 1; other channels normal operation

IN1

V

OUT1

I

L1

ST

10µs

t

500µs

Figure 6a: Status change after, turn on/off to overtemperature Overtemperature of channel 1; other channels normal operation

IN

ST

30µs 20µs

V

OUT

T

J

t

Infineon Technologies AG 13 2003-Oct-01

BTS 5210G

Package and Ordering Code

Standard: P-DSO-14

Sales Code BTS 5210G

Ordering Code Q67060-S7502

All dimensions in millimetres

Definition of soldering point with temperature T upper side of solder edge of device pin 15.

Pin 15

Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm max. power dissipation P I

L(NOM)

2

active heatsink area) as a reference for

, nominal load current

and thermal resistance R

tot

thja

12m

25m

:

s

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.

Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not

limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein.

Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

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Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in lifesupport devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Infineon Technologies AG 14 2003-Oct-01