Page 1
DISCRETE SEMICONDUCTORS
DATA SH EET
BST70A
N-channel vertical D-MOS
transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Page 2
Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in TO-92
variant envelope and intended for use
in relay, high-speed and
line-transformer drivers.
FEATURES:
• Very low R
DS(on)
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No second breakdown
PIN CONFIGURATION
QUICK REFERENCE DATA
Drain-source voltage V
Gate-source voltage (open drain) V
Drain current (DC) I
Total power dissipation up to T
=25°CP
amb
DS
GSO
D
tot
max. 80 V
max. 20 V
max. 0.5 A
max. 1 W
Drain-source ON-resistance
ID= 500 mA; VGS= 10 V R
DS(on)
typ.
max.
Transfer admittance
I
= 500 mA; VDS= 15 V Yfs typ. 300 mS
D
PINNING - TO-92 VARIANT
1 = source
2 = gate
3 = drain
24Ω
Ω
handbook, halfpage
Note: Various pinout configurations available.
1
2
3
g
MAM146
Fig.1 Simplified outline and symbol.
d
s
April 1995 2
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Drain-source voltage V
Gate-source voltage (open drain) V
Drain current (DC) I
Drain current (peak) I
Total power dissipation up to T
=25°C (note 1) P
amb
Storage temperature range T
Junction temperature T
THERMAL RESISTANCE
DS
GSO
D
DM
tot
stg
j
max. 80 V
max. 20 V
max. 0.5 A
max. 1.0 A
max. 1 W
− 65 to + 150 °C
max. 150 °C
From junction to ambient (note 1) R
th j-a
= 125 K/W
Note
1. Transistor mounted on printed circuit board, max. lead length 4 mm, mounting pad for drain lead
min. 10mm × 10 mm.
April 1995 3
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
CHARACTERISTICS
T
=25°C unless otherwise specified
j
Drain-source breakdown voltage
I
=10µA; VGS=0 V
D
Drain-source leakage current
VDS= 60 V; VGS=0 I
Gate-source leakage current
VGS= 20 V; VDS=0 I
Gate threshold voltage
ID= 1 mA; VDS= V
GS
(BR)DS
DSS
GSS
V
GS(th)
min. 80 V
max. 1 µA
max. 100 nA
min.
max.
1.5
3.5VV
Drain-source ON-resistance (see Fig.4)
= 500 mA; VGS= 10 V R
I
D
DS(on)
typ.
max.
Transfer admittance
I
= 500 mA; VDS= 15 V Yfs typ. 300 mS
D
Input capacitance at f = 1 MHz
V
= 10 V; VGS=0 C
DS
iss
typ.
max.
Output capacitance at f = 1 MHz
= 10 V; VGS=0 C
V
DS
oss
typ.
max.
Feedback capacitance at f = 1 MHz
= 10 V; VGS=0 C
V
DS
rss
typ.
max.
Switching times (see Figs 2 and 3)
I
= 500 mA; VDS= 50 V; VGS= 0 to 10 V t
D
on
t
off
max.
max.
2.0
4.0ΩΩ
4560pF
pF
3045pF
pF
812pF
pF
1015ns
ns
April 1995 4
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
handbook, halfpage
10 V
0 V
3
10
handbook, halfpage
I
D
(mA)
VDD = 50 V
I
D
50 Ω
MSA631
Fig.2 Switching times test circuit.
MDA724
VGS =
10 V
6 V
5 V
4 V
handbook, halfpage
INPUT
OUTPUT
Fig.3 Input and output waveforms.
1.2
handbook, halfpage
I
D
(A)
0.8
10 %
t
on
90 %
90 %
t
off
10 %
MBB692
MDA725
2
10
10
468
R
DSon
(Ω)
100 2
Fig.4 Tj=25°C; typical values.
April 1995 5
0.4
0
0
210468
VGS (V)
Fig.5 Tj=25°C; typical values at VDS= 10 V.
Page 6
Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
1.2
handbook, halfpage
VGS = 10 V
I
D
(A)
0.8
0.4
0
010
6 V
5 V
4 V
3 V
2
468
VDS (V)
Fig.6 Tj=25°C; typical values.
MDA726
1.2
handbook, halfpage
P
tot
(W)
0.8
0.4
0
0
50 100 200150
T
amb
Fig.7 Power derating curve.
MRC238
(°C)
handbook, halfpage
3
k
2.5
2
1.5
1
0.5
−50 0 50
Fig.8
MDA728
100
Tj (°C)
DS (on)
at T
j
at 25 °C
;=
R
---------------------------------------------
k
R
DS (on)
typ. values at 500 mA/10 V.
150
1.2
handbook, halfpage
k
1.1
1
0.8
0.8
0.7
−50 0 50
Fig.9
V
GS th()
---------------------------------------------
k
V
V
at 1 mA; typical values.
GS(th)
GS th()
at 25 °C
at T
100
MDA729
150
Tj (°C)
j
;=
April 1995 6
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
120
handbook, halfpage
C
(pF)
80
C
40
0
010 30
iss
C
oss
C
rss
20
VDS (V)
Fig.10 Tj=25°C; VGS= 0; f = 1 MHz; typical
values.
MDA730
April 1995 7
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
PACKAGE OUTLINES
Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant
c
L
2
E
d
A L
1
2
D
3
b
1
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
A
b
5.2
0.48
mm
5.0
OUTLINE
VERSION
SOT54 variant TO-92 SC-43
0.40
0.66
0.56
c
D
d
E
4.2
3.6
e
2.54
b
1
0.45
4.8
4.4
1.7
1.4
REFERENCES
0.40
IEC JEDEC EIAJ
e
1.27
1
L
14.5
12.7
L
1
L
1
max
2.5 2.5
(1)
L
2
max
EUROPEAN
PROJECTION
b
e
1
e
ISSUE DATE
97-04-14
April 1995 8
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995 9
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Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
NOTES
April 1995 10
Page 11
Philips Semiconductors Product specification
N-channel vertical D-MOS transistor BST70A
NOTES
April 1995 11
Page 12
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Printed in The Netherlands 137107/00/01/pp12 Date of release: April 1995 Document order number: 9397 750 02496
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