Datasheet BSP152 Datasheet (Philips)

DISCRETE SEMICONDUCTORS

DATA SH EET

BSP152

N-channel enhancement mode
vertical D-MOS transistor

Product specification
File under Discrete Semiconductors, SC13b

April 1995

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

FEATURES

• Direct interface to C-MOS, TTL,
etc.

• High-speed switching

• No secondary breakdown.

DESCRIPTION

N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 envelope, intended for use
as a line current interruptor in
telephone sets and for applications in
relay, high-speed and line
transformer drivers.

PINNING - SOT223

PIN DESCRIPTION

1 gate
2 drain
3 source
4 drain

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DS

drain-source
voltage

I

D

P

tot

DC drain current − 550 mA
total power

dissipation

±V

GSO

gate-source
voltage

R

DS(on)

drain-source
on-resistance

V

GS(off)

gate-source
cut-off voltage

handbook, halfpage

123

Top view

BSP152

− 200 V

up to T

open drain − 40 V

ID = 750 mA;
VGS = 10 V

ID = 1 mA;
VDS = V

4

= 25 °C − 1.5 W

amb

− 2.5 Ω

1.5 3.5 V

GS

d

g

s

MAM054

April 1995 2

Fig.1 Simplified outline and symbol.

Philips Semiconductors Product specification

N-channel enhancement mode vertical

BSP152

D-MOS transistor

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DS

±V

GSO

I

D

I

DM

P

tot

T

stg

T

j

THERMAL RESISTANCE

SYMBOL PARAMETER THERMAL RESISTANCE

R

th j-a

Note

1. Device mounted on an epoxy printed-circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 mm

drain-source voltage − 200 V
gate-source voltage open drain − 40 V
DC drain current − 550 mA
peak drain current − 3A
total power dissipation up to T

= 25 °C; note 1 − 1.5 W

amb

storage temperature −65 +150 °C
operating junction temperature − 150 °C

from junction to ambient; note 1 83.3 K/W

2

.

STATIC CHARACTERISTICS

= 25 °C unless otherwise specified.

T

j

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

±I

GSS

V

GS(th)

R

DS(on)

I

DSS

| transfer admittance ID = 750 mA; VDS = 25 V 400 −−mS

| Y

fs

C

iss

drain-source breakdown voltage ID = 10 µA; VGS = 0 200 −−V
gate-source leakage current ±VGS = 40 V; VDS = 0 −−100 nA
gate-source threshold voltage ID = 1 mA; VDS = V

GS

1.5 − 3.5 V
drain-source on-resistance ID = 750 mA; VGS = 10 V −−2.5 Ω
drain-source leakage current VDS = 160 V; VGS = 0 −−100 nA

input capacitance VDS = 25 V; VGS = 0;

− 100 − pF

f = 1 MHz

C

oss

C

rss

output capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 42 − pF
feedback capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 8 − pF

Switching times (see Figs 2 and 3)
t

on

turn-on time ID = 750 mA; VDD = 50 V;

−−15 ns

VGS = 0 to 10 V

t

off

turn-off time ID = 750 mA; VDD = 50 V;

−−30 ns

VGS = 10 to 0 V

April 1995 3

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

handbook, halfpage

10 V

0 V

50 Ω

VDD = 50 V

I

D

MSA631

handbook, halfpage

INPUT

OUTPUT

10 %

t

on

90 %

90 %

BSP152

10 %

t

off

MBB692

handbook, halfpage

2

P

tot

(W)

1.5

1

0.5

0

0 50 100 150

Fig.2 Switching times test circuit.

MRC207

T

(°C)

amb

Fig.3 Input and output waveforms.

300

handbook, halfpage

C

(pF)

200

100

0

0102030

VGS = 0; f = 1 MHz;Tj = 25 °C.

MRC203

VDS (V)

C

iss

C

oss

C

rss

Fig.4 Power derating curve.

April 1995 4

Fig.5 Capacitance as a function of drain-source

voltage, typical values.

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

handbook, halfpage

I

D

(A)

3

2

1

0

04812

Tj = 25 °C.

V =GS10 V 7 V

P = 1.5 W

VDS (V)

MRC204

6 V

5 V

4.5 V

4 V

3.5 V

600

handbook, halfpage

I

D

(mA)

400

200

0

0123

Tj = 25 °C.

= 10 V

5 V

V

GS

BSP152

MRC205

4 V

3.5 V

VDS (V)

Fig.6 Typical output characteristics.

handbook, halfpage

3

I

D

(mA)

2

1

0

0246810

VDS = 10 V; Tj = 25 °C.

MRC206

VDS (V)

Fig.7 Typical output characteristics.

handbook, halfpage

7

R

DS(on)

(Ω)

6

5

4

3

2

1

0

0.01 0.1 1 5

Tj = 25 °C.

VGS = 3.5 V 4 V

MRC208

5 V

6 V

7 V

8 V

ID (A)

Fig.8 Typical transfer characteristics.

April 1995 5

Fig.9 Drain-source on-resistance as a function of

drain current, typical values.

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

100

handbook, halfpage

R

DS(on)

(Ω)

10

1

0246810

VDS = 100 mV; Tj = 25 °C.

MRC210

VDS (V)

handbook, halfpage

5

I

D

(mA)

1

-1

10

-2

10

-3

10

110

δ = 0.01; T
(1) R

DSon

limitation.

P

amb

(1)

t

p

T

= 25 °C.

BSP152

MRC212

t

p

10 µs
100 µs
1 ms
10 ms

100 ms

10

2

1 s

VDS (V)

3

10

DC

t

p

=

δ

T

t

Fig.10 Drain-source on-resistance as a function of

gate-source voltage, typical values.

2

10

handbook, full pagewidth

R

th j-a

(K/W)

10

10

δ =

0.75

0.5

0.2

0.1

0.05

0.02

0.01

1

0

-1

-5

10

-4

10

-3

10

10

Fig.11 SOAR curve.

MRC211

t

P

t

p

T

-2

-1

10

1

10

p

=

δ

T

t

2

10

tp (s)

3

10

Fig.12 Transient thermal resistance from junction to ambient as a function of pulse time.

April 1995 6

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

2.2

handbook, halfpage

k

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

R

DS(on)

=

k

------------------------------------------­R

DS(on)

Typical R

DSon

0 50 100 150–50

at T

j

at 25oC

at ID = 750 mA; VGS = 10 V.

MRC209

Tj (°C)

1.2

handbook, halfpage

k

1

0.8

0.6

V

GS(th)

=

k

------------------------------------------­V

GS(th)

Typical V

GS(th)

0 50 100 150–50

at T

j

at 25oC

at ID = 1 mA.

BSP152

MRC213

Tj (°C)

Fig.13 Temperature coefficient of

drain-source on-resistance.

Fig.14 Temperature coefficient of gate-source

threshold voltage.

April 1995 7

Philips Semiconductors Product specification

N-channel enhancement mode vertical

BSP152

D-MOS transistor

PACKAGE OUTLINE

Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223

D

c

y

b

1

4

E

H

E

AB

X

v M

A

132

e

1

e

DIMENSIONS (mm are the original dimensions)

mm

OUTLINE

VERSION

SOT223

1.8

1.5

A

0.10

0.01

p

0.80

0.60

IEC JEDEC EIAJ

b

3.1

2.9

1

cD

0.32

0.22

UNIT A1b

b

6.7

6.3

p

w M

B

0 2 4 mm

scale

e1HELpQywv

e

E

3.7

3.3

REFERENCES

4.6

2.3

7.3

6.7

A

1.1

0.7

Q

A

1

L

p

detail X

0.95

0.85

0.1 0.10.2

EUROPEAN

PROJECTION

ISSUE DATE

96-11-11
97-02-28

April 1995 8

Philips Semiconductors Product specification

N-channel enhancement mode vertical

BSP152

D-MOS transistor

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

April 1995 9

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

NOTES

BSP152

April 1995 10

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

NOTES

BSP152

April 1995 11

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Printed in The Netherlands 137107/00/01/pp12 Date of release: April 1995 Document order number: 9397 75002541