Datasheet BLF0810-90, BLF0810S-90 Datasheet (Philips)

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M3D379

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DISCRETE SEMICONDUCTORS

DATA SHEET

M3D461

BLF0810-90; BLF0810S-90

Base station LDMOS transistors

Preliminary specification 2002 Mar 18

Page 2

Philips Semiconductors Preliminary specification

handbook, halfpage

Top view MBK394

Fig.1 Simplified outline SOT502A (BLF0810-90)

Base station LDMOS transistors BLF0810-90; BLF0810S-90

FEATURES

• High power gain

• Easy power control

• Excellent ruggedness

• Source on underside eliminates DC isolators, reducing

DESCRIPTION

Silicon N-channel enhancement mode lateral D-MOS transistors encapsulated in a 2-lead flange package (BLF0810-90) with a ceramic cap or in a 2-lead earless package (BLF0810S-90). The common source is connected to the flange.

common mode inductance

• Designed for broadband operation (750 MHz to 1 GHz).

Typical CDMA IS95 performance at standard settings at a supply voltage of 27 V and I

APPLICATIONS

• Common source class-AB operation in CDMA applications in the 750 to 960 MHz frequency range.

=18W

=16dB

η =26% ACPR <−45 dBc at 750 kHz and BW = 30 kHz ACPR <−63 dBc at 1.98 MHz and BW = 30 kHz

PINNING - SOT502A PINNING - SOT502B

PIN DESCRIPTION

1drain

2 gate

3 source; connected to flange

PIN DESCRIPTION

1drain

3 source; connected to flange

gate

=500mA

Top view

MBL10

Fig.2 Simplified outline SOT502B (BLF0810S-90)

QUICK REFERENCE DATA

2-tone performance at T

MODE OF OPERATION

=25°C in a common source test circuit.

(MHz)

(V)

PEP

(W)

(dB)

(%)

(dBc)

Class-AB 881.4 - 881.6 27 60 typ. 16.5 typ. 35 typ. −30

MODE OF OPERATION

(1)

CDMA

(MHz)

881.5 27 18 typ. 16 typ. 26

(V)

avg

(W)

(dB)

(%)

ACPR

(dB)

typ. −46 typ. −63

Note

1. IS95 CDMA (pilot, Paging, Sync, and Trafic Codes 8 trough 13)

2. ACPR 750 kHz at BW = 30 kHz

3. ACPR 1.98 MHz at BW = 30 kHz.

(2)

(3)

2002 Mar 18 2

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Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

stg

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

th j-c

Note

1. Thermal resistance is determined under RF operating conditions.

drain-source voltage − 75 V

gate-source voltage −±15 V

storage temperature −65 150 °C

junction temperature − 200 °C

thermal resistance from junction to case Th=25°C, PL= 18 W avg, note 1 <0.75 K/W

CHARACTERISTICS

=25°C unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

(BR)DSS

GSth

DSS

DSX

GSS

DSon

drain-source breakdown voltage VGS=0; ID=3mA 75 −−V

gate-source threshold voltage VDS=10V; ID= 300 mA 4 − 5V

drain-source leakage current VGS=0; VDS=36V −−1 µA

on-state drain current VGS=V

+9V; VDS=10V 28 −−A

GS(th)

gate leakage current VGS= ±20 V; VDS=0 −−1 µA

forward transconductance VDS=10V; ID=10A − 4.8 − S

drain-source on-state resistance VGS=9V; ID=10A − 120 − mΩ

2002 Mar 18 3

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Philips Semiconductors Preliminary specification

Fig.3 Power gain and efficiency as functions of

peak envelope load power, typical values.

VDS=27V; IDQ= 500 mA; f1=881.4MHz; f2=881.6MHz.

Base station LDMOS transistors BLF0810-90; BLF0810S-90

APPLICATION INFORMATION

RF performance in a common source-AB circuit; T

=25°C.

MODE OF OPERATION

(MHz)

(V)

(mA)

PEP

(W)

(dB)

(%)

(dBc)

Class-AB 881.4 - 881.6 27 500 60 >16 >35 <−30

MODE OF OPERATION

(1)

CDMA

(MHz)

(V)

(mA)

avg

(W)

881.5 27 500 >16 >15 >26

(dB)

(%)

ACPR

(dB)

<−46

<−63

Note

1. IS95 CDMA (pilot, Paging, Sync, and Trafic Codes 8 trough 13)

2. ACPR 750 kHz at BW = 30 kHz

3. ACPR 1.98 MHz at BW = 30 kHz.

Ruggedness in class-AB operation

The BLF0810-90 and BLF0810S-90 are capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases at V

=27V; PL= 60 W (PEP).

(2)

(3)

(dB)

0 20406080100

2002 Mar 18 4

(PEP) (W)

(%)

(dBc)

-20

IDQ=400mA

-40

450mA

500mA

-60

-80 0 20406080100

VDS=27V; f1= 881.4 MHz; f2=881.6MHz.

600mA

(PEP) (W)

Fig.4 Intermodulation distortion as a function of

peak envelope load power, typical values.

Page 5

Philips Semiconductors Preliminary specification

Fig.5 Intermodulation distortion as a function of

peak envelope load power, typical values.

VDS=27V; f1= 881.4 MHz; f2=881.6MHz.

Fig.7 Power gain and efficiency as functions of

the average load power, typical values.

VDS=27V; IDQ= 500 mA; f = 881.5 MHz;

measured under CDMA conditions; test signal Standard IS-95

Base station LDMOS transistors BLF0810-90; BLF0810S-90

(dBc)

-20

IDQ=600mA

-40

400mA

450mA

500mA

-60

-80 0 20406080100

(PEP) (W)

(dBc)

-20

-40

-60

IDQ=600mA

450mA

500mA

400mA

-80 0 20406080100

(PEP) (W)

VDS=27V; f1= 881.4 MHz; f2=881.6MHz.

Fig.6 Intermodulation distortion as a function of

peak envelope load power, typical values.

(dB)

20 30 40 50

2002 Mar 18 5

avg (dBm)

(%)

ACPR

(dB)

-20

-40

750 kHz

-60

1.98 MHz

-80 20 30 40 50

avg (dBm)

VDS=27V; IDQ= 500 mA; f = 881.5 MHz;

measured under CDMA conditions; test signal Standard IS-95

Fig.8 Intermodulation distortion as a function of

the average load power, typical values.

Page 6

Philips Semiconductors Preliminary specification

Fig.9 Input impedance as a function of frequency

(series components); typical values.

Class-AB operation; VDS=27V; IDQ=500mA; PL=18W.

Fig.11 Definition of transistor impedance.

Base station LDMOS transistors BLF0810-90; BLF0810S-90

(Ω)

-1

-2

0.8 0.85 0.9 0.95 1

f (GHz)

(Ω)

-1

-2

0.8 0.85 0.9 0.95 1

Class-AB operation; VDS=27V; IDQ=500mA; PL=18W.

f (GHz)

Fig.10 Load impedance as a function of frequency

(series components); typical values.

DRAIN

BLF0810-90

GATE

2002 Mar 18 6

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Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

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2002 Mar 18 7

Page 8

Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

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= 6.15); t hickness = 25 mils.

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Fig.13 Circuit for 850 to 960 MHz test circuit.

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2002 Mar 18 8

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The other side is unetched and serves as a ground plane.

Dimensions in mm.

The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (

Page 9

Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

List of components

COMPONENT DESCRIPTION VALUE DIMENSIONS

C1, C6, C13, C14, C15, C16, C17

C2 multilayer ceramic chip capacitor; note 1 330 nF

C3 multilayer ceramic chip capacitor; note 1 100 nF

C4, C9, C10, C11, C12 tantalum capacitor 10 µF

C5, C18 air trimmer capacitor 8 pF

C7, C8 multilayer ceramic chip capacitor 8.2 pF

R1 potentiometer 1 kΩ

Q1 7808 voltage regulator

Q2 BLF0910-140 LDMOS transistor

L1 stripline; note 2 204 × 36 mils

L2 stripline; note 2 253 × 36 mils

L3 stripline; note 2 210 × 188 mils

L4 stripline; note 2 94 × 36 mils

L5 Ferroxcube

L6 stripline; note 2 380 × 36 mils

L7 stripline; note 2 71 × 363 mils

L8 stripline; note 2 319 × 700 mils

L9 stripline; note 2 1724 × 36 mils

L10 stripline; note 2 721 × 1106 mils

L11 stripline; note 2 389 × 210 mils

L12, L13 stripline; note 2 1470 × 131 mils

L14 stripline; note 2 92 × 36 mils

L15, L16 stripline; note 2 165 × 36 mils

multilayer ceramic chip capacitor; note 1 68 pF

Notes

1. American Technical Ceramics type 100A or capacitor of same quality.

2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (ε

2002 Mar 18 9

= 6.15); thickness = 25 mils.

Page 10

Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

PACKAGE OUTLINE

Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A

M M

0 5 10 mm

scale

M M M

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

UNIT

inches

4.72

3.99

0.186

0.157

OUTLINE VERSION

SOT502A

12.83

12.57

0.505

0.495

20.02

19.61

0.788

0.772

19.96

19.66

0.786

0.774

0.15

0.08

0.006

0.003

IEC JEDEC EIAJ

9.50

9.53

9.30

9.25

0.375

0.374

0.364

0.366

REFERENCES

0.045

0.035

1.14

0.89

19.94

18.92

0.785

0.745

5.33

4.32

0.210

0.170

3.38

3.12

0.133

0.123

1.70

1.45

0.067

0.057

34.16

33.91

1.345

1.335

EUROPEAN

PROJECTION

9.91

9.65

0.390

0.380

0.25 0.5127.94

0.01 0.021.100

ISSUE DATE

99-10-13 99-12-28

2002 Mar 18 10

Page 11

Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

PACKAGE OUTLINE

Earless flanged LDMOST ceramic package; 2 leads SOT502B

Package under

development

Philips Semiconductors reserves the

right to make changes without notice.

M M

0 5 10 mm

scale

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

UNIT

inches

4.72

3.99

0.186

0.157

OUTLINE VERSION

SOT502B

12.83

12.57

0.505

0.495

20.02

19.61

0.788

0.772

19.96

19.66

0.786

0.774

0.15

0.08

0.006

0.003

IEC JEDEC EIAJ

9.53

9.50

9.25

9.30

0.375

0.374

0.364

0.366

REFERENCES

0.045

0.035

1.14

0.89

19.94

18.92

0.785

0.745

5.33

4.32

0.210

0.170

1.70

1.45

0.067

0.057

20.70

20.45

0.815

0.805

9.91

9.65

0.390

0.380

0.25

0.010

EUROPEAN

PROJECTION

ISSUE DATE

99-12-16 99-12-28

2002 Mar 18 11

Page 12

Philips Semiconductors Preliminary specification

Base station LDMOS transistors BLF0810-90; BLF0810S-90

DATA SHEET STATUS

DATA SHEET

STATUS

(1)

PRODUCT STATUS

(2)

DEFINITIONS

Objective data Development This data sheet contains data from the objective specification for product

development. Philips Semiconductors reserves the right to change the specification in any manner without notice.

Preliminary data Qualification This data sheet contains data from the preliminary specification.

Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.

Product data Production This data sheet contains data from the product specification. Philips

Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

DEFINITIONS

Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

DISCLAIMERS

Life support applications  These products are not

designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes  Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

CAUTION

This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.

2002 Mar 18 12

Page 13

Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of a ny quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Printed in The Netherlands budgetnum/printrun/ed/pp13 Date of release: 2002 Mar 18 Do cument order number: 9397 750 09 548

SCA73