Datasheet BH3856S, BH3856FS Datasheet (ROHM)

Audio ICs

2-wire serial sound control IC

BH3856S / BH3856FS

BH3856S / BH3856FS

The BH3856S and BH3856FS are signal processing ICs designed for volume and tone control in televisions, mini
component stereo systems, and other audio products. Their two-line serial control (I

2

C BUS) enables them to control

volume and tone on the basis of signals from a microcomputer, etc.

Applications

!!!!

Televisions, [Video equipped television], personal computer televisions, mini component stereo systems, car stereos.

Features

!!!!

2

1) I

C BUS facilitates direct serial control from a microcomputer of volume (main volume), balance (left / right), and tone

(bass, treble). DC control is also possible.

2) Volume is produced by a low-distortion, low-noise VCA. Designed to minimize step noise.

3) Stable standard voltage supply and built-in I/O buffer mean that few attachments are needed. SSOP-A32 package
designed to save space.

4) Matrix surround yields powerful sound.

Absolute maximum ratings

!!!!

Parameter Symbol Limits Unit

Power supply voltage 10.0 V

Power dissipation
Operating temperature

Storage temperature

1 Reduced by 12mW for each increase in Ta of

∗

2 Reduced by 6.8mW for each increase in

∗

(Ta = 25°C)

BH3856S
BH3856FS

Ta of 1°C over 25°C.

Vcc

Pd

Topr
Tstg

1°C over 25°C.

1200

850

−40~+85

−55~+150

1

∗

2

∗

mW

°C
°C

Recommended operating conditions

!!!!

Parameter Symbol Min. Typ. Max. Unit

Power supply voltage 6.0 9 9.5 VV

Note : I2C BUS is a registered trademark of Philips.

CC

(Ta = 25°C)

Audio ICs

Block diagram

!!!!

BH3856S / BH3856FS

BH3856S

1

A_GND

2

IN1

3

BVN1

BIN1

4

5

BVO1

6

TVN1

7

TIN1

8

TVO1

9

OUT1

10

V

CC

11

SC

12

N.C.

13

SDA

14

SCL

D_GND

15

BH3856FS

1

A_GND

2

IN1

3

BVN1

4

BIN1

5

N.C.

6

BVO1

7

TVN1

TIN1

8

TVO1

9

10

OUT1

11

CC

V

12

SC

13

SDA

14

N.C.

15

SCL

D_GND

16

30k 30k

47k

+

−

(Bass) (Treble)

5.1k

Tone

Volume

Matrix surround

2.1k 2.1k

−

+

Volume Volume

V

CC

200k

Reference Voltage

30k 30k

47k

+

−−

Tone

Volume

Matrix surround

−

+

Volume

Reference Voltage

5.1k

2.1k

V

200k

(Bass)

(Treble)

CC

−−

Control

−−

Control

47k

47k

+

Volume

+

Volume

Volume

V

CC

(Bass) (Treble)

−

Tone

−

+

V

CC

(Bass)

Tone

(Treble)

−

+

5.1k

30k
30k

30k

30k

5.1k

2.1k

30k
30k

30k

30k

30

FILTER

29

IN2

28

BVN2
BIN2

27

BVO2

26

25

TVN2

TIN2

24

TVO2

23

OUT2

22

21

VC1

VC2

20

19

TC

18

BC

17

V

ref

SLAVE ADDRESS

16

SELECT SW

32

FILTER

31

IN2

30

BVN2

29

N.C.
BIN2

28

27

BVO2

26

TVN2

25

TIN2

24

TVO2

23

OUT2

22

VC1

VC2

21

TC

20

BC

19

18

V

ref

SLAVE ADDRESS

17

SELECT SW

Audio ICs

Pin descriptions

!!!!

Pin No.

BH3856S BH3856FS

1
2
3
4
5
6
7
8

9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
12

1 A_GND
2 IN1
3 BVN1
4 BIN1
6
7

9

11
12
13
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
31
32

5, 14, 29

Pin name

BVO1
TVN1

TIN1 Channel 1 treble filter8

TVO1
OUT110

V

CC

SC

SDA

SCL

D_GND

SASS

V

ref

BC

TC
VC2
VC1

OUT2
TVO2

TIN2
TVN2
BVO2

BIN2
BVN2

IN2

FILTER

N.C.

BH3856S / BH3856FS

Function

Analog ground
Channel 1 volume input
Channel 1 bass filter
Channel 1 bass filter
Channel 1 bass filter
Channel 1 treble filter

Channel 1 treble filter
Channel 1 volume output
Power supply
Time constant pin for prevention of switching shock
SDA data input pin
SCL data input pin
Digital ground

Slave address selection pin
Reference voltage output
Time constant pin for prevention of switching shock
Time constant pin for prevention of switching shock
Time constant pin for prevention of switching shock
Time constant pin for prevention of switching shock
Channel 2 volume output
Channel 2 treble filter
Channel 2 treble filter
Channel 2 treble filter
Channel 2 bass filter
Channel 2 bass filter
Channel 2 bass filter
Channel 2 volulme input
Filter
Not connected internally.

Audio ICs

Input / output circuits

!!!!

Symbol

Pin voltage

Equivalent circuit

V

CC

BH3856S / BH3856FS

Description

IN1
IN2

BVN1
BVN2

BIN1
BIN2

BVO1
BVO1

4.5V

4.5V

4.5V

4.5V

4.5V

4.5V

4.5V

4.5V

FILTER 5.2V

2pin
31pin

A_GND

V

A_GND

V

4pin
28pin

A_GND

V

6pin
27pin

A_GND

V

A_GND

CC

V

Main volume input pin.

47kΩ

2/1V

CC

CC

50kΩ

3pin
30pin

CC

5.1kΩ

2/1V

CC

CC

50kΩ

CC

30kΩ

Designed for input impedance of 47kΩTyp.).

Pin for low band filter connection.

Pin for low band filter connection.

Pin for low band filter connection.

Filter input pin.
Please install a capacitor of about 10µF to
the filter pin.

32pin

30kΩ

Has built-in precharge and discharge circuits.

TVN1
TVN2

TIN1
TIN2

4.5V

4.5V

4.5V

4.5V

A_GND

CC

V

8pin
25pin

A_GND

25kΩ

7pin
26pin

2.1kΩ

CC

2/1V

Pin for high band filter connection.

Pin for high band filter connection.

∗

The pin numbers are for the BH3856S.

BH3856S / BH3856FS

Audio ICs

Symbol Pin voltage Equivalent Circuit Description

CC

V

TVO1
TVO2

OUT1
OUT2

SC
BC

TC
VC1
VC2

V

ref

4.5V

4.5V

4.5V

4.5V

−

3.8V

A_GND

V

10pin
24pin

A_GND

CC

V

12pin
19pin
20pin
22pin
21pin

A_GND

CC

V

18pin

A_GND

CC

V

25kΩ

9pin
24pin

CC

Pin for high band filter connection.

Main volume output pin.
OUT1 is the volume output for Channel 1.
OUT2 is the volume output for Channel 2.

Digital

VREF

For prevention of shock noise during
step switching.
SC : Surround pin
BC : Bass pin
TC : Treble pin
VC1 : Volume pin (Channel 1)
VC2 : Volume pin (Channel 2)

3.8V regulator output pin.
Output requires capacitor for stopping
oscillation. Output pin has built-in precharge
and discharge circuits, so there is no problem
with start-up or shut-down even with a large
capacitor. This pin is for connection to the
high-band filter.

SDA
SCL

SASS

V

CC

A_GND
D_GND

−

−

Power supply voltage pin.

−

Analog GND pin. Connected to IC board.

Digital GND pin. Separate from Analog GND pin.

−

13pin
15pin
17pin

A_GND

2kΩ

· I2C bass input pin
SDA : serial data line
SCL : serial clock line

· Slave address selection pin
SASS: slave address selection switch

∗

The pin numbers are for the BH3856S.

Audio ICs

Electrical characteristics

!!!!

TONE = ALL FLAT, R

Parameter Symbol Unit ConditionsMin. Typ. Max.
Quiescent current
Maximum input
Maximum output
Voltage gain
Maximum attenuation
Crosstalk

Low range control width

High range control width

(unless otherwise noted, Ta = 25°C, VCC = 9V, f = 1kHz, BW = 20 ~ 20kHz, VOL = Max.,

Q

I

Vim

Vom

Gv −1.5 0 +1.5 dB V

ATT 90 110 − dB Vo=1

V

CT

VB Max.

VB Min.

VT Max.

VT Min.

+12 +15 +18 dB 100Hz, V

+12 +15 +18 dB 100kHz, V

−18

g

= 600Ω, RL = 10kΩ)

− 20 27 mA

2.3

2.3 2.5 −

Vrms
Vrms

−

2.5

70 80 − dB

−15 −12 dB 100kHz, V

BH3856S / BH3856FS

No signal
THD=1%, VOL=−20dB (ATT)
THD=1%

IN

=1Vrms

Vrms

Vo=1Vrms

IN

=100mVrms

100Hz, VIN=100mVrms−18 −15 −12 dB

IN

=100mVrms

IN

=100mVrms

G

SR

4

−

−

−

3.5

3.0

33

−

40

4

−

6

0.01
45

2

3.8
10

0

47

−

−

−

−

8

0.1
65
10

4.1

−

+1.5

61
10

−

−

1

dB

%

Vrms

µ
µVrms

V

mA

dB

kΩ

Ω

dB

V
V

Matrix surround single-channel gain

Total Harmonic distortion
Output noise voltage
Residual output noise voltage
Reference power supply output voltage

Reference power supply
output current capacity

Channel balance

Input impedance
Output impedance
Ripple rejection ratio
Input high level voltage
Input low level voltage

Measurement performed using Matsushita Communication Industrial VP-9690A DIN AUDIO filter (average value wave detection, effective value display).

∗

Not designed for radiation resistance.
Signal input occurs in equiphase.

THD
V

VM

Vref

Iref

G

R

R

RR
V
V

NO

CB

OUT

1

NO

−1.5

IN

IH

IL

Vrms

Vo=1

Vo=0.5Vrms, BPF=400Hz~30kHz
No signal, VOL=Max.,
No signal, VOL=−

∞

, Rg=0

Rg=0

Iref=3mA
Vref

>

3.7V

channel 1 taken as the standard for
measurements.

f=1kHz
f=1kHz
f=100Hz, V

RR

=1Vrms

SCL, SDA
SCL, SDA

∗

∗
∗

Audio ICs

Measurement circuit

!!!!

BH3856S / BH3856FS

V

VAIN11

THD

T1

S1
31

2

V

VAOUT1

10µF10µF

10µF

10k

S3

12

V

VAIN1

V

VOUT1

CC

I V

S5

21

V

CC

4.7k

10µF

A

C1

C2

C3

C4

S6

12

V

CC

0.1µF

0.1µF

2200pF

2200pF

30k

1

2

3

4

5.1k

5

6

7

2.1k 2.1k

8

9

10

V

CC

11

200k

12

13

14

15

+−

(Bass)

Volume

Tone

(Treble)

−

+

Volume Volume

30k

+−

47k

47k

Volume

Matrix surround

Control

Reference voltage

+−

Fig.1

V

CC

BH3856S

(Bass) (Treble)

Tone

−

+

5.1k

30k
30k

30k

30k

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

1000µF

µ

F

0.1

0.1µF

2200pF

2200pF

VVC1

VVC2

VTC

VBC

S4

4.7k

10µF

10µF

Units : R [Ω]

C [F]

0.47µF0.47µF

21

V V

VAIN2

10µF

V

VOUT2

10k

S7
12

1.2k

S2

2

VAOUT2

31

VAIN22

V

THD

T2

V

V1

Note : Diagram depicts the BH3856S.

Audio ICs

Performing data settings

!!!!

2

(1) I

C BUS timing

Parameter Symbol Min. Typ. Max. Unit

SCL clock frequency
SCL clock hold time, HIGH state
SCL clock hold time, LOW state
SDA and SDL signal start-up time

SDA and SDL signal shut-down time
Set-up time for re-send [start] conditions
Hold time (re-send) [start] conditions

(After hold time ends, initial clock
pulse is generated.)

Set time for [stop] conditions.
Bus free time between [stop] condition

and [start] condition
Data set-up time

SLC

SCL

HIGH

LOW

0 − 100 kHzf
4 −−µst

4.7 −−µst

−−1 µstr

−−0.3 µstf

SU;STA

HD;STA

SU;STO

BUF

SU;DAT

tr tf

4.7 −−µst

4 −−µst

4.7 −−µst

4.7 −−µst

250 −−nst

BH3856S / BH3856FS

SDA start condition

SDA stop condition

SDA

t

SU ; STA
HD ; STA

t

SU ; STO

t

t

LOW

t

SU ; DAT

= start code set-up time.

= start code hold time.
= stop code set-up time.

t

HIGH

t

SU ; STA

t

SU ; STO

I2C BUS timing rules

t

HD ; STA

t

BUF

t

HD ; DAT

t

BUF

= bus free time.

SU ; DAT

= data set-up time.

t

HD ; DAT

= data hold time.

t

Audio ICs

(2) I2C BUS data format

MSB LSB MSB LSB MSB LSB

ASAAP

Slave address

1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit

• S = start condition (start bit recognition)

• Slave address = IC recognition. Upper 7 bits are random. Bottom bit is “L” for the sake of overwrite.

• A = acknowledge bit (recognition of acknowledgment)

• Select address = selection between volume, bass, treble and matrix surround.

• Data = volume and tone data

• P = stop condition (stop bit recognition)

(3) BH3856S / BH3856FS slave address

MSB LSB

A6 A5 A4 A3 A2 A1 A0

• Slave address selection

1) A = 1 (10000010) [SASS pin HIGH]

2) A = 0 (10000000) [SASS pin LOW]

Select address Data

R/W

0000001

A

BH3856S / BH3856FS

(4) Interface protocol

1) Basic protocol

ASAAP

Slave address

MSB LSB MSB LSB MSB LSB

Select address Data

2) Auto increment (Select address increases (+1) by the value of the data.)

S

Slave address

MSB LSB MSB LSB MSB LSB

AA

Select address

Data 1, data 2,...data N

(Example 1) The address data specified by select address is taken as data 1.
(Example 2) The address data specified by select address +1 is taken as data 2.
(Example 3) The address data specified by select address +N−1 is taken as data N.

3) Structure with which transmission is not possible (In this case, only select address 1 is set.)

A

Slave address

S

MSB LSB MSB LSB MSB LSB MSB LSBMSB LSB

A

Select address 1

A

Data

Select address 2

Note : Following transmission of data, data transmitted as select address
2 will not be recognized as select address 2, but as data.

A

P

Data

A

A

P

Audio ICs

(5) Specification of select address and data

Function

0 Volume ch1 (L)

1 Volume ch2 (R)

2 Bass

3 Treble

4 Surround

∗

The auto increment function cycles the select address in the manner shown in Figure A.

(Fig. A)

∗

0 → 1 →

↑ ↓

4 ← ← ←

The cycle commences from the initially specified select address.

MSB

0
0
0
0
0

2

3

Select address

0

0
0
0
0
0000100

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

(6) Surround data

MSB LSB

LSB

0

0

0

1

1

0

1

1

D6

VL7D7VL6

VR7 VR6 VR5 VR4

0 0 BA5 BA4
0 0 TR5 TR4
0000

BH3856S / BH3856FS

Data

D5

VL5

D4

VL4

D2 D1 D0

D3

VL2 VL1 VL0

VL3
VR3

VR2

BA3

BA2
TR2

TR3

0

0

VR1
BA1
TR1

0

VR0
BA0
TR0
SR0

Function

Matrix surround OFF
Matrix surround ON

(7) Matrix surround

Input

Input

L →

R →

MSB LSB

D6

D7

0
00000001

+

+

D5

0000000

+

+

+

Data

D4

Output

(2L−R)

D2 D1 D0

D3

+

×1

×1

+

Output

(2R−L)

BH3856S / BH3856FS

Audio ICs

(8) Volume attenuation (reference values)

ATT
(dB)

0FF −19 −56

−1

−2

−3

−4

−5

−6

−7

−8

−9

−10

−11

−12

−13

−14

−15

−16

−17

−18

Note : All figures in this table are reference values. When using this IC, check this table carefully and perform the appropriate setting.

DATA
(HEX)

E4 −20
D8 −60
CF −62
C8 −64
C2 −66
BD −68
B8 −70
B2 −72
AD −74
A9 −76
A5 −78
A0
9C
98
94
90
8C
89

ATT DATA
(dB) (HEX)

85
82

−22

−24

−26

−28

−30

−32

−34

−36

−38

−40

−42

−44

−46

−48

−50

−52

−54

7C
78
74
70
6D
6A
68
65
61
5C
59
55
52
4E
4B
48
45

ATT DATA
(dB) (HEX)

−58

−80

−82

−84

−86

−90

−100

−112

42
3F

3C

39
36
34
32

2F
2D
2A

28

26

24

22

20
1E
1A

13

00

(9) Bass / Treble gain settings (reference values)

ATT
(dB) (HEX) (dB) (HEX)

15 3F 0
14
13
12
11
10

9
8
7
6
5
4
3
2
1
0

Notes : (1) The gain values in the treble and bass data setting tables above are based on the assumption that the filter constants have
been set so that maximum and minimum gain are equal to the peak and bottom values listed in the frequency characteristics
drawings.
(2) All figures in this table are reference values. When using this IC, check this table carefully and perform the appropriate setting.

DATA ATT DATA

1F
38 −1
35
33
31
2F
2E

2D
2C

2B
2A
29
27
26
25
1F

−2

−3

−4

−5

−6

−7

−8

−9

−10

−11

−12

−13

−14

−15

1C

1B

19

18

17

16

15

13

12

11

0F

0D

0B

08

05

Audio ICs

Application example

!!!!

BH3856S / BH3856FS

30k

1

0.47µF 0.47µF

C1

C2

C3

C4

10µF

CC

V

33µF

DGND

MICRO

COMPUTER

0.1µF

0.1µF

2200pF

2200pF

2

3

4

5

6

7

8

9

10

11

12

13

14

15

(Bass)

5.1k

(Treble)

2.1k 2.1k

CC

V

200k

30k

+

−

Tone

Volume

Matrix surround

−

+

Volume

+

47k

Control

Reference voltage

−

47k

+

Volume

Volume

VCC

−

(Bass) (Treble)

5.1k

Tone

−

+

30k
30k

30k

30k

BH3856S

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

10µF

C1

C2

C3

C4

0.22µF

0.22µF

0.033µF

3.3µF

10µF

AGND

0.1µF

0.1µF

2200pF

2200pF

AGND

DGND

10µF

Note : Diagram depicts the BH3856S.

Fig.2

BH3856S / BH3856FS

Audio ICs

Operation notes

!!!!

(1) Operating power supply voltage range
As long as the operating power supply voltage and ambient temperature are kept within the specified range, the basic
circuits are guaranteed to function, but be sure to check the constants as well as the element settings, voltage settings,
and temperature settings.

(2) Bass filter

C1

BVO

−3dB

R1

5.1kΩ

0.1µF

C2

0.1µF

R2

BVNBIN

50kΩ

−

+

IC internal BIAS

1

Vcc

()

2

∗

B.P.F. composed of multiple feedback active f0 can be varied according to the value of C.BIN

IC internal BIAS

1

Vcc

()

2

(theoretical equation)

1

f0 = ×

2π

R

2

G = × 1 +

5kΩ

(When R

1.0 × 10

f0 =

1

R1R2C1C

C

1

C

2

1

= 5.1kΩ, R2 = 50kΩ, C1 = C2 = C)

−5

C

1
2

2

−1

Q 1.57

Q × (C1 + C2)

R2C1C

Note : Filter gain is calculated using the equation on the left. Total output
gain is the sum of the gain for each of the internal circuits.

G = 5.0

1
2

1

2

−1

0

f

∆f

Frequency f: (Hz)

Audio ICs

(3) About the treble filter

R1

2.1kΩ

C3

2200pF

C4

2200pF

TVO

TVNTIN

R2
25kΩ

BH3856S / BH3856FS

−3dB

−

+

4

−1

IC internal BIAS

1

Vcc

()

2

1
2

Q × (C3 + C4)

Note : The filter gain is given by the formula on the left, but the total output gain
is determined by the this in combination with the internal circuit.

R

R2C3C

1

G = 2.5

Frequency f: (Hz)

f

0

∆f

1
2

4

−1

IC internal BIAS

1

Vcc

()

2

∗

The band-pass filter is constructed using a multiple-feedback active filter.

f

0

can be varied by changing the value of the capacitors.

(Theoretical formulas)

1

f0 = ×

2π

R

2

G = × 1 +

5kΩ

(When R

2.2 × 10

f0 =

1

R1R2C3C

C

3

C

4

1

= 2.1kΩ, R2 = 25kΩ, C3 = C4 = C)

−5

C

Q 1.73

(4) I2C BUS control
High-frequency digital signals are input on the SCL and SDA terminals, so ensure that the wiring and PCB pattern is
designed in such a way as to ensure that these signals do not interfere with the analog signal system.
If you are not using I

2

C BUS control (i.e. you are using DC control), connect the SCL, SDA and SASS terminals to GND

(do not leave them disconnected).

(5) Step switching noise
The VC1, VC2, TC, BC and SC terminals have components connected to them the application example. The values of
these components may need to be changed depending on the signal level setting and PCB pattern.
Investigate carefully before deciding on the values of the various circuit constants.
The equivalent circuit for these terminals is given below (an integrator circuit is set at the first stage to slow the variation).

Each Pin

R

C

+

−

VC1, VC2, BC, TC
SC

R value (kΩ)

30

200

(6) Volume and tone level settings
This specification sheet gives reference values for the amount of attenuation and gain with respect to the serial control
data. The internal D / A convertor is an R-2R circuit, and data exists for the places where continuous variation does not
occur between data. Use this when fine setting is required. The setting limits are up to 8 bits for volume (256 steps) and 6
bits (64 steps) for tone.

BH3856S / BH3856FS

Audio ICs

(7) Digital / analog separation
The digital and analog power supplies and grounds for this IC (BH3856) are completely separate. The digital circuits are
supplied from a stable reference source that is on the chip (V
timing shifts, on interference due to digital noise.

(8) Matrix surround

Input

L →

+

+

+

+

Output

(2L-R)

+

+

Input

R →

∗

The matrix surround circuit construction is as shown in the diagram above. The gain is obtained from the formulas

×1

×1

+

Output

(2R-L)

in the diagram.

ref

(3.8V)). For this reason, there is no need to worry about

Phase Gain
Negative Phase Gain

0dB
6dB

(However, reverse-phase gain is for input to one channel only)

(9) DC control
An internal impedance of 30kΩ is seen from the VC1, VC2, TC and BC terminals, are 200kΩ is seen from the SC (pin 11)
terminal, so with regard to DC control, we recommend direct control with the voltage source. When using variable volume,
take the impedance into consideration when making the setting.
Note : The DC control voltage range is 0V to V
Do not apply voltages above V

ref

ref

.

to the terminals.

(10) GND

• As shown in the application circuit example, connect the external component GND to the analog GND.

• However, the GND for the capacitor connected to the V

• If a capacitor with goof high-frequency characteristics is connected in parallel with the capacitor connected to V

ref

terminal should be connected to the digital GND.

ref

, the

performances of the circuit with respect to static noise will improve (we recommend a ceramic capacitor of between

0.001µF and 0.1µF)

• When using long digital and analog ground lines, take care to ensure that there is no potential difference between the
two ground lines.

Audio ICs

Electrical characteristic curves

!!!!

24
22
20

(mA)

18

Q

16
14
12
10

8
6
4

QUIESCENT CURRENT : I

2
0

56

POWER SUPPLY VOLTAGE : VCC

78910

Fig. 3 Quiescent curve vs.
Power supply voltage

External dimensions

!!!!

R

(Units : mm)

L

= 10kΩ

(V)

BH3856S / BH3856FS

1

(%)

0.4

0.1

0.04

TOTAL HARMONIC DISTORTION : THD

0.01

−40 −30 0 10−20 −10
INPUT VOLTAGE : VIN

VCC = 9V
f = 1kHz

(dBV)

Fig.4 Total harmonic distortion vs.
Input voltage

25
20
15

(dB)

10

BT

5
0

−5

−10

VOLTAGE GAIN : G

−15

−20

−25

10 100 1k 10k 100k

FREQUENCY : f

(Hz)

VCC = 9V

L

= 10kΩ

R

Fig. 5 Output gain vs. Frequency

BH3856S

0.51Min.

0.3

±

4.7

0.2

±

3.2

BH3856FS

28.0

±

0.3

30

1.778

SDIP30

16

0.3

±

8.4

151

0.5

±

0.1

10.16

0°~15°

0.3±0.1

7.8±0.3

1.8±0.1

13.6±0.2

32

5.4±0.2

1

0.8

0.11

0.36±0.1

17

16

0.15±0.1

0.3Min.

0.15

SSOP-A32