Pin 2 is in electrical contact with the mounting base.
1
2
3
absolute maximum ratings at 25°C case temperature (unless otherwise noted)
RATINGSYMBOLVALUEUNIT
BD543
Collector-base voltage (I
Collector-emitter voltage (I
Emitter-base voltageV
Continuous collector currentI
Peak collector current (see Note 1)I
Continuous device dissipation at (or below) 25°C case temperature (see Note 2)P
Continuous device dissipation at (or below) 25°C free air temperature (see Note 3)P
Operating free air temperature rangeT
Operating junction temperature rangeT
Storage temperature rangeT
Lead temperature 3.2 mm from case for 10 secondsT
NOTES: 1. This value applies for tp ≤ 0.3 ms, duty cycle ≤ 10%.
2. Derate linearly to 150°C case temperature at the rate of 0.56 W/°C.
3. Derate linearly to 150°C free air temperature at the rate of 16 mW/°C.
E
= 0)
= 0)
B
BD543A
BD543B
BD543C
BD543
BD543A
BD543B
BD543C
V
V
CBO
CEO
EBO
C
CM
tot
tot
A
j
stg
L
MDTRACA
40
60
80
100
40
60
80
100
5V
8A
10A
70W
2W
-65 to +150°C
-65 to +150°C
-65 to +150°C
260°C
V
V
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
Page 2
BD543, BD543A, BD543B, BD543C
NPN SILICON POWER TRANSISTORS
JUNE 1973 - REVISED MARCH 1997
electrical characteristics at 25°C case temperature
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
BD543
V
(BR)CEO
I
CES
I
CEO
I
EBO
h
V
CE(sat)
V
h
|hfe|
Collector-emitter
breakdown voltage
Collector-emitter
cut-off current
Collector cut-off
current
Emitter cut-off
current
Forward current
FE
transfer ratio
Collector-emitter
saturation voltage
Base-emitter
BE
voltage
Small signal forward
fe
current transfer ratio
Small signal forward
current transfer ratio
= 30 mA
I
C
IB = 0
(see Note 4)
V
= 40 V
CE
= 60 V
V
CE
= 80 V
V
CE
= 100 V
V
CE
VCE= 30 V
= 60 V
V
CE
= 5 VIC= 01mA
V
EB
V
= 4 V
CE
= 4 V
V
CE
= 4 V
V
CE
I
= 0.3 A
B
= 1 A
I
B
= 1.6 A
I
B
= 4 VIC= 5 A(see Notes 4 and 5)1.4V
V
CE
= 10 VIC= 0.5 Af = 1 kHz20
V
CE
= 10 VIC= 0.5 Af = 1 MHz3
V
CE
V
BE
V
BE
V
BE
V
BE
I
B
I
B
I
C
I
C
I
C
I
C
I
C
I
C
= 0
= 0
= 0
= 0
= 0
= 0
= 1 A
= 3 A
= 5 A
= 3 A
= 5 A
= 8 A
NOTES: 4. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%.
5. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts.
resistive-load-switching characteristics at 25°C case temperature
PARAMETERTEST CONDITIONS
Turn-on timeIC = 6 A
t
on
t
Turn-off time1µs
off
†
Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.
V
BE(off)
= -4 V
I
B(on)
R
= 5 Ω
L
= 0.6 A
†
I
= -0.6 A
B(off)
= 20 µs, dc ≤ 2%
t
p
MINTYPMAXUNIT
0.6µs
PRODUCT INFORMATION
2
Page 3
BD543, BD543A, BD543B, BD543C
NPN SILICON POWER TRANSISTORS
TYPICAL CHARACTERISTICS
JUNE 1973 - REVISED MARCH 1997
TYPICAL DC CURRENT GAIN
vs
COLLECTOR CURRENT
1000
VCE = 4 V
TC = 25°C
tp = 300 µs, duty cycle < 2%
100
- DC Current Gain
FE
h
10
1·0
0·11·010
IC - Collector Current - A
Figure 1. Figure 2.
TCS633AI
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
BASE CURRENT
10
1·0
0·1
- Collector-Emitter Saturation Voltage - V
CE(sat)
V
0·01
0·0010·010·11·010
IB - Base Current - A
TCS633AE
IC = 300 mA
IC = 1 A
IC = 3 A
IC = 6 A
BASE-EMITTER VOLTAGE
vs
COLLECTOR CURRENT
1·2
VCE = 4 V
TC = 25°C
1·1
1·0
0·9
0·8
- Base-Emitter Voltage - V
BE
V
0·7
0·6
0·11·010
IC - Collector Current - A
Figure 3.
TCS633AF
PRODUCT INFORMATION
3
Page 4
BD543, BD543A, BD543B, BD543C
NPN SILICON POWER TRANSISTORS
JUNE 1973 - REVISED MARCH 1997
MAXIMUM SAFE OPERATING REGIONS
MAXIMUM FORWARD-BIAS
10
1·0
- Collector Current - A
0·1
C
I
SAFE OPERATING AREA
SAS633AF
BD543
BD543A
BD543B
0·01
1·0101001000
BD543C
VCE - Collector-Emitter Voltage - V
Figure 4.
THERMAL INFORMATION
MAXIMUM POWER DISSIPATION
vs
CASE TEMPERATURE
80
70
60
50
40
30
TIS633AD
20
- Maximum Power Dissipation - W
tot
P
10
0
0255075100125150
TC - Case Temperature - °C
PRODUCT INFORMATION
4
Figure 5.
Page 5
BD543, BD543A, BD543B, BD543C
Version 1, 18.0 mm. Version 2, 17.6 mm.
NPN SILICON POWER TRANSISTORS
JUNE 1973 - REVISED MARCH 1997
MECHANICAL DATA
TO-220
3-pin plastic flange-mount package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
TO220
3,96
ø
3,71
see Note B
see Note C
0,97
0,61
10,4
10,0
123
1,70
1,07
2,74
2,34
5,28
4,88
2,95
2,54
6,1
3,5
4,70
4,20
1,32
1,23
6,6
6,0
15,90
14,55
14,1
12,7
0,64
0,41
2,90
2,40
NOTES: A. The centre pin is in electrical contact with the mounting tab.
B. Mounting tab corner profile according to package version.
C. Typical fixing hole centre stand off height according to package version.
PRODUCT INFORMATION
VERSION 2 VERSION 1
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBE
5
Page 6
BD543, BD543A, BD543B, BD543C
NPN SILICON POWER TRANSISTORS
JUNE 1973 - REVISED MARCH 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.