Datasheet BD5424EFS Datasheet (ROHM)

Middle Power Class-D Speaker Amplifiers

Analog Input / BTL Output Class-D Speaker Amplifier

BD5424EFS

●Description

BD5424EFS is a 20W + 20W stereo class-D power amplifier IC, developed for space-saving and low heat-generation applications such as low-profile TV sets. The IC employs state-of-the-art Bipolar, CMOS, and DMOS (BCD) process technology that eliminates turn-on resistance in the output power stage and internal loss due to line resistances up to an ultimate level. With this technology, the IC has achieved high efficiency of 91% (10W + 10W output with 8Ω load), which is the top class in the industry. The IC, in addition, employs a compact back-surface heat radiation type power package to achieve low power consumption and low heat generation and eliminates necessity of installing an external radiator, up to a total output of 40W. This product satisfies both needs for drastic downsizing, low-profile structures and powerful, high-quality playback of the sound system.

●Features

1) A high efficiency of 91% (10W + 10W output with 8Ω load), which is the highest grade in the industry and low heat-generation.

2) An output of 20W + 20W (17V, with 8Ω load) is allowed without an external heat radiator.

3) Driving a lowest rating load of 3.6Ω is allowed.

4) Pop noise upon turning power on/off and power interruption has been reduced.

5) High-quality audio muting is implemented by soft-switching technology.

6) An output power limiter function limits excessive output to speakers.

7) High-reliability design provided with built-in protection circuits against high temperatures, against VCC shorting and GND shorting, against reduced-voltage, and against applying DC voltage to speaker.

8) A master/slave function allowing synchronization of multiple devices reduces beat noises.

9) Adjustment of internal PWM sampling clock frequencies (350kHz to 500kHz) allows easy protective measures against unwanted radio emission to AM radio band.

10) A compact back-surface heat radiation type power package is employed.

HTSSOP-A44 (5mm × 7.5mm × 1.0mm, pitch 0.8mm)

●Absolute Maximum Ratings

A circuit must be designed and evaluated not to exceed absolute maximum rating in any cases and even momentarily, to prevent reduction in functional performances and thermal destruction of a semiconductor product and secure useful life and reliability.

The following values assume Ta =25℃. For latest values, refer to delivery specifications.

No.10075EBT04

Parameter

Supply voltage VCC +20 V

Power dissipation Pd

Input voltage for signal pin VIN -0.2 ~ +7.2 V Pin 1, 44 (Note 1)

Input voltage for control pin VCONT -0.2 ~ Vcc+0.2 V Pin 20, 24 (Note 1)

Input voltage for clock pin VOSC -0.2 ~ +7.2 V Pin 23 (Note 1)

Operating temperature range Topr -40 ~ +85 ℃

Storage temperature range Tstg -55 ~ +150 ℃

Maximum junction temperature Tjmax +150 ℃

(Note 1) A voltage that can be applied with reference to GND (pins 11, 12, 33, 34, and 43) (Note 2) Pd and Tjmax=150℃ must not be exceeded. (Note 3) 70mm × 70mm × 1.6mm FR4 One-sided glass epoxy board (Back copper foil 0%) installed. If used under Ta=25℃ or higher, reduce 16mW for increase of every 1℃. The board is provided with thermal via. (Note 4) 70mm × 70mm × 1.6mm FR4 Both-sided glass epoxy board (Back copper foil 100%) installed. If used under Ta=25℃ or higher, reduce 36mW for increase of every 1℃. The board is provided with thermal via.

Symbol Ratings Unit Conditions

Pin 7, 8, 15, 16, 29, 30, 37, 38, 40 (Note 1, 2)

2.0 W (Note 3)

4.5 W (Note 4)

1/17

2010.05 - Rev.B

BD5424EFS

●Operating Conditions

The following values assume Ta =25℃. Check for latest values in delivery specifications.

Technical Note

Parameter

Supply voltage VCC +10 ~ +18 V Pin 7, 8, 15, 16, 29, 30, 37, 38, 40

Minimum load resistance RL 3.6 Ω (Note 5)

(Note 5) Pd should not be exceeded.

●Electrical Characteristics

Except otherwise specified T For latest values, refer to delivery specifications.

Parameter

Whole circuit

Circuit current 1 (Sampling mode) ICC1 30 mA With no signal

Circuit current 2 (Muting mode) ICC2 12 mA MUTEX = “L”

Control circuit

“H” level input voltage VIH 2.3 ~ 12 V SDX, MUTEX, MS

“L” level input voltage VIL 0 ~ 0.8 V SDX, MUTEX, MS

Audio circuit

Symbol Ratings Unit Conditions

a = 25℃, VCC = 12V, fIN = 1kHz, Rg = 0Ω, RL = 8Ω, MUTEX="H", MS="L", SDX="H".

Symbol Limits Unit Conditions

Voltage gain GV 28 dB PO = 1W

Maximum output power 1 (Note 6) PO1 10 W THD+N = 10%

Maximum output power 2 (Note 6) PO2 20 W Vcc=17V, THD+N = 10%

Total harmonic distortion (Note 6) THD 0.1 % PO = 1W, BW=20Hz ~ 20kHz

Crosstalk CT 85 dB PO = 1W, Rg = 0Ω, BW = IHF-A

Output noise voltage (Sampling mode) VNO 80 µVrms Rg = 0Ω, BW = IHF-A

Residual noise voltage (Muting mode) VNOM 35 µVrms Rg = 0Ω, BW = IHF-A, MUTEX = “L”

Mute Attenuation Gvm 98 dB Po =1W, BW =IHF-A, MUTEX = “L”

Internal sampling clock frequency FOSC 350 kHz MS = “L” (In master operation)

(Note 6) The rated values of items above indicate average performances of the device, which largely depend on circuit layouts, components, and power supplies. The reference values are those applicable to the device and components directly installed on a board specified by us.

2/17

2010.05 - Rev.B

BD5424EFS

r

●Electrical characteristic curves (Reference data)

(1) Under Stereo Operation (R

L=8Ω)

100

Vcc=12V RL=8Ω

10

BW=20～20kHz

1

THD+N (%)

0.1

0.01

0.001 0.01 0.1 1 10 100

OUTPUT POWER (W)

6kHz

1kHz

100Hz

Fig. 1 THD+N － Output powe

40

35

30

25

20

15

10

VOLTAGE GAIN (dB)

Vcc=12V

L

=8Ω

R Po=1W L=33µH C=0.47µF Cｇ=0.1µF

5

0

10 100 1000 10000 100000

FREQUENCY (Hz)

Fig. 3 Voltage gain - Frequency Fig. 4 Crosstalk - Frequency

-20

-40

0

Vcc=12V

L

=8Ω

R fin=1kHz BW=20～20kHz

-60

CROSSTALK (dB)

-80

-100

0.001 0.01 0.1 1 10 100 OUTPUT POWER (W)

Fig. 5 Crosstalk - Output powe

Technical Note

100

Vcc=12V

L

=8Ω

10

1

THD+ N (%)

0.1

0.01 10 100 1000 10000 100000

FREQUENCY (Hz)

Fig. 2 THD+N － Frequency

0

-20

-40

-60

CROSSTALK (dB)

-80

-100 10 100 1000 10000 100000

FREQUENCY (Hz)

25

20

RL=8Ω fin=1kHz

THD=10%

15

10

5

OUTPUT POWER (W)

0

8 101214161820

VCC (V)

Fig. 6 Output power - Power supply voltage

R Po=1W BW=20～20kHz

Vcc=12V

L

=8Ω

R Po=1W BW=20～20kHz

THD=1%

3/17

2010.05 - Rev.B

BD5424EFS

r

●Electrical characteristic curves (Reference data) – Continued

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

Vcc=10V

L

=8Ω

R fin=1kHz

0

0 5 10 15 20

OUTPUT POWER (W/ch)

Fig. 7 Efficiency - Output powe

100

90 80 70 60 50 40 30

EFFICIENCY (%)

Vcc=18V

L

R

=8Ω

fin=1kHz

20 10

0

0 5 10 15 20 25

OUTPUT POWER (W/ch)

Fig. 9 Efficiency - Output powe

100

90

RL=8Ω

Without signal

80

無信号時

70 60 50 40

ICC (mA)

30 20

Sampling

Mute

10

0

81012141618

VCC (V)

Fig. 11 Current consumption - Power supply voltage Fig. 12 FFT of Output Noise Voltage

Technical Note

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20

OUTPUT POWER (W/ch)

Fig. 8 Efficiency - Output powe

3

Vcc=18V

2

Vcc=10V

ICC (A)

1

0

0 5 10 15 20 25 30 35 40 45 50

Fig. 10 Current consumption - Output powe

0

-20

-40

-60

-80

-100

NOISE FFT (dBV)

-120

-140 10 100 1000 10000 100000

Vcc=12V

TOTAL OUTPUT POWER (W)

Vcc=12V

L

R

=8Ω

Without signal

無信号時 BW=20～20kHz

FREQUENCY (Hz)

Vcc=12V

L

R

=8Ω

fin=1kHz

RL=8Ω fin=1kHz

4/17

2010.05 - Rev.B

BD5424EFS

●Electrical characteristic curves (Reference data) – Continued

MUTEX

Pin 20

TM

Pin 26

10V/div

5V/div

Vcc=12V R

=8

L

Po=500mW fin=500Hz

MUTEX

Pin 20

Ω

TM

Pin 26

Technical Note

10V/div

5V/div

Vcc=12V R

L

Po=500mW fin=500Hz

=8

Ω

Speaker

2V/div

output

10msec/div

Fig. 13 Wave form when Releasing Soft-mute Fig. 14 Wave form when Activating Soft-mute

VCCA

VHOLD

Pin 27

TM

Pin 26

Speaker

5V/div

2V/div

output

20msec/div

Fig. 15 Wave form on Instantaneous Power Interruption

(20msec / div)

Soft Clip

Speaker

output

Soft Clip

5V/div

Vcc=12V

=8

R

L

Ω

Po=500mW fin=3kHz

Vcc=12V R

=8

L

Po=5W THD+n=10% fin=1kHz R2=91k

R3=22k

Speaker

2V/div

output

10msec/div

VCCA

VHOLD

Pin 27

TM

Pin 26

Speaker

5V/div

Vcc=12V R Po=500mW

fin=3k Hz

2V/div

output

2msec/div

Fig. 16 Wave form on Instantaneous Power Interruption

(2msec / div)

Ω

Ω Ω

=8

L

Ω

Fig. 17 Wave form on Output Power Limiter function

(Po = 5W)

200μsec/div

5/17

2010.05 - Rev.B

BD5424EFS

r

●Electrical characteristic curves (Reference data) – Continued

(2)Under Stereo Operation (R

30

RL=6Ω

25

fin=1kHz

20

15

10

5

OUTPUT POWER (W)

0

8 101214161820

Fig. 18 Output power - Power supply voltage

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20 25

OUTPUT POWER (W/ch)

Fig. 19 Efficiency - Output powe

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20 25 30

OUTPUT POWER (W/ch)

Fig. 21 Efficiency - Output powe

Dotted lines of the graphs indicate continuous output power to be obtained on musical signal source or by installing additional heat sinks.

L=6Ω)

THD=10%

VCC (V)

Vcc=10V

L

=6Ω

R fin=1kHz

Vcc=18V

L

=6Ω

R fin=1kHz

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20 25

OUTPUT POWER (W/ch)

Fig. 20 Efficiency - Output power

4

3

Vcc=12V

Vcc=10V

2

ICC (A)

1

0

0 5 10 15 20 25 30 35 40 45 50 55 60

TOTAL OUTPUT POWER (W)

Fig. 22 Current consumption - Output powe

Technical Note

Vcc=12V R fin=1kHz

Vcc=18V

RL=6Ω fin=1kHz

L

=6Ω

6/17

2010.05 - Rev.B

BD5424EFS

r

●Electrical characteristic curves (Reference data) – Continued

(3)Under Stereo Operation (R

30

RL=4Ω fin=1kHz

25

20

15

10

5

OUTPUT POWER (W)

0

8 1012141618

Fig. 23 Output power - Power supply voltage

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20

OUTPUT POWER (W/c h)

Fig. 24 Efficiency - Output powe

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20 25 30 35 40

OUTPUT POWER (W/ch)

Fig. 26 Efficiency - Output powe

Dotted lines of the graphs indicate continuous output power to be obtained on musical signal source or by installing additional heat sinks.

L=4Ω)

THD=10%

VCC (V)

Vcc=10V

L

R

=4Ω

fin=1kHz

Vcc=18V

L

R

=4Ω

fin=1kHz

100

90 80 70 60 50 40 30

EFFICIENCY (%)

20 10

0

0 5 10 15 20

OUTPUT POWER (W/c h)

Fig. 25 Efficiency - Output power

6

5

4

Vcc=10V

Vcc=12V

3

ICC (A)

2

1

0

0 1020304050607080

TOTAL OUTPUT POWER (W)

Fig. 27 Current consumption - Output powe

Technical Note

Vcc=12V

L

=4Ω

R fin=1kHz

Vcc=18V

RL=4Ω fin=1kHz

7/17

2010.05 - Rev.B

BD5424EFS

5

●Pin Assignment

Technical Note

Top View

IN2

44

1

GND A

43

2

GNDA

FIL A

FIL P

VCCA

40

41

42

FIL P

FIL A

Pow er

3

VCCA

PW M 2

PW M 1

Limit

4

5

39

6

VCCP2P

OUT 2P

GND P2

33

12

OUT 2N

32

DRIVER

2N

DRIVER

1N

13

BSP2P

34

35

36

37

38

DRIVER

2P

DRIVER

1P

7

8

9

10

11

OUT 2N

31

14

30

15

VCCP2N

29

16

28

17

VHOLD

BSP2N

TM

ROSC

27

Pow er- of f

Detector

Protecti ons & L ogic

WARNING

18

25

26

Ramp

Generator

Sof t M u te

Under Voltage Protection

H igh T emper atu re Pr otecti on

Mute

ERROR

Control

19

20

SD

MS

24

Output Short Protection

Control

21

OSC

23

Clock

Control

Output DC Voltage Protection

N.C.

22

IN1

PL M T 1

PL M T 3

PL M T 2

BSP1P

PL M T 4

●Outer Dimensions and Inscriptions

44

0.85

1

1.0 MAX

Fig. 29 Outer Dimensions and Inscriptions of HTSSOP-A44 Package

OUT1P

GNDP1

VCCP1P

GNDP1

Fig. 28 Pin Assignment Diagram

18.

±

(MAX 18.85 include BURR)

0.1

(6.0)

BD5424EFS

1PIN MARK

N.C.

OUT1N

VCCP1N

BSP1N

VCCP1N

ERROR

WARNING

SD X

MUTEX

TYPE

23

(5.0)

22

Lot No.

(Unit: mm)

8/17

2010.05 - Rev.B

BD5424EFS

●Explanation of Pin Functions (Provided pin voltages are typical values.)

No.

Symbol Pin voltage Pin description Internal equalizing circuit

ch1 Analog signal input pin

1

44

2 PLMT1 3.5V

IN1 IN2

3.5V

ch2 Analog signal input pin

Input audio signal via a capacitor.

Voltage-to-current conversion pin for output power limiter function

Connect a register.

Technical Note

3 PLMT2 -

4 PLMT3 -

5 PLMT4 3.5V

Current-to-voltage conversion pin for output power limiter function

Connect a register.

Current-to-voltage conversion pin for output power limiter function

Connect a register.

Bias pin for output power limiter function

Connect a register and a capacitor.

9/17

2010.05 - Rev.B

BD5424EFS

●Explanation of Pin Functions - Continued

No. Symbol Pin voltage

6 BSP1P -

Pin description Internal equalizing circuit

ch1 positive bootstrap pin Connect a capacitor.

Technical Note

7, 8 VCCP1P Vcc

9, 10 OUT1P Vcc ~ 0V

11, 12 GNDP1 0V

13, 14 OUT1N Vcc ~ 0V

15, 16 VCCP1N Vcc

17 BSP1N -

ch1 positive power system power supply pin

ch1 positive PWM signal output pin Connect with output LPF.

ch1 power system GND pin

ch1 negative PWM signal output pin Connect with output LPF.

ch1 negative power system power supply pin

ch1 negative bootstrap pin Connect a capacitor.

18 WARNING

19 ERROR

20 MUTEX -

H: 5V

L: 0V

H: 5V

L: 0V

Warning output pin

Pin to notify operation warning. H: Under warning L: Normal operation

Error output pin

A pin for notifying operation errors. H: Error L: Normal operation

Audio mute control pin

H: Mute off L: Mute on

10/17

2010.05 - Rev.B

BD5424EFS

●Explanation of Pin Functions - Continued

No.

Symbol Pin voltage Pin description Internal equalizing circuit

Shutdown control pin

21 SDX -

22 N.C. -

H: Shutdown off L: Shutdown on

N.C. pin Nothing is connected with IC internal circuit.

Technical Note

23 OSC -

24 MS -

25 ROSC 5.6V

Sampling clock signal input/output pin

When using two or more sampling clocks, connect via a capacitor.

Master/Slave switching pin

Switching of master/slave functions on a sampling clock signal. H: Slave operation L: Master operation

Internal PWM sampling clock frequency setting pin

Usually the pin is used open. To adjust an internal sampling clock frequency, connect a resister.

26 TM 0 ~ 5V

Audio muting constant setting pin

Connect a capacitor.

11/17

2010.05 - Rev.B

BD5424EFS

●Explanation of Pin Functions - Continued

No. Symbol Pin voltage

27 HOLD 0.68×Vcc

Pin description Internal equalizing circuit

Instantaneous power interruption detecting voltage setting pin

Connect a capacitor. To adjust a detecting voltage, connect a resister.

Technical Note

28 BSP2N -

29, 30 VCCP2N Vcc

31, 32 OUT2N Vcc ~ 0V

33, 34 GNDP2 0V

35, 36 OUT2P Vcc ~ 0V

37, 38 VCCP2P Vcc

ch2 negative bootstrap pin Connect a capacitor.

ch2 negative power system power supply pin

ch2 negative PWM signal output pin Connect an output LPF.

ch2 power system GND pin

ch2 positive PWM signal output pin Connect an output LPF.

ch2 positive power system power supply pin

39 BSP2P -

40 VCCA Vcc

41 FILP

Vcc+35

12

ch2 positive bootstrap pin Connect a capacitor.

Analog system power pin

PWM system bias pin Connect a capacitor.

12/17

2010.05 - Rev.B

BD5424EFS

●Explanation of Pin Functions - Continued

No.

Symbol Pin voltage Pin description Internal equalizing circuit

Analog signal system bias pin

42 FILA 3.5V

Connect a capacitor.

Technical Note

43 GNDA 0Ｖ

Analog system power supply pin

13/17

2010.05 - Rev.B

BD5424EFS

●Application Circuit Diagram

・Vcc=10V ~ 18V

Technical Note

h

）

c 2

Ω

4

P

(

S

C32

0.68µF

C35

0.15µF

H

5

µ

3

0

L

1

C31

0.15µF

H

1

µ

3

0

L

1

h c

GNDA

2 T

U P N

I

C40

F µ 1

C44

4 4

1

C41

1µF

C42

10µF

3

2

4

A

A L

D

I

N

F

G

r

e w

o P

3

2

C43

10µF

t

i m

i L

+

0.1µF

1 4

P L

I F

4

A

C

V

C

C39 1µF

9

0 4

3

A C C V

2 M W

P

1 M W

P

6

5

C38

P

+

C C V

10µF

C37

0.1µF

5

6

7

8

3

8

7

3

R E

P

V

I

2 R D

R E

P

V

I

1

R D

0

9

1

P D N G

C29

0.1µF

1

3

4 3

1 1

2

3

R E V

I R D

R E V

I R D

2

3

1

0

3

N 2

N 1

5

4 1

1

C28 1µF

9 2

6 1

8 2

c

i g o L

& s

n o

i

t c e

t o

r P

7 1

GNDP

f

f o

r

e w

o P

G N

I N R A

W

F µ 1

. 0

F µ 3

. 3

C27

C26

6

7

2

E T

r o

U

t c

M e

t

T

e

F D

O

S

n o

i

n

t

o

c

i

t

e

t

c

o

e

t

r

o

P

r

e

P

r

e

u

t

g

a

r

t

l

e

o

p

V

m

r

e

T

d n

h g

U

i H

R O R R E

9

8

1

R E

E

T

V

S

A

L

O

S

M

/

I K

L C

Ω

k 2

5

2

2 R

4

5

2

r o

t

p

a r

m

e

a

n

R

e G

n o

i

t

n

c

o

e

i

t

t c

o

r

e

t

P o

r

e

g

P t

a

t

r

l

o

h

V

S t

C

u

D

p

t

u

p

O

t u

O

l o

e

r

t

u

n o

M

C

1

0

2

F µ 1

.

C23

0

3 2

l o

k

r

c

t

o

n

l

o

C

l o

r

t

D

n

S

o C

. C

. N

2 2

Ω

k

1µF

2

C1

2

R2

h c

GNDA

1 T

U P N

I

R3

22kΩ

R4 22kΩ

GNDA

C5

0.1µF

Fig. 30 Circuit Diagram of Stereo Operation with 4Ω Load

C6

1µF

G

T

C7

0.1µF

C8

+

VCCP

10µF

L9

10µH

C9

0.15µF

C10

0.68µF

GNDP

C13

0.15µF

SP 1ch

L13

(4Ω）

C15

0.1µF

C17 1µF

10µH

T

R

N

U

I

P

N

T

R

U

A

O

W

E

U

O

P

R

T

R

U

E

O

D

T

S

U M

14/17

2010.05 - Rev.B

BD5424EFS

Technical Note

Table 1 BOM List of Stereo Operation with 4Ω Load

No. Item Part Number Vendor

1 IC BD5424EFS ROHM HTSSOP-A44 - - - - 1 IC1

2 C GRM21BB31H105KA12 MURATA 2012 0805 1µF 50V ±10% ±10% 4 C6, C17, C28, C39

3 C GRM188R11H104KA93 MURATA 1608 0603 0.1µF 50V ±10% ±10% 5 C7, C15, C29, C37, C40

4 C GRM21BB31H154KA88 MURATA 2012 0805 0.15µF 50V ±10% ±10% 4 C9, C13, C31, C35

5 C GRM188B31C105KA92 MURATA 1608 0603 1µF 16V ±10% ±10% 2 C1, C44

6 C GRM31MR71H684KA88 MURATA 3216 1206 0.68µF 50V ±10% ±15% 2 C10, C32

7 C GRM21BB31E335KA75 MURATA 2012 0805 3.3µF 25V ±10% ±10% 1 C27

8 C GRM188B11E104KA01 MURATA 1608 0603 0.1µF 25V ±10% ±10% 3 C5, C23, C26

9 C GRM21BB11C105KA MURATA 2012 0805 1µF 16V ±10% ±10% 1 C41

10 C GRM21BB31C106KE15 MURATA 2012 0805 10µF 16V ±10% ±10% 1 C42

11 C 25SVPD10M SANYO 6666 2626 10µF 25V ±20% ±25% 3 C8, C38, C43

12 R MCR01MZPF2202 ROHM 1005 0402 22kΩ 50V ±1%

Configuration

mm inch

Value

Rated

voltage

Tolerance

Temperature

characteristics

±200ppm/

℃

Quantity Reference

3 R2, R3, R4,R25

No. Item Part Number Vendor

13 L A7502BY-100M TOKO φ13×16.0 10µH ±20% 30mΩmax. 5.09A max. 4 L9, L13, L31, L35

Configuration

mm

Value Tolerance

DC

Resistance

Rated

DC Current

Quantity Reference

15/17

2010.05 - Rev.B

BD5424EFS

Technical Note

●Notes for use Notes for use

1. About absolute maximum ratings If an applied voltage or an operating temperature exceeds an absolute maximum rating, it may cause destruction of a device. A result of destruction, whether it is short mode or open mode, is not predictable. Therefore, provide a physical safety measure such as fuse, against a special mode that may violate conditions of absolute maximum ratings.

2. About power supply line As return of current regenerated by back EMF of output coil happens, take steps such as putting capacitor between power supply and GND as a electric pathway for the regenerated current. Be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins.

3. Potential of GND (11, 12, 33, 34, and 43 pins) Potential of the GND terminal must be the lowest under any operating conditions.

4. About thermal design Perform thermal design with sufficient margins, in consideration of maximum power dissipation Pd under actual operating conditions. This product has an exposed frame on the back of the package, and it is assumed that the frame is used with measures to improve efficiency of heat dissipation. In addition to front surface of board, provide a heat dissipation pattern as widely as possible on the back also. A class-D power amplifier has heat dissipation efficiency far higher than that of conventional analog power amplifier and generates less heat. However, extra attention must be paid in thermal design so that a power dissipation Pdiss should not exceed the maximum power dissipation Pd.

Maximum power dissipation

Power dissipation

Pd

jmax



θ

 

PP Odiss



  

aj

1

η



W

 



W 1-

  

Tjmax: Maximum temperature junction = 150[℃] Ta: Operating ambient temperature [℃] θja: Package thermal resistance [℃/W] Po: Output power [W] η: Efficiency

Ta-T

5. About operations in strong electric field Note that the device may malfunction in a strong electric field.

6. Thermal shutdown (TSD) circuit This product is provided with a built-in thermal shutdown circuit. When the thermal shutdown circuit operates, the output transistors are placed under open status. The thermal shutdown circuit is primarily intended to shut down the IC avoiding thermal runaway under abnormal conditions with a chip temperature exceeding Tjmax = 150℃.

7. About shorting between pins and installation failure Be careful about direction and displacement of an LSI when installing it onto the board. Faulty installation may destroy the LSI when the device is energized. In addition, a foreign matter getting in between LSI pins, pins and power supply, and pins and GND may cause shorting and destruction of the LSI.

8. About power supply startup and shutdown When starting up a power supply, be sure to place the MUTEX pin (pin 20) and SDX pin (pin 21), at “L” level. When shutting down a power supply also, be sure to place the pin at “L” level. Those processes reduce pop noises generated upon turning on and off the power supply. In addition, all power supply pins must be started up and shut down at the same time.

9. About WARNING output pin (pin 18) and ERROR output pin (pin 19) A WARNING flag is output from the WARNING output pin upon operation of the high-temperature protection function and under-voltage protection function. And an ERROR flag is output from the ERROR output pin upon operation of VCC/GND shorting protection function and speaker DC voltage applying protection function. These flags are the function which the condition of this product is shown in. The use which aimed at the protection except for this product is prohibition.

10. About N.C. pins (pin 22) The N.C. (Non connection) pins are not connected with an internal circuit. Leave the pins open or connect them to GND.

16/17

2010.05 - Rev.B

BD5424EFS

●Ordering part number

Technical Note

B D

Part No.

HTSSOP-A44

1.0MAX

Part No.

18.5±0.1

(MAX 18.85 include BURR)

44 23

9.5±0.2

7.5±0.1

1

0.85

0.85±0.05

1PIN MARK

0.8

0.08±0.05

5 4 2 4

+

0.08

(5.0)

S

4°

S

M

6°

−

4°

0.5±0.15

1.0±0.2

+0.05

0.17

-

0.03

(Unit : mm)

(6.0)

0.37

+0.05

-

0.04

22

E F S

Package

EFS:HTSSOP-44

Embossed carrier tape (with dry pack)Tape

Quantity

Direction of feed

1500pcs E2

The direction is the 1pin of product is at the upper left when you hold

()

reel on the left hand and you pull out the tape on the right hand

Reel

-E 2

Packaging and forming specification E2: Embossed tape and reel

1pin

Order quantity needs to be multiple of the minimum quantity.

∗

Direction of feed

17/17

2010.05 - Rev.B

Notes

No copying or reproduction of this document, in par t or in whole, is permitted without the consent of ROHM Co.,Ltd.

The content specied herein is subject to change for improvement without notice.

The content specied herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specications, which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information specied in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.

The technical information specied herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.

Notice

The Products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).

The Products specied in this document are not designed to be radiation tolerant.

While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any Product, such as derating, redundancy, re control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual.

The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.

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R1010

A