Page 1
SEMICONDUCTOR TECHNICAL DATA
Order this document
by BCP53T1/D
This PNP Silicon Epitaxial transistor is designed for use in audio amplifier
applications. The device is housed in the SOT-223 package which is designed for
medium power surface mount applications.
• High Current: 1.5 Amps
• NPN Complement is BCP56
Motorola Preferred Device
MEDIUM POWER
PNP SILICON
HIGH CURRENT
TRANSISTOR
SURFACE MOUNT
• The SOT-223 Package can be soldered using wave or reflow. The formed leads
absorb thermal stress during soldering, eliminating the possibility of damage to
the die
• Available in 12 mm Tape and Reel
COLLECTOR 2,4
4
Use BCP53T1 to order the 7 inch/1000 unit reel.
Use BCP53T3 to order the 13 inch/4000 unit reel.
MAXIMUM RATINGS
Collector-Emitter Voltage V
Collector-Base Voltage V
Emitter-Base Voltage V
Collector Current I
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Operating and Storage Temperature Range TJ, T
(T
= 25°C unless otherwise noted)
C
Rating
(1)
BASE
1
EMITTER 3
Symbol Value Unit
CEO
CBO
EBO
C
P
D
stg
–65 to 150 °C
1
2
3
CASE 318E-04, STYLE 1
TO-261AA
–80 Vdc
–100 Vdc
–5.0 Vdc
1.5 Adc
1.5
12
Watts
mW/°C
DEVICE MARKING
AH
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance — Junction-to-Ambient (surface mounted) R
Lead T emperature for Soldering, 0.0625″ from case
Time in Solder Bath
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 sq. in.
θJA
T
L
83.3 °C/W
260
10
°C
Sec
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Motorola, Inc. 1996
1
Page 2
BCP53T1
ELECTRICAL CHARACTERISTICS
Characteristics
(T
= 25°C unless otherwise noted)
A
OFF CHARACTERISTICS
Collector-Base Breakdown Voltage (IC = –100 µAdc, IE = 0) V
Collector-Emitter Breakdown Voltage (IC = –1.0 mAdc, IB = 0) V
Collector-Emitter Breakdown Voltage (IC = –100 µAdc, RBE = 1.0 kohm) V
Emitter-Base Breakdown Voltage (IE = –10 µAdc, IC = 0) V
Collector-Base Cutoff Current (VCB = –30 Vdc, IE = 0) I
Emitter-Base Cutoff Current (VEB = –5.0 Vdc, IC = 0) I
ON CHARACTERISTICS
DC Current Gain
(IC = –5.0 mAdc, VCE = –2.0 Vdc)
(IC = –150 mAdc, VCE = –2.0 Vdc)
(IC = –500 mAdc, VCE = –2.0 Vdc)
Collector-Emitter Saturation Voltage (IC = –500 mAdc, IB = –50 mAdc) V
Base-Emitter On Voltage (IC = –500 mAdc, VCE = –2.0 Vdc) V
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
(IC = –10 mAdc, VCE = –5.0 Vdc, f = 35 MHz)
TYPICAL ELECTRICAL CHARACTERISTICS
Symbol Min Typ Max Unit
(BR)CBO
(BR)CEO
(BR)CER
(BR)EBO
CBO
EBO
h
FE
CE(sat)
BE(on)
f
T
–100 — — Vdc
–80 — — Vdc
–100 — — Vdc
–5.0 — — Vdc
— — –100 nAdc
— — –10 µAdc
25
40
25
— — –0.5 Vdc
— — –1.0 Vdc
— 50 — MHz
—
—
—
—
250
—
—
500
VCE = 2 V
200
100
FE
50
h , DC CURRENT GAIN
20
1 3 5 10 30 50 100 300 500 1000
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
1
0.8
V
@ IC/IB = 10
(BE)sat
V
@ VCE = 2 V
(CE)sat
(BE)on
@ IC/IB = 10
10010
V, VOLTAGE (VOLTS)
0.6
0.4
0.2
V
0
1
IC, COLLECTOR CURRENT (mA)
Figure 3. Saturation and “ON” Voltages
1000
500
300
100
50
20
T
f , CURRENT GAIN BANDWIDTH PRODUCT (MHz)
1 10 100
IC, COLLECTOR CURRENT (mA)
Figure 2. Current Gain Bandwidth Product
120
110
100
90
C, CAPACITANCE (pF)
80
70
60
50
40
30
20
10
0
C
ib
C
ob
0
V, VOLTAGE (VOLTS)
Figure 4. Capacitances
VCE = 2 V
1000
2018161412108642
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Page 3
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
POWER DISSIPA TION
BCP53T1
The power dissipation of the SOT-223 is a function of the
input pad size. These can vary from the minimum pad size
for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by T
ture of the die, R
, the maximum rated junction tempera-
J(max)
, the thermal resistance from the device
θJA
junction to ambient; and the operating temperature, TA.
Using the values provided on the data sheet for the SOT-223
package, PD can be calculated as follows.
PD =
T
J(max)
R
θJA
– T
A
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
MOUNTING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
150°C – 25°C
PD =
83.3°C/W
= 1.5 watts
The 83.3°C/W for the SOT-223 package assumes the
recommended collector pad area of 965 sq. mils on a glass
epoxy printed circuit board to achieve a power dissipation of
1.5 watts. If space is at a premium, a more realistic
approach is to use the device at a PD of 833 mW using the
footprint shown. Using a board material such as Thermal
Clad, a power dissipation of 1.6 watts can be achieved using
the same footprint.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.15
3.8
0.079
2.0
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
SOT–223
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.248
0.091
2.3
0.059
1.5
6.3
inches
mm
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
Page 4
BCP53T1
P ACKAGE DIMENSIONS
0.08 (0003)
S
123
L
H
A
F
4
B
D
G
J
C
M
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIMAMIN MAX MIN MAX
0.249 0.263 6.30 6.70
B 0.130 0.145 3.30 3.70
C 0.060 0.068 1.50 1.75
D 0.024 0.035 0.60 0.89
F 0.115 0.126 2.90 3.20
G 0.087 0.094 2.20 2.40
H 0.0008 0.0040 0.020 0.100
J 0.009 0.014 0.24 0.35
K 0.060 0.078 1.50 2.00
L 0.033 0.041 0.85 1.05
M 0 10 0 10
____
S 0.264 0.287 6.70 7.30
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
MILLIMETERS
CASE 318E–04
ISSUE H
TO-261AA
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
Mfax is a trademark of Motorola, Inc.
BCP53T1/D
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