Datasheet BB101C Datasheet (HIT)

Page 1
BB101C
Build in Biasing Circuit MOS FET IC
UHF RF Amplifier
ADE-208-505
Features
Build in Biasing Circuit; To reduce using parts cost & PC board space.
Low noise characteristics; (NF = 2.0 dB typ. at f = 900 MHz)
Rs = 0 conditions.
Outline
1st. Edition
CMPAK–4
2
3
1
4
1. Source
2. Gate1
3. Gate2
4. Drain
Page 2
BB101C
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V Gate 1 to source voltage V
Gate 2 to source voltage V Drain current I
DS
G1S
G2S
D
Channel power dissipation Pch 100 mW Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C
6V +6
V
–0 ±6V 25 mA
2
Page 3
BB101C
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test conditions
Drain to source break down
V
(BR)DSS
6——VI
voltage Gate 1 to source breakdown
V
(BR)G1SS
+6 V IG1 = +10 µA
voltage Gate 2 to source breakdown
V
(BR)G2SS
±6— —V IG2 = +10 µA
voltage Gate 1 to source cutoff current I
Gate 2 to source cutoff current I
Gate 1 to source cutoff voltage V
Gate 2 to source cutoff voltage V
Drain current I
G1SS
G2SS
G1S(off)
G2S(off)
D(op)
+100 nA V
——±100 nA V
0.2 0.8 V VDS = 5 V, V
0.4 1.0 V VDS = 5 V, V
10 15 20 mA VDS = 5 V, VG1 = 5 V
Forward transfer admittance |yfs| 16 22 mS VDS = 5 V, VG1 = 5 V
Input capacitance Ciss 1.2 1.7 2.2 pF VDS = 5 V, VG1 = 5 V Output capacitance Coss 0.7 1.1 1.5 pF V Reverse transfer capacitance Crss 0.012 0.03 pF f = 1 MHz Power gain PG 16 20 dB VDS = 5 V, VG1 = 5 V
Noise figure NF 2.0 3.0 dB RG = 220 k, f = 900 MHz Note: Marking is “AU–”.
= 200 µA
D
V
= V
G1S
V
G2S
V
G1S
G1S
V
G2S
G2S
V
G1S
I
= 100 µA
D
I
= 100 µA
D
V
G2S
V
G2S
R
= 220 k, f = 1 kHz
G
G2S
V
G2S
= 0
G2S
= VDS = 0
= VDS = 0 = +5 V
= VDS = 0 = ±5 V
= VDS = 0
= 4 V
G2S
= 5 V
G1S
= 4 V, RG = 220 k
= 4 V
= 4 V, RG = 220 k
= 4 V
3
Page 4
BB101C
Main Characteristics
Test Circuit for Operating Items (I , |yfs|, Ciss, Coss, Crss, NF, PG)
V
G2 V
Gate 2
Drain
A I
D
D(op)
Gate 1
Source
R
G
G1
Application Circuit
V = 4 to 0.3 V
AGC
BBFET
V = 5 V
DS
Output
Input
R
G
V = 5 V
GG
4
Page 5
200
150
100
50
Maximum Channel Power
Dissipation Curve
25
20
(mA)
D
15
Typical Output Characteristics
V
= 4 V
G2S
V
= V
G1
10
Drain Current I
5
DS
100 k
= 470 k
G
R
BB101C
120 k
150 k
180 k
220 k
270 k
330 k
390 k
Channel Power Dissipation Pch (mW)
0
50 100 150 200
Ambient Temperature Ta (°C)
Drain Current vs.
Gate2 to Source Voltage
25
100 k
120 k
VDS = VG1 = 5 V
20
150 k
(mA)
D
15
180 k
220 k
270 k
= 470 k
R
G
330 k 390 k
G2S
10
Drain Current I
5
0
12345
Gate2 to Source Voltage V
(V)
0
12345
Drain to Source Voltage VDS (V)
Drain Current vs. Gate1 Voltage
20
VDS = 5 V R
= 150 k
G
16
Ω Ω
(mA)
D
12
8
Drain Current I
4
0
12345
4 V
3 V
2 V
V
= 1 V
G2S
Gate1 Voltage VG1 (V)
5
Page 6
BB101C
Drain Current vs.Gate1 Voltege
20
VDS = 5 V R
= 220 k
16
(mA)
12
D
G
8
Drain Current I
4
0
12345
Forward Transfer Admittance
25
VDS = 5 V R
= 150 k
G
fs
20
f = 1 kHz
Gate1 Voltage V
vs. Gate1 Voltage
4 V
3 V
V
G2S
G1
4 V
3 V
= 1 V
(V)
2 V
Drain Current vs.Gate1 Voltege
20
VDS = 5 V R
= 390 k
G
16
(mA)
D
12
8
Drain Current I
4
0
12345
Forward Transfer Admittance
25
VDS = 5 V R
= 220 k
G
fs
20
f = 1 kHz
V
G2S
Gate1 Voltage VG1 (V)
vs. Gate1 Voltage
4 V
3 V
4 V
3 V
2 V
= 1 V
15
2 V
10
5
V
= 1 V
Forward Transfer Admittance |y | (mS)
0
12345
Gate1 Voltage V
G2S
G1
(V)
15
2 V
10
5
V
= 1 V
Forward Transfer Admittance |y | (mS)
0
12345
Gate1 Voltage V
G2S
G1
(V)
6
Page 7
BB101C
Forward Transfer Admittance
vs. Gate1 Voltage
25
VDS = 5 V R
= 390 k
G
fs
20
f = 1 kHz
4 V
3 V
15
2 V
10
5
V
= 1 V
G1
G2S
(V)
Forward Transfer Admittance |y | (mS)
0
12345
Gate1 Voltage V
Noise Figure vs. Gate Resistance
4
3
Power Gain vs. Gate Resistance
30
25
20
15
10
Power Gain PG (dB)
5
VDS = 5 V
V
= 5 V
G1
V
= 4 V
G2S
f = 900 MHz
0
50 100 200 500 1000 2000 5000
Gate Resistance R
(k)
G
Power Gain vs. Drain Current
30
25
20
2
VDS = 5 V
1
Noise Figure NF (dB)
V
= 5 V
G1
V
= 4 V
G2S
f = 900 MHz
0
50 100 200 500 1000 2000 5000
Gate Resistance R
(k)
G
15
VDS = 5 V
10
V
= 5 V
Power Gain PG (dB)
G1
V
= 4 V
G2S
5
R
= variable
G
f = 900 MHz
0
510152025
Drain Current I
(mA)
D
30
7
Page 8
BB101C
Noise Figure vs. Drain Current
4
3
2
VDS = 5 V V
= 5 V
G1
1
Noise Figure NF (dB)
V
= 4 V
G2S
R
= variable
G
f = 900 MHz
0
510152025
Drain Current I
Gain Reduction vs.
Gate2 to Source Voltage
40
30
(mA)
D
VDS = 5 V V
= 5 V
G1
V
= 4 V
G2S
R
= 220 k
G
f = 900 MHz
30
Drain Current vs. Gate Resistance
30
25
20
(mA)
D
15
10
Drain Current I
V = 5 V
DS
5
V = 5 V
G1
V = 4 V
G2S
0
10 30 100 300 1000 3000 10000
Gate Resistance R
(k)
G
Input Capacitance vs.
Gate2 to Source Voltage
4
VDS = 5 V V
= 5 V
G1
R
= 220 k
3
G
f = 1 MHz
20
10
Gain Reduction GR (dB)
0
1234
Gate2 to Source Voltage V
G2S
(V)
5
2
1
Input Capacitance Ciss (pF)
0
1234
Gate2 to Source Voltage V
G2S
5
(V)
8
Page 9
Output Capacitance vs.
Gate2 to Source Voltage
4
VDS = 5 V V
G1
R
3
G
f = 1 MHz
2
1
Output Capacitance Coss (pF)
BB101C
= 5 V
= 220 k
0
1234
Gate2 to Source Voltage V
G2S
5
(V)
9
Page 10
BB101C
Package Dimentions
2.0
1.3
0.65 0.65
3
0.3
+ 0.1 – 0.05
±0.2
Unit: mm
+ 0.1
0.16
+ 0.1
0.3
– 0.05
0.425
2
– 0.06
0.3
+ 0.1 – 0.05
±0.3
1.25
2.1
0.6
1
+ 0.1
0.4
– 0.05
0.425
4
0.65
0 ~ 0.1
1.25
0.2
±0.1
0.9
Hitahi Code
EIAJ
JEDEC
CMPAK-4
SC-82AB
10
Page 11
Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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