Page 1
Features
ESD Protect for 5 Lines with Unidirectional.
Provide Transient protection for each line
directly to
IEC 61000-4-2 (ESD) ±16kV (air), ±10kV (contact)
IEC 61000-4-4 (EFT) 35A (5/50ns)
IEC 61000-4-5 (Lightning) 3.5~6A (8/20µs)
For low operating voltage applications: 5V,
4.2V, 3.3V, and 2.5V etc.
Fast turn-on and Low clamping voltage
Array of surge rated equivalent TVS diodes
Small package saves board space
Solid-state silicon-avalanche and active circuit
triggering technology
Green part available
Applications
Cellular Handsets and Accessories
Small Panel Modules
PDA’s
Portable Devices
Digital Cameras
Touch Panels
Notebooks and Handhelds
MP3 Players
Peripherals
Description
AZ2115-05C is a design which includes surge
rated clamping cell arrays to protect the power
lines or data/control lines in an electronic
systems. The AZ2115-05C has been specifically
designed to protect sensitive components which
are connected to power and control lines from
over-voltage caused by Electrostatic Discharging
(ESD), Electrical Fast Transients (EFT), and
Lightning.
AZ2115-05C is a unique design which includes
proprietary clamping cells in a single package.
During transient conditions, the proprietary
clamping cells prevent over-voltage on the power
lines or control lines, protecting any downstream
components.
AZ2115-05C may be used to meet the ESD
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
immunity requirements of IEC 61000-4-2, Level 4
(±15kV air, ±8kV contact discharge).
Circuit Diagram
1 4
53
6
2
Pin Configuration
6 4
5
1 2 3
SC70-6L (Top View)
(SOT363)
Revision 2011/06/18 ©2011 Amazing Micro.
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SPECIFICATIONS
PARAMETER PARAMETER RATING UNITS
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
ABSOLUTE MAXIMUM RATINGS
6 (pin-1, 3,4,6) Peak Pulse Current (tp =8/20us) IPP
A
3.5 (pin-5)
Operating Supply Voltage (pin-1,-3, -4, -5, -6 to pin-2) VDC 6 V
pin-1,-3, -4, -5, -6 to pin-2 ESD per IEC 61000-4-2 (Air)
pin-1,-3, -4, -5, -6 to pin-2 ESD per IEC 61000-4-2 (Contact)
Lead Soldering Temperature T
Operating Temperature TOP -55 to +85
Storage Temperature T
V
16
ESD-1
260 (10 sec.)
SOL
-55 to +150
STO
10
kV
o
C
o
C
o
C
ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL
CONDITIONS MINI TYP MAX UNITS
Reverse Stand-Off
V
pin-1,-3, -4, -5, -6 to pin-2, T=25 oC. 5 V
Voltage
Reverse Leakage
Current
Reverse
Breakdown Voltage
RWM
I
Leak
VBV
V
= 5V, T=25 oC, pin-1,-3, -4, -5, -6 to
RWM
pin-2.
IBV = 1mA, T=25 oC, pin-1,-3, -4, -5, -6 to
pin-2
2.5
6 9 V
µA
Forward Voltage VF
IF = 15mA, T=25 oC, pin-2 to pin-1,-3, -4, -5,
-6
IPP=5A, tp=8/20us, T=25 oC, pin-1, -3, -4, -6
Surge Clamping
Voltage
V
CL-surge
to pin-2.
IPP=3.5A, tp=8/20us, T=25 oC, pin-5 to
pin-2.
ESD Clamping
Voltage
ESD Dynamic
Turn-on
Resistance
V
R
dynamic
clamp
IEC 61000-4-2 +6kV, T=25 oC,
Contact mode, pin-1,-3, -4, -5, -6 to pin-2.
IEC 61000-4-2 0~+6kV, T=25 oC,
Contact mode, pin-1,-3, -4, -5, -6 to pin-2.
VR = 0V, f = 1MHz, T=25 oC, pin-1,-3, -4, -6
CIN
to pin-2.
Capacitance
VR = 0V, f = 1MHz, T=25 oC, pin-5 to pin-2. 15 17
Revision 2011/06/18 ©2011 Amazing Micro.
0.6 0.85 1 V
6.8
V
6.2
7.8 V
0.15 ΩΩΩΩ
13 15 Channel Input
pF
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Page 3
Typical Characteristics
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
Transmission Line Pulsing (TLP) Measurement
18
16
14
12
10
8
6
4
2
0
Transmission Line Pulsing (TLP) Current (A)
0 2 4 6 8
V_pulse
Pulse from a
transmission line
100ns
TLP_V
TLP_I
+
DUT
-
I/O to GND
Transmission Line Pulsing (TLP) Voltage (V)
16
15
14
13
12
11
10
9
8
7
6
5
4
Input Capacitance (pF)
3
2
1
0
0 1 2 3 4 5
12
11
10
9
8
7
6
5
4
3
Clamping Voltage (V)
I/O pin to GND pin
2
1
0
3.0 3.5 4.0 4.5 5.0 5.5 6.0
Typical Variation of CIN vs. V
pin-5
pin-1, -3, -4, -6
f = 1MHz, T=25 oC,
Input Voltage (V)
Clamping Voltage vs. Peak Pulse Current
Peak pulse Current (A)
IN
Waveform
Parameters:
tr=8µµµµs
td=20µµµµs
Forward Clamping Voltage vs. Peak Pulse Current
5
4
3
2
Waveform
I/O pin to GND pin
1
Forward Clamping Voltage (V)
0
4.5 5.0 5.5 6.0 6.5 7.0
Peak pulse Current (A)
Revision 2011/06/18 ©2011 Amazing Micro.
Parameters:
tr=8µµµµs
td=20µµµµs
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Applications Information
The AZ2115-05C is designed to protect five lines
against System ESD/EFT/Lightning pulses by
clamping them to an acceptable reference.
The usage of the AZ2115-05C is shown in Fig. 1.
Protected lines, such as data lines, control lines,
or power lines, are connected at pin 1, 3, 4, 5 and
6. The pin 2 should be connected directly to a
ground plane on the board. All path lengths
connected to the pins of AZ2115-05C should be
kept as short as possible to minimize parasitic
inductance in the board traces.
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
In order to obtain enough suppression of ESD
induced transient, good circuit board is critical.
Thus, the following guidelines are recommended:
Minimize the path length between the
protected lines and the AZ2115-05C.
Place the AZ2115-05C near the input
terminals or connectors to restrict transient
coupling.
The ESD current return path to ground
should be kept as short as possible.
Use ground planes whenever possible.
NEVER route critical signals near board
edges and near the lines which the ESD
transient easily injects to.
Fig. 2 shows an example of PCB layout with the
AZ2115-05C.
I/O 1
I/O 2
I/O 3
I/O 4
Connector
I/O 5
GND
6 4
1 2 3
5
IC to be protected
Fig. 1
6 4
5
To Connector
1 2 3
To the protected IC
Fig. 2
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Mechanical Details
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
SC70-6L
PACKAGE DIAGRAMS
TOP VIEW
SIDE VIEW
PACKAGE DIMENSIONS
Millimeters
Inches
Symbol
min max min max
A 0.90 1.10 0.036 0.044
A1 0.00 0.10 0.000 0.004
A2 0.875 1.00 0.035 0.040
b 0.15 0.40 0.006 0.016
C 0.08 0.15 0.003 0.006
D 1.90 2.20 0.076 0.087
E 1.15 1.35 0.046 0.054
E1 2.00 2.45 0.080 0.096
e 0.65 BSC 0.026 BSC
e1 1.30 BSC 0.052 BSC
L 0.475 REF 0.019 REF
L1 0.300 REF 0.012 REF
L2 0.200 REF 0.007 REF
END VIEW
θ
0∘ 8∘ 0∘ 8∘
Note:
1. All dimensions are in millimeters, and the
dimensions in inches are for reference only.
2. 1mm = 40 mils = 0.04 inches.
Revision 2011/06/18 ©2011 Amazing Micro.
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LAND LAYOUT
AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection
Dimensions
Index Millimeter Inches
Notes:
This LAND LAYOUT is for reference
purposes only. Please consult your
manufacturing partners to ensure your
company’s PCB design guidelines are met.
MARKING CODE
6 45
A
B
C
D
E
F
Part Number Marking Code
0.40 0.016
0.85 0.033
0.65 0.026
1.85 0.073
1.00 0.039
2.70 0.106
214XY
1 2 3
214 = Device Code
X = Date Code
Y = Control Code
AZ2115-05C 214XY
AZ2115-05C
(Green part)
224XY
Ordering Information
PN# Material Type Reel size MOQ/interal box MOQ/carton
AZ2115-05C.R7G Green T/R 7 inch 4 reel=12,000/box 6 box=72,000/carton
Revision 2011/06/18 ©2011 Amazing Micro.
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Transient Voltage Suppressing Array
Revision History
Revision Modification Description
Revision 2008/03/28 Original Formal Release.
Revision 2008/09/29 Add the marking code for Green part.
Revision 2008/12/26 Update the PACKAGE DIMENSIONS.
Revision 2011/03/02 Update the package drawing of END VIEW.
AZ2115-05C
For ESD/Transient Protection
Revision 2011/06/18
1. Update the Company Logo.
2. Add the Ordering Information.
Revision 2011/06/18 ©2011 Amazing Micro.
7 www.amazingIC.com
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