Datasheet ATTL7583DF, ATTL7583DAJ-D, ATTL7583CF, ATTL7583CAJ-D, ATTL7583BF Datasheet (AGERE)

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Page 1
Data Sheet February 2001
L7583A/B/C/D Line Card Access Switch

Features

Small size/surface-mount packaging
Monolithic IC reliability
Low impulse noise
Clean, bounce-free switching
Low, matched ON-resistance
Built-in current limiting, thermal shutdown, and
SLIC protection
5 V only operation, very low power consumption
Battery monitor, all OFF state upon loss of battery
No EMI
Latched logic level inputs, no driver circuitry
Only one external protector required

Applications

Central office
DLC
PBX
DAML
HFC/FITL
The L7583A/B has seven states: the idle talk state (line break switches closed, all other switches open), the power ringing state (ringing access switches closed, all other switches open), loop access state (loop access switches closed, all switches open), SLIC test state (test in switches closed, all other switches open), simultaneous loop and SLIC access state (loop and test in switches closed, all others open), ringing generator test state (ring test switches closed, all others open), and an all OFF state. The seven states in the L7583A/B are also in the L7583C/D, with an additional simultaneous test­out and ring-test state, making the L7583C/D appro­priate for digital loop carrier and other Bellcore TR-57 applications.
The L7583 offers break-before-make or make­before-break switching, with simple logic level input control. Because of the solid-state construction, volt­age transients generated when switching into an inductive ringing lead during ring cadence or ring trip are minimized, possibly eliminating the need for external zero cross switching circuitry. State control is via logic level inputs, so no additional driver cir­cuitry is required.
The line break switch is a linear switch that has exceptionally low ON-resistance and an excellent ON-resistance matching characteristic. The ringing access switch has a breakdown voltage rating >480 V which is sufficiently high, with proper protec­tion, to prevent breakdown in the presence of a tran­sient fault condition (i.e., passing the transient on to the ringing generator).

Description

The L7583A/B/C/D Line Card Access Switch is a monolithic solid-state device providing the equivalent switching functionality of three 2 form C switches. The L7583 is designed to provide power ringing access, line test access (test out), and SLIC test access (test in) to tip and ring in central office, digital loop carrier, private branch exchange, digitally added main line, and hybrid fiber coax/fiber-in-the-loop ana­log line card applications. An additional pair of solid­state contacts are also available to provide access for testing of the ringing generator.
Incorporated into the L7583A
xx and L7583Cxx is a diode bridge/SCR clamping circuit, current-limiting circuitry, and a thermal shutdown mechanism to pro­vide protection to the SLIC device and subsequent circuitry during fault conditions. This is shown in Fig­ure 1 as version A. Positive and negative lightning is reduced by the current-limiting circuitry and steered to ground via diodes and the integrated SCR. Power cross is also re duced
by the current-limiting and ther-
mal shutdown circuits.
Page 2
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
V
BAT
RBAT
RLINE
NC
F
GND
NC
NC
T
LINE
VDD
SW1
8
9
10
LATCH
R
RINGING
TTESTout
SW2
SW3 SW4
SW5
SW7
SW9
SW8
SW10
SW6
TTESTin
TBAT
TRINGING
NC
IN
TESTin
RTESTout
RTESTin
NC
11
12
IN
RING
DGND
TSD
INTESTout
CONTROL
LOGIC
SCR AND TRIP CKT
L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001
Description (continued)
The L7583B integrated diode bridge along with current limiting and thermal shutdown (see Figure 2 for version B). This will cause positive faults to be directed to ground and neg­ative faults to battery. In either polarity, faults are reduced by the current-limit and/or thermal shutdown mechanisms.
To protect the L7583 from an overvoltage fault condi­tion, use of a secondary protector is required. The sec­ondary protector must limit the voltage seen at the tip/ ring terminals to prevent the breakdown voltage of the switches from being exceeded. To minimize stress on the solid-state contacts, use of a foldback- or crowbar­type secondary protector is recommended. With proper choice of secondary protection, a line card using the L7583 will meet all relevant ITU-T, LSSGR, FCC, or
UL
* protection requirements.
xx and L7583Dxx versions provide only an

Pin Information

The L7583 operates off of a 5 V supply only. This gives the device extremely low idle and active power dissipa­tion and allows use with virtually any range of battery voltage. This makes the L7583 especially appropriate for remote power applications such as DAM L or FOC/ FITL or other Bellcore TA 909 applications where power dissipation is particularly critical.
A battery voltage is also used by the L7583, only as a reference for the integrated protection circuit. The L7583 will enter an all OFF state upon loss of battery.
During power ringing, to turn on and maintain the ON state, the ring access switch and ring test switch will draw a nominal 2 mA or 4 mA from the ring generator.
The L7583A/B/C/D device is packaged in a 24-pin, plastic DIP (L7583AF/BF/CF/DF) and in a 28-pin, plastic SOG (L7583AAJ/BAJ/CAJ/DAJ).
* UL is a registered trademark of Underwriters Laboratories, Inc.
SW2
SW6
SW8
28
27 26
25
24 23
22
21
20 19
18
17
16
15
BAT
V
NC
NC NC
RTESTin RBAT
RLINE
NC
RINGINGNC
R RTESTout LATCH
INTESTin
RING
IN
INTESTout
12-2365.d (F)
12-2364.a (F)
Note: Shown with A/C version protection. The 24-pin DIP is avail-
able with either A/C or B/D version protection.

Figure 1. 24-Pin, Plastic DIP (600 mil)

1
F
GND
2
NC
3
NC
4
NC
TTESTin
TBAT
LINE
T
TRINGING
TTESTout
NC
VDD
TSD
DGND
Note: Shown with B/D version protection. The 28-pin SOG is avail-
able with either A/C or B/D version protection.
SW1
5 6
SW3 SW4
7
SW5
8
SW7
9 10
11
12
13
14
SW9
SW10
CONTROL
LOGIC

Figure 2. 28-Pin, Plastic SOG

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Page 3
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Pin Information (continued)

Table 1. Pin Descriptions

DIP SOG Symbol Description DIP SOG Symbol Description
11F
2 2 NC No connection. 23 27, 26 NC No connection. 3 3, 4 NC No connection. 22 25, 21 NC No connection. 45T 56 T
67T 78T
810T 9 9, 11 NC No connection. 16 18 LATCH Data input control, active-high,
10 12 V 11 13 T
12 14 D
GND Fault ground. 24 28 VBAT Battery voltage. Used as a ref-
erence for protection circuit.
TESTin Test (in) access on TIP . 21 24 RTESTin Test (in) access on RING.
BAT Connect to TIP on SLIC side. 20 23 RBAT Connect to RING on SLIC
side.
LINE Connect to TIP on line side. 19 22 RLINE Connect to RING on line side.
RINGING Connect to return ground for ring-
18 20 RRINGING Connect to ringing generator.
ing generator.
TESTout Test (out) access on TIP. 17 19 RTESTout Test (out) access on RING.
transparent low.
DD 5 V supply. 15 17 INTEST in Logic level switch input control. SD Temperature shutdown pin. Can
14 16 IN
RING Logic level switch input control.
be used as a logic le vel inpu t or an output. See Tables 16 and 17, Truth Tables, and the Switching Behavior section of this data sheet for input pin description. As an output fla g, wi l l r ead 5 V w he n th e device is in its operational mode and 0 V in the thermal shutdown mode. T o disable the thermal shut­down mechanism, tie this pin to 5 V (not recommended).
GND Digital ground. 13 15 INTESTout Logic level switch input control.

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso­lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.

Table 2. Absolute Maximum Ratings

Parameter Min Max Unit
Operating Temperature Range –40 110 °C Storage Temperature Range –40 150 °C Relative Humidity Range 5 95 % Pin Soldering Temperature (t = 10 s max) 260 °C 5 V Power Supply 7 V Battery Supply –85 V Logic Input Voltage 7 V Input-to-output Isolation 330 V Pole-to-pole Isola tion 330 V
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L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001

Handling Precautions

Although protection circuitry has been designed into this device, proper precautions should be taken to avoid expo­sure to electrostatic discharge (ESD) during handling and mounting. Lucent Technologies Microelectronics Group employs a human-body model (HBM) and a charged-device model (CDM) for ESD-susceptibility testing and pro­tection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been adopted for CDM. However, a standard HBM (resistance = 1500 Ω, capacitance = 100 pF) is widely used and therefore can be used for comparison purposes. The HBM ESD thresh­old presented here was obtained by using these circuit parameters.

Table 3. HBM ESD Threshold Voltage

Device Rating
L7583 1000 V

Electrical Characteristics

TA = –40 °C to +85 °C, unless otherwise specified. Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are
the result of engineering evaluations. Typical values are for information purposes only and are not part of the test­ing requirements.

Table 4. Power Supply Specifications

Supply Min Typ Max Unit Supply Min Typ Max Unit
DD 4.5 5 5.5 V VBAT* –19 — –72 V
V
*VBAT is used only as a reference for internal protection circuitry . If VBAT rises above –10 V, the device will enter an all OFF state and remain in
this state until the battery voltage drops below –15 V.

Table 5. Test In Switches, 1 and 2

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage Current:
+25 °C +85 °C –40 °C
ON-resistance:
+25 °C +85 °C –40 °C
Isolation:
+25 °C +85 °C –40 °C
dV/dt Sensitivity*
Vswitch (differential) = –320 V to Gnd
Vswitch (differential) = –60 V to +260 V
Vswitch (differential) = –330 V to Gnd
Vswitch (differential) = –60 V to +270 V
Vswitch (differential) = –310 V to Gnd
Vswitch (differential) = –60 V to +250 V
Iswitch (on) = ±5 mA, ±10 mA Iswitch (on) = ±5 mA, ±10 mA Iswitch (on) = ±5 mA, ±10 mA
Vswitch (both poles) = ±320 V,
Logic inputs = Gnd
Vswitch (both poles) = ±330 V,
Logic inputs = Gnd
Vswitch (both poles) = ±310 V,
Logic inputs = Gnd
——200V/µs
Iswitch Iswitch Iswitch
ON
V
∆ ∆ VON VON
Iswitch Iswitch Iswitch
— — —
— — —
— — —
— — —
45 — 33
— — —
1 1 1
— 70 —
1 1 1
µA µA µA
Ω Ω Ω
µA µA µA
* Applied voltage is 100 Vp-p square wave at 100 Hz.
4 Lucent Technologies Inc.
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Data Sheet February 2001
Electrical Characteristics (continued)

Table 6. Break Switches, 3 and 4

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage
Current:
+25 °C +85 °C –40 °C
ON-resistance:
+25 °C +85 °C –40 °C
ON-resistance Match Per ON-resistance test
ON-state Voltage* Iswitch = I dc Current Limit:
+85 °C –40 °C
Dynamic Current Limit (t = <0.5 µs)
Isolation:
+25 °C +85 °C –40 °C
dV/dt Sensitivity
Vswitch (differential) = –320 V to Gnd
Vswitch (differential) = –60 V to +260 V
Vswitch (differential) = –330 V to Gnd
Vswitch (differential) = –60 V to +270 V
Vswitch (differential) = –310 V to Gnd
Vswitch (differential) = –60 V to +250 V
LINE = ±10 mA, ±40 mA, TBAT = –2 V
T
LINE = ±10 mA, ±40 mA, TBAT = –2 V
T
LINE = ±10 mA, ±40 mA, TBAT = –2 V
T
condition of SW3, SW4
LIMIT @ 50 Hz/60 Hz VON 220 V
Vswitch (on) = ±10 V Vswitch (on) = ±10 V
Break switches in ON state; ringing
access switches OFF; apply ±1000 V at
10/1000 µs pulse; appropriate second-
ary protection in place
Vswitch (both poles) = ±320 V,
Logic inputs = Gnd
Vswitch (both poles) = ±330 V,
Logic inputs = Gnd
Vswitch (both poles) = ±310 V,
Logic inputs = Gnd
200 V/µs
L7583A/B/C /D Line Card Access Swi t ch
Iswitch Iswitch Iswitch
V
ON
V
ON
V
ON
Magnitude
ON SW3 – RON SW4
R
Iswitch Iswitch
Iswitch 2.5 A
Iswitch Iswitch Iswitch
1
1
1
— — —
19.5
14.5
— 28 —
—0.21.0
80————
250mAmA
1
1
1
µA µA µA
Ω Ω Ω
µA µA µA
* This parameter is not tested in production. Choice of secondary protector should ensure this rating is not exceeded.
† Applied voltage is 100 Vp-p square wave at 100 Hz.
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L7583A/B/C/D Line Card Access Switch
Electrical Characteristics (continued)

Table 7. Ring Test Return Switch, 5

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage Current:
+25 °C +85 °C –40 °C
ON-resistance Iswitch (on) = ±0 mA, ±10 mA Isolation:
+25 °C +85 °C –40 °C
dV/dt Sensitivity*
Vswitch (differential) = –320 V to Gnd
Vswitch (differential) = –60 V to +260 V
Vswitch (differential) = –330 V to Gnd
Vswitch (differential) = –60 V to +270 V
Vswitch (differential) = –310 V to Gnd
Vswitch (differential) = –60 V to +250 V
Vswitch (both poles) = ±320 V,
Logic inputs = Gnd
Vswitch (both poles) = ±330 V,
Logic inputs = Gnd
Vswitch (both poles) = ±310 V,
Logic inputs = Gnd
——200V/µs
February 2001
Iswitch Iswitch Iswitch
V
ON —50100
Iswitch Iswitch Iswitch
— — —
— — —
— —
— — —
Data Sheet
µA
1
µA
1
µA
1
µA
1
µA
1
µA
1
* Applied voltage is 100 Vp-p square wave at 100 Hz.

Table 8. Ringing Test Switch, 6

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage Current:
+25 °C
Vswitch (differential) = –60 V to +190 V
Iswitch
1
Vswitch (differential) = +60 V to –190 V
+85 °C
Vswitch (differential) = –60 V to +200 V
Iswitch
1
Vswitch (differential) = +60 V to –200 V
–40 °C
Vswitch (differential) = –60 V to +180 V
Iswitch
1
Vswitch (differential) = +60 V to –180 V
ON-resistance Iswitch (on) = ±70 mA, ±80 mA
V
ON ——20
ON Vo ltage Iswitch (on) = ±1 mA 1.5 V Steady-state Current* 100 mA Release Current 500 µA Isolation:
+25 °C
Vswitch (both poles) = ±320 V,
Iswitch
1
Logic inputs = Gnd
+85 °C
Vswitch (both poles) = ±330 V,
Iswitch
1
Logic inputs = Gnd
–40 °C
Vswitch (both poles) = ±310 V,
Iswitch
1
Logic inputs = Gnd
dV/dt Sensitivity
* Choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded.
† Applied voltage is 100 Vp-p square wave at 100 Hz.
——200V/µs
µA µA µA
µA µA µA
6 Lucent Technologies Inc.
Page 7
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Electrical Characteristics (continued)

Table 9. Ring Return Switch, 7

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage
1
Current:
+25 °C +85 °C –40 °C
Vswitch (differential) = –320 V to Gnd
Vswitch (differential) = –60 V to +260 V
Vswitch (differential) = –330 V to Gnd
Vswitch (differential) = –60 V to +270 V
Vswitch (differential) = –310 V to Gnd
Vswitch (differential) = –60 V to +250 V
Iswitch Iswitch Iswitch
dc Current Limit Vswitch (on) = ±10 V Iswitch 200 mA Dynamic Current Limit
(t = <0.5 µs)
Break and loop switches in OFF state; ring return
switch ON; apply ±1000 V at 10/1000 µs pulse;
Iswitch 2.5 A
appropriate secondary protection in place ON-resistance Iswitch (on) = ±0 mA, ±10 mA ON-state Voltage* Iswitch = I
LIMIT @ 50 Hz/60 Hz VON ——130V
V
Isolation:
+25 °C +85 °C –40 °C
dV/dt Sensitivity
Vswitch (both poles) = ±320 V, Logic inputs = Gnd Vswitch (both poles) = ±330 V, Logic inputs = Gnd Vswitch (both poles) = ±310 V, Logic inputs = Gnd
——200V/µs
Iswitch Iswitch Iswitch
1
1
ON ——100
1
1
1
µA µA µA
µA µA µA
* This parameter is not tested in production. Choice of secondary protector should ensure this rating is not exceeded.
† Applied voltage is 100 Vp-p square wave at 100 Hz.

Table 10. Ringing Access Switch, 8

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage
Current:
+25 °C
Vswitch (differential) = –255 V to +210 V
Iswitch
1
Vswitch (differential) = +255 V to –210 V
+85 °C
Vswitch (differential) = –270 V to +210 V
Iswitch
1
Vswitch (differential) = +270 V to –210 V
–40 °C
Vswitch (differential) = –245 V to +210 V
Iswitch
1
Vswitch (differential) = +245 V to –210 V ON Voltage Iswitch (on) = ±1 mA 3 V Ring Generator Cur-
rent During Ring
Steady-state Current Surge Current
CC = 5 V
V
RING = 1
IN
TESTin = 0
IN
TESTout = 0
IN
150 mA ——2A
I
RING-
SOURCE
—*—mA
Release Current 500 µA ON-resistance Iswitch (on) = ±70 mA, ±80 mA ∆ V
ON ——12
Isolation:
+25 °C +85 °C –40 °C
dV/dt Sensitivity
Vswitch (both poles) = ±320 V, Logic inputs = Gnd Vswitch (both poles) = ±330 V, Logic inputs = Gnd Vswitch (both poles) = ±310 V, Logic inputs = Gnd
200 V/µs
Iswitch Iswitch Iswitch
— — —
— — —
1 1 1
µA µA µA
µA µA µA
* At the time of publication of this data sheet, the current device design will be a nominal 4 mA. Devices are being redesigned to reduce this
current to less than 2 mA nominally. Consult your Lucent Technologies Microelectronics Group account executive for additional details. † Choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded. ‡ Applied voltage is 100 Vp-p square wave at 100 Hz.
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L7583A/B/C/D Line Card Access Switch
Electrical Characteristics (continued)

Table 11. Loop Access Switches, 9 and 10

Parameter Test Condition Measure Min Typ Max Unit
OFF-state Leakage
Current:
+25 °C +85 °C –40 °C
ON-resistance:
+25 °C +85 °C
–40 °C ON-state Voltage* Iswitch = I dc Current Limit:
+85 °C
–40 °C Dynamic Current Limit
(t = <0.5 µs)
Isolation:
+25 °C
+85 °C
–40 °C dV/dt Sensitivity
Vswitch (differential) = –320 V to Gnd
Vswitch (differential) = –60 V to +260 V
Vswitch (differential) = –330 V to Gnd
Vswitch (differential) = –60 V to +270 V
Vswitch (differential) = –310 V to Gnd
Vswitch (differential) = –60 V to +250 V
Iswitch (on) = ±5 mA, ±10 mA Iswitch (on) = ±5 mA, ±10 mA Iswitch (on) = ±5 mA, ±10 mA
LIMIT @ 50 Hz/60 Hz VON ——130 V
Vswitch (on) = ±10 V Vswitch (on) = ±10 V
Break switches in ON state; ringing access
switches OFF; apply ±1000 V at 10/1000 µs pulse;
appropriate secondary protection in place
Vswitch (both poles) = ±320 V, Logic inputs = Gnd Vswitch (both poles) = ±330 V, Logic inputs = Gnd Vswitch (both poles) = ±310 V, Logic inputs = Gnd
Data Sheet
February 2001
µA
1
Iswitch Iswitch Iswitch
Von
Von
Von
Iswitch Iswitch80————250mAmA
Iswitch 2.5 A
Iswitch Iswitch Iswitch
200 V/µs
— — —
— — —
— — —
— —
45 — 33
— — —
1 1
— 70 —
1 1 1
µA µA
Ω Ω Ω
µA µA µA
* This parameter is not tested in production. Choice of secondary protector should ensure this rating is not exceeded.
† Applied voltage is 100 Vp-p square wave at 100 Hz.
8 Lucent Technologies Inc.
Page 9
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Electrical Characteristics (continued)

Table 12. Additional Electrical Characteristics

Parameter Test Condition Measure Min Typ Max Unit
Digital Input Characteristics:
Input Low Voltage ——1.5V
Input High Voltage 3.5 V Input Leakage Current (high) V
Input Leakage Current (low) V
Power Requirements:
Power Dissipation V
DD Current VDD = 5 V,
V
BAT Current VBAT = –48 V,
V
Digital Input Characteristics:
Input Low Voltage 1.5 V Input High Voltage 3.5 V Input Leakage Current (high) V
Input Leakage Current (low) V
Temperature Shutdown Requirements*:
Shutdown Activation Temperature 110 125 150 °C Shutdown Circuit Hysteresis 10 25 °C
DD = 5.5 V, VBAT = –75 V,
Vlogicin = 5 V
DD = 5.5 V, VBAT = –75 V,
Vlogicin = 0 V
DD = 5 V, VBAT = –48 V,
idle/talk state or all OFF state,
ringing state or access state
idle/talk state or all OFF state,
ringing state or access state
idle/talk state or all OFF state,
ringing state or access state
DD = 5.5 V, VBAT = –58 V,
Vlogicin = 5 V
DD = 5.5 V, VBAT = –58 V,
Vlogicin = 0 V
llogicin 1 µA
llogicin 1 µA
DD, IBAT
I
IDD
DD
I IDD
BAT
I IBAT
— —
3 6
——560
0.750
— —
4 4
510mW
mW
900
1.9
1010µA
µA
mA
µA
llogicin 1 µA
llogicin 1 µA
* Temperature shutdown flag (TSD) will be high during normal operation and low during temperature shutdown state.

Zero Cross Current Turn Off

The ring access switch (SW8) is designed to turn off on the next zero current crossing after application of the appropriate logic input control. This switch requires a current zero cross to turn off. Switch 8, once on, will remain in the ON state (regardless of logic input) until a current zero cross. Therefore, to ensure proper operation of switch 8, this switch should be connected, via proper impedance, to the ringing generator or some other ac source. Do not attempt to switch pure dc with switch 8. The ringing test access switch, SW6, also has similar characteristics to switch 8 and should also only be used to switch signals with zero current crossings. For a detailed explanation of the operation of switches 6 and 8, please refer to the
Switches
Application Note.
Lucent Technologies Inc. 9
An Introduction to L758X Series of Line Card Access
Page 10
L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001

Switching Behavior

When switching from the power ringing state to the idle/talk state, via simple logic level input control, the L7583 is able to provide control with respect to the tim­ing when the ringing access contacts are released rela­tive to the state of the line break contacts.
Make-before-break operation occurs when the line break switch contacts are closed (or made) before the ringing access switch contact is opened (or broken). Break-before-make operation occurs when the ringing access contact is opened before the line break switch contacts are closed.
Using the logic level input pins RING, TESTin, and TESTout, either make-before-break or break-before­make operation of the L7583 is easily achie ved. The logic sequences for either mode of operation are given in Table 13 and Table 14. See the Truth Tables (Table 16 and Table 17) for an explanation of logic states.
When using an L758X in the make-before-break mode, during the ring-to-idle transition, for a period of up to one-half the ringing frequency, the ring break switch and the pnpn-type ring access switch can both be in the ON state. This is the maximum time after the logic signal at IN
RING has transitioned that the ring access
switch is waiting for the next zero current cross, so it can close. During this interval, current that is limited to the dc break switch current-limit value will be source from the ring node of the SLIC.
This current is presented to the internal protection cir­cuit. If the SCR-type protector is used (A or C codes), if by random probability the ring-to-idle transition occurs during a portion of the ring cycle when the ringing volt­age exceeds the protection circuit SCR turn-on volt-
age, and if current in excess of the SCR’s turn-on current is also available, the SCR may turn on. Once the SCR is triggered on, if the SLIC is capable of sup­plying current in excess of the holding current, the SCR may be latched on by the SLIC.
The probability of this event depends on the character­istics of the given SLIC and of the holding current of the L7583 A or C device. The SCR hold current distribution is designed to be safely away from the test limit of 80 mA. The higher the distribution, the lower the proba­bility of the latch.
If this situation is of concern for a given board design, either use the A or C series device in the break-before­make mode (eliminates the original 25 ms current pulse) or use a B or D series device (eliminates the SCR).

Table 13. Make-Before-Break Operation

RING TESTin TESTout T
5 V 0 V 0 V Float Power
0 V 0 V 0 V Float Make-
0 V 0 V 0 V Float Idle/Talk Zero cross current
SD State Timing
Open Closed Closed Open
Ringing
SW8 waiting for next before­break
zero current crossing
to turn off maximum
time—one-half of
ringing. In this transi-
tion state, current
that is limited to the
dc break switch cur-
rent-limit v alue will be
sourced f rom the r ing
node of the SLIC.
has occurred.
Break
Switches
3 & 4
Closed Open Closed Open
Closed Open Open Open
Ring
Return
Switch 7
Ring
Access
Switch 8
All Other
Access
Switches
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Page 11
Data Sheet February 2001
Switching Behavior (continued)

Table 14. Break-Before-Make Operation

L7583A/B/C /D Line Card Access Swi t ch
INPUT TESTin TESTout TSD State Timing
5 V 0 V 0 V Float Power
Open Closed Closed Open
Break
Switches
3 & 4
Ring Return Switch
7
Ring
Access
Switch
8
Ringing
5 V 0 V 5 V Float All Off Hold this state for
Open Open Closed Open
25 ms. SW8 waiting
for zero current to turn off.
5 V 0 V 5 V Float All Off Zero cur r e nt has
Open Open Open Open occurred and SW8 has opened.
0 V 0 V 0 V Float Idle/T alk Release break
Closed Open Open Open
switches.
Notes: Break-before-make operation can be achieved using T
force the all OFF state, force T this 25 ms all OFF state, toggle the inputs from 10 (ringing state) to 00 (idle/talk state). After 25 ms, release T input pins which will set the idle talk state.
When using the L7583A/B/C/D in this mode, forcing T 5 V will allow switch control via the logic INPUT pins. However, setting T recommended. Therefore, to allow switch control via the logic INPUT pins, allow T
Thus, when using T switch control via logic input pins and thermal shutdown mechanism is active). This may require use of an open-collector buffer.
Also note that T down mechanism.
SD as an input, the two recommended states are 0 (overrides logic input pins and forces all OFF state) and float (allows
SD operation in L7583 is different than TSD operation of the L7581, where application of 5 V does not disable the thermal shut-
SD to ground. This will override the logic inputs and also force the all OFF state. Hold this state for 25 ms. During
SD as an input. In lines two and three of Table 14, instead of using the logic input pins to
SD to return switch control to the
SD to ground will override the INPUT pins and force an all OFF state. Setting TSD to
SD to 5 V will also disable the thermal shutdown mechanism. This is not
SD to float.
All Other
Switches

Power Supplies

Both the 5 V and battery supply are brought onto the L7583. The L7583 requires only the 5 V supply for switch operation; that is, state control is powered exclu­sively off of the 5 V supply. Because of this, the L7583 offers extremely low power dissipation, both in the idle and active states.
The battery voltage is not used for switch state control. The battery is used as a reference vol tage by the inte­grated secondary protection circuit. When the voltage
BAT or RBAT drops 2 V to 4 V below the battery, the
at T integrated SCR will trigger, thus preventing fault­induced overvoltage situations at the T
BAT/RBAT nodes.

Loss of Battery Voltage

As an additional protection feature, the L7583 monitors the battery voltage. Upon loss of battery voltage, the L7583 will automatically enter an all OFF state and remain in that state until the battery voltage is restored.
The L7583 is designed such that the device will enter
the all OFF state if the battery rises above –10 V and will remain off until the battery drops below –15 V.
Monitoring the battery for the automatic shutdown fea­ture will draw a small current from the battery, typically 4 µA. This will add slightly to the overall power dissipa­tion of the device.

Impulse Noise

Using the L7583 will minimize and possibly eliminate the contribution to the overall system impulse noise that is associated with ringing access switches. Because of this characteristic of the L7583, it may not be necessary to incorporate a zero cross switching scheme. This ultimately depends upon the characteris­tics of the individual system and is best evaluated at the board level.
Lucent Technologies Inc. 11
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L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001

Protection

Integrated SLIC Protection

Diode Bridge/SCR

In the L7583A tion to the SLIC device or other subsequent circuitry is provided by a combination of current-limited break switches, a diode bridge/SCR clamping circuit, and a thermal shutdown mechanism. In the L7583B the L7583D or other subsequent circuitry is provided by a combina­tion of current-limited break switches, a diode bridge, and a thermal shutdown mechanism.
In both protection versions, during a positive lightning event, fault current is directed to ground via steering diodes in the diode bridge. Voltage is clamped to a diode drop above ground. In the A version, negative lightning causes the SCR to conduct when the voltage goes 2 V to 4 V more negative than the battery. Fault currents are then directed to ground via the SCR and steering diodes in the diode bridge.
Note that for the SCR to foldback or crowbar, the ON voltage (see Table 14) of the SCR must be less nega­tive than the battery reference voltage. If the battery voltage is less negative than the SCR ON voltage, the SCR will conduct fault currents to ground; however, it will not crowbar.
In the B/D version, negative lightning is directed to bat­tery via steering diodes in the diode bridge.
For power cross and power induction faults, in both protection versions, the positive cycle of the fault is clamped a diode drop above ground and fault currents steered to ground. In the A/C version, the negative cycle will cause the SCR to trigger when the voltage exceeds the battery reference voltage by 2 V to 4 V. When the SCR triggers, fault current is steered to ground. In the B/D version, the negative cycle of the power cross is steered to battery.

Current Limiting

During a lightning event, the current that is passed through the break switches and presented to the inte­grated protection circuit and subsequent circuitry is lim­ited by the dynamic current-limit response of the break switches (assuming idle/talk state). When the voltage seen at the T an external secondary protector, upon application of a 1000 V , 10 x 1000 pulse (LSSGR lightning), the current seen at the T
magnitude 2.5 A and duration less than 0.5 µs.
xx and the L7583Cxx versions, protec-
xx and
xx versions, protection to the SLIC device
LINE/RLINE nodes is properly clamp ed by
BAT/RBAT nodes will typically be a pulse of
During a power cross event, the current that is passed through the break switches and presented to the inte­grated protection circuit and subsequent circuitry is lim­ited by the dc current-limit response of the break switches (assuming idle/talk state). The dc current limit is specified over temperature between 100 mA and 250 mA. Note that the current-limit circuitry has a nega­tive temperature coefficient. Thus, if the device is sub­jected to an extended power cross, the value of current seen at T
BAT/RBAT will decrease as the device heats
due to the fault current. If sufficient heating occurs, the temperature shutdown mechanism will activate and the device will enter an all off mode.

Temperature Shutdown Mechanism

When the device temperature reaches a minimum of 110 °C, the thermal shutdown mechanism will activate and force the device into an all OFF state, regardless of the logic input pins. Pin T
SD, when used as an out-
put, will read 0 V when the device is in the thermal shutdown mode and +V
DD during normal operation.
During a lightning event, due to the relatively short duration, the thermal shutdown will not typically acti­vate.
During an extended power cross, the device tempera­ture will rise and cause the device to enter the thermal shutdown mode. This forces an all off mode, and the current seen at T
BAT/RBAT drops to zero. Once in the
thermal shutdown mode, the device will cool and exit the thermal shutdown mode, thus reentering the state it was in prior to thermal shutdown. Current, limited to the dc current-limit value, will again begin to flow and device heating will begin again. This cycle of entering and exiting thermal shutdown will last as long as the power cross fault is present. The frequency of entering and exiting thermal shutdown will depend on the mag­nitude of the power cross. If the magnitude of the power cross is great enough, the external secondary protector may trigger shunting all current to ground.
In the L7583, the thermal shutdown mechanism can be disabled by forcing the T
SD pin to +VDD. This functional-
ity is different from the L7581, whose thermal shutdown mechanism cannot be disabled.
Electrical specifications relating to the integrated over­voltage clamping circuit are outlined in Table 15.
1212 Lucent Technologies Inc.
Page 13
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Protection (continued)
Integrated SLIC Protection (continued)

External Seconda ry Pr ot e ct or

With the above integrated protection features, only one overvoltage secondary protection device on the loop side of the L7583 is required. The purpose of this device is to limit fault voltages seen by the L7583 so as not to exceed the breakdown voltage or input-output isolation rating of the device. To minimize stress on the L7583, use of a foldback- or crowbar-type device is rec­ommended. A detailed explanation and design equa­tions on the choice of the external secondary protection device are given in the
of Line Card Access Switches
design equations governing the choice of external sec­ondary protector are given below.
|VBATmax| + |Vbreakovermax| < |Vbreakdownmin(break)|
|Vringingpeakmax| + |VBATmax| + |Vbreakovermax| <
|Vbreakdownmin(ring)|
|Vringingpeakmax| + |VBATmax| < |Vbreakovermin|
An Introduction to L758X Series
Application Note. Basic
where:
BATmax—Maximum magnitude of battery voltage.
V
breakovermax—Maximum magnitude breakover voltage
V of external secondary protector.
breakovermin—Minimum magnitude breakover voltage
V of external secondary protector.
breakdownmin(break)—Minimum magnitude breakdown
V voltage of L7583 break switch.
breakdownmin(ring)—Minimum magnit ude breakdo wn
V voltage of L7583 ring access switch.
ringingpeakmax—Maximum magnitude peak voltage of
V ringing signal.
Series current-limiting fused resistors or PTCs should be chosen so as not to exceed the current rating of the external secondary protector. Refer to the manufac­turer’s data sheet for requirements.

Table 15. Electrical Specifications, Protection Circuitry

Parameters Related to Diodes (in Diode Bridge)
Parameter Test Condition Measure Min Typ Max Unit
Voltage Drop @ Continuous Cur-
rent (50 Hz/60 Hz)
Voltage Drop @ Surge
Current
Apply ±dc curr ent limit
of break switches
Apply ±dynamic cur-
rent limit of break
Forward
Voltage
Forward
Voltage
—— 3 V
—5 — V
switches
Parameters Related to Protection SCR
Surge Current
Gate Trigger Current*
Gate Trigger Current
Tempera-
——2550mA — –0.5 %/°C
A
ture Coefficient
Hold Current 70 mA Gate Trigger Voltage Trigger current V Reverse Leakage Current V ON-State Voltage
§
0.5 A, t = 0.5 µs
2.0 A, t = 0.5 µs
* Previous versions of this data sheet specified a Trigger Current of 50 mA minimum. Trigger Current is defined as the minimum current drawn
from tip and ring to turn on the SCR. The specification in this data sheet is Gate Trigger Current, which is defined as the maximum current that can flow into the battery before the SCR turns on.
† Typical at 25 °C. ‡ Twice ± dynamic current limit of break switches.
§ In some instances, the typical ON-state voltage can range as low as –25 V.
BAT ——1.A
VON
BAT – 4 VBAT – 2 V
— —
–3 –5
— —
V V
Lucent Technologies Inc. 13
Page 14
VBAT
<1 µA
3 V
dc CURRENT-LIMIT
BREAK SWITCHES
V
BAT – 2
V
ON
50 mA
dc CURRENT LIMIT (OF BREAK SWITCHES)
V
BAT – 4
I
H
VBAT
<1 µA
3 V
dc CURRENT-LIMIT
BREAK SWITCHES
dc CURRENT LIMIT (OF BREAK SWITCHES)
V
BAT – 3
L7583A/B/C/D Line Card Access Switch

Typical Performance Characteristics

ILIMIT
Data Sheet
February 2001
+I
CURRENT
LIMITING
2/3 RON

Figure 3. Protection Circuit A/C Version

12-2309.f (F)
–V
2/3 RON
CURRENT
–V
–1.5 V
RON
LIMITING
1.5 V
ILIMIT
–I

Figure 5. Switches 1—5, 7, 9, 10

+I
RON
–VOS
OS
+V
RON
+V
12-2311 (F)
+V
–I
12-2312 (F)

Figure 6. Switches 6, 8

Figure 4. Protection Circuit B/D Version

1414 Lucent Technologies Inc.
12-2309.b (F)
Page 15
Data Sheet February 2001

Application

L7583A/B/C /D Line Card Access Swi t ch
RINGING
TEST RETURN
SW5
VBAT (REFERENCE)
TIP
RING
R1
R2
CROWBAR
PROTECTION
SW9 TEST OUT RINGING
SW10 TEST OUT
RETURN
SW3 BREAK
BREAK SW4
SW8 RINGING ACCESS
RINGING TEST
RING GENERATOR
BATTERY
SW6
SW1SW7 TEST IN
SW2 TEST IN
SCR AND
TRIP
CKT
TIP
BATTERY
FEED
RING
12-2366.d (F)

Figure 7. Typical LCAS Application, Idle, or Talk State Shown (A/C-Type Internal Protection Shown)

Lucent Technologies Inc. 15
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L7583A/B/C/D Line Card Access Switch
February 2001
Application (continued)

Table 16. Truth Table for L7583A/B

IN
RING INTESTin INTESTout TSD TESTin
Switches
0 V
1 1 1 1 1 1 1 1
2
0 V 0 V 0 V 5 V/Float 0 V 0 V 5 V 5 V/Float 0 V 5 V 0 V 5 V/Float 5 V 0 V 0 V 5 V/Float 5 V 5 V 0 V 5 V/Float 0 V 5 V 5 V 5 V/Float 5 V 0 V 5 V 5 V/Float 5 V 5 V 5 V 5 V/Float
Don’t
Care
1. If TSD = 5 V, the thermal shutdown mechanism is disabled. If TSD is floating, the thermal shutdown mechanism is active.
2. Forcing T
3. Idle/Talk state.
4. TESTout state.
5. TESTin state
6. Power ringing state.
7. Ringing generator test state.
8. Simultaneous TESTout and TESTin state.
9. All OFF state.
Don’t
Care
SD to ground overrides the logic input pins and forces an all OFF state.
Don’t
Care
Off On Off Off Off Off Off Off Off On On Off Off Off Off Off Off Off On Off Off Off On Off Off On Off Off Off On Off Off Off Off Off Off Off Off Off Off Off Off Off Off Off
Break
Switches
Ring Test Switches
Ring
Switches
Data Sheet
TESTout
Switches
3 4 5 6 7 8 9 9 9
A parallel in/parallel out data latch is integrated into the L7583A/B. Operation of the data latch is controlled by the logic level input pin LA TCH. The data input to the latch is the INPUT pin of the L7583A/B, and the output of the data latch is an internal node used for state control.
When the LATCH control pin is at logic 0, the data latch is transparent and data control signals flow directly from INPUT, through the data latch to state control. Any changes in INPUT will be reflected in the state of the switches.
When the LATCH control pin is at logic 1, the data latch is active—the L7583A/B will no longer react to changes at the INPUT control pin. The state of the switches is now latched; that is, the state of the switches will remain as they were when the LATCH input transitioned from logic 0 to logic 1. The switches will not respond to changes in INPUT as long as LATCH is held high.
Note that the T
SD input is not tied to the data latch. TSD is not affected by the LATCH input. TSD input will override
state control via INPUT and LATCH.
16 Lucent Technologies Inc.
Page 17
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Application (continued)

Table 17. Truth Table for L7583C/D

IN
RING INTESTin INTESTout TSD TESTin
Switches
0 V
1 1 1 1 1 1 1 1
2
0 V 0 V 0 V 5 V/Float 0 V 0 V 5 V 5 V/Float 0 V 5 V 0 V 5 V/Float 5 V 0 V 0 V 5 V/Float 5 V 5 V 0 V 5 V/Float 0 V 5 V 5 V 5 V/Float 5 V 0 V 5 V 5 V/Float 5 V 5 V 5 V 5 V/Float
Don’t
Care
1. If TSD = 5 V, the thermal shutdown mechanism is disabled. If TSD is floating, the thermal shutdown mechanism is active.
2. Forcing T
3. Idle/Talk state.
4. TESTout state.
5. TEST in state.
6. Power ringing state.
7. Ringing generator test state.
8. Simultaneous TESTout and TESTin state.
9. All OFF state.
10. S imultaneous TESTout—Ring Test state.
Don’t
Care
SD to ground overrides the logic input pins and forces an all OFF state.
Don’t
Care
Off On Off Off Off Off Off On On Off Off Off Off Off Off Off On Off Off Off On Off Off On Off Off Off On Off Off Off Off Off Off Off On Off On
Off Off Off Off Off
Break
Switches
Ring Test
Switches
Ring
Switches
Off
TESTout
Switches
3
Off
4 5 6 7 8 9
10
9
A parallel in/parallel out data latch is integrated into the L7583C/D. Operation of the data latch is controlled by the logic level input pin LATCH. The data input to the latch is the INPUT pin of the L7583C/D and the output of the data latch is an internal node used for state control.
When the LATCH control pin is at logic 0, the data latch is transparent and data control signals flow directly from INPUT, through the data latch to state control. Any changes in INPUT will be reflected in the state of the switches.
When the LATCH control pin is at logic 1, the data latch is active; the L7583C/D will no longer react to changes at the INPUT control pin. The state of the switches is now latched; that is, the state of the switches will remain as they were when the LATCH input transitioned from logic 0 to logic 1. The switches will not respond to changes in INPUT as long as LATCH is held high.
Note that the T
SD input is not tied to the data latch. TSD is not affected by the LATCH input. TSD input will override
state control via INPUT and LATCH.
Lucent Technologies Inc. 17
Page 18
L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001

Outline Diagrams

24-Pin, Plastic DIP (600 mil)

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics
to assist your design efforts, please contact your Lucent Technologies Sales Representative.
N
1
PIN #1 IDENTIFIER ZONE
2.54 TYP
Number
of Pins
(N)
L
Maximum
Length
(L)
0.58 MAX
B
H
SEATING PLANE
0.38 MIN
Maximum Width
Without Leads
(B)
Maximum Width Including Leads
(W)
W
Maximum Height
Above Board
(H)
24 32.26 13.97 15.49 5.49
5-4410 (F)
18 Lucent Technologies Inc.
Page 19
Data Sheet February 2001
L7583A/B/C /D Line Card Access Swi t ch
Outline Diagrams (continued)

28-Pin, Plastic SOG

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schemat-
ics to assist your design efforts, please contact your Lucent Technologies Sales Representative.
L
N
B
1
PIN #1 IDENTIFIER ZONE
1.27 TYP
Number
of Pins
Maximum Length
(N)
(L)
0.51 MAX
H
SEATING PLANE
0.28 MAX
Maximum Width
Without Leads
(B)
0.10
0.61
Maximum Width Including Leads
(W)
W
Maximum Height
28 18.11 7.62 10.64 2.67
Above Board
(H)
5-4414 (F)
Lucent Technologies Inc. 19
Page 20
L7583A/B/C/D Line Card Access Switch
Data Sheet
February 2001

Ordering Information

Device Part No. Description Package Comcode
ATTL7583AAJ -D Line Card Access Switch 28-Pin SOG (Dry-bagged) 107338626 ATTL7583AAJ-DT* Line Card Access Switch 28-Pin SOG (Tape & Reel, Dry-bagged) 107338659 ATTL7583AF Line Card Access Switch 24-Pin DIP 107338592 ATTL7583BAJ-D Line Card Access Switch 28-Pin SOG (Dry-bagged) 107394355 ATTL7583BAJ-DT* Line Card Access Switch 28-Pin SOG (Tape & Reel, Dry-bagged) 107411563 ATTL7583BF Line Card Access Switch 24-Pin DIP 107394306 ATTL7583CAJ-D Line Card Access Switch 28-Pin SOG (Dry-bagged) 107602229 ATTL7583CAJ-DT* Line Card Access Switch 28-Pin SOG (Tape & Reel, Dry-bagged) 107602245 ATTL7583CF Line Card Access Switch 24-Pin DIP 107602278 ATTL7583DAJ-D Line Card Access Switch 28-Pin SOG (Dry-bagged) 107602328 ATTL7583DAJ-DT* Line Card Access Switch 28-Pin SOG (Tape & Reel, Dry-bagged) 107602344 ATTL7583DF Line Card Access Switch 24-Pin DIP 107602377
*Devices on tape and reel must be ordered in 1000-piece increments.
For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com N. AMERICA:Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286
ASIA PACIFIC:Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Copyright © 2001 Lucent Technologies Inc. All Rights Reserved
February 2001 DS01-111ALC (Replaces DS00-052ALC)
1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) Tel. (65) 778 8833, FAX (65) 777 7495 200233 P. R. China Tel. (86) 21 6440 0468, ext. 325, FAX (86) 21 6440 0652 Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700
Technical Inquiries:GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot),
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