Datasheet ATMEGA168-20PU Specification

8-bit AVR Microcontrollers

ATmega48/V / 88/V / 168/V

DATASHEET SUMMARY

Introduction

The Atmel® ATmega48/V/ 88/V /168/V is a low-power CMOS 8-bit
microcontroller based on the AVR® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the ATmega48/V/
88/V /168/V achieves throughputs close to 1MIPS per MHz. This empowers
system designer to optimize the device for power consumption versus
processing speed.

Feature

High Performance, Low Power Atmel®AVR® 8-Bit Microcontroller Family

• Advanced RISC Architecture

– 131 Powerful Instructions

– Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20MHz

– On-chip 2-cycle Multiplier

• High Endurance Non-volatile Memory Segments

– 4K/8K/16KBytes of In-System Self-Programmable Flash program

Memory

– 256/512/512Bytes EEPROM

– 512/1K/1KBytes Internal SRAM

– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

– Data Retention: 20 years at 85°C/100 years at 25°C

– Optional Boot Code Section with Independent Lock Bits

• In-System Programming by On-chip Boot Program

• True Read-While-Write Operation

– Programming Lock for Software Security

• Atmel® QTouch® Library Support

– Capacitive Touch Buttons, Sliders and Wheels

– QTouch and QMatrix® Acquisition

– Up to 64 sense channels

(1)

Atmel-2545W-ATmega48/V/88/V/168/V_Datasheet_Summary-11/2016

• Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode

– Real Time Counter with Separate Oscillator

– Six PWM Channels

– 8-channel 10-bit ADC in TQFP and QFN/MLF package

• Temperature Measurement

– 6-channel 10-bit ADC in PDIP Package

• Temperature Measurement

– Two Master/Slave SPI Serial Interface

– One Programmable Serial USART

– One Byte-oriented 2-wire Serial Interface (Philips I2C compatible)

– Programmable Watchdog Timer with Separate On-chip Oscillator

– One On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

• Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and

Extended Standby

• I/O and Packages

– 23 Programmable I/O Lines

– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF

• Operating Voltage:

– 2.7 - 5.5V for ATmega48/88/168

– 1.8 - 5.5V for ATmega48V/88V/168V

• Temperature Range:

– -40°C to 85°C

• Speed Grade:

– ATmega48/88/168: 0 - 10MHz @ 2.7V - 5.5V, 0 - 20MHz @ 4.5V - 5.5V

– ATmega48V/88V/168V: 0 - 4MHz @ 1.8V - 5.5V, 0 - 10MHz @ 2.7V - 5.5V

• Power Consumption at 1MHz, 1.8V, 25°C

– Active Mode: 0.3mA

– Power-down Mode: 0.1μA

– Power-save Mode: 0.8μA (Including 32kHz RTC)

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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2

Table of Contents

Introduction......................................................................................................................1

Feature............................................................................................................................ 1

1. Description.................................................................................................................4

2. Configuration Summary............................................................................................. 5

3. Ordering Information .................................................................................................6

3.1. ATmega48/V.................................................................................................................................6

3.2. ATmega88/V.................................................................................................................................7

3.3. ATmega168/V...............................................................................................................................8

4. Block Diagram........................................................................................................... 9

5. Pin Configurations................................................................................................... 10

5.1. Pin-out........................................................................................................................................10

5.2. Pin Descriptions..........................................................................................................................13

6. I/O Multiplexing........................................................................................................15

7. Resources................................................................................................................17

8. Data Retention.........................................................................................................18

9. About Code Examples.............................................................................................19

10. Capacitive Touch Sensing....................................................................................... 20

10.1. QTouch Library........................................................................................................................... 20

11. Packaging Information............................................................................................. 21

11.1. 32-pin 32A.................................................................................................................................. 21

11.2. 32-pin 32M1-A............................................................................................................................22

11.3. 28-pin 28M1................................................................................................................................23

11.4. 28-pin 28P3................................................................................................................................ 24

1. Description

The Atmel AVR® core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers
to be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega48/V/ 88/V /168/V provides the following features: 4K/8K/16Kbytes of In-System
Programmable Flash with Read-While-Write capabilities, 256/512/512bytes EEPROM, 512/1K/1Kbytes
SRAM, 23 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC),
three flexible Timer/Counters with compare modes and PWM, 1 serial programmable USARTs , 1 byte­oriented 2-wire Serial Interface (I2C), a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF
packages) , a programmable Watchdog Timer with internal Oscillator, an SPI serial port, and six software
selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters,
SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents
but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In
Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base
while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O
modules except asynchronous timer and ADC to minimize switching noise during ADC conversions. In
Standby mode, the crystal/resonator oscillator is running while the rest of the device is sleeping. This
allows very fast start-up combined with low power consumption. In Extended Standby mode, both the
main oscillator and the asynchronous timer continue to run.

Atmel offers the QTouch® library for embedding capacitive touch buttons, sliders and wheels functionality
into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and
includes fully debounced reporting of touch keys and includes Adjacent Key Suppression® (AKS™)
technology for unambiguous detection of key events. The easy-to-use QTouch Suite toolchain allows you
to explore, develop and debug your own touch applications.

The device is manufactured using Atmel’s high density non-volatile memory technology. The On-chip ISP
Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega48/V/ 88/V /168/V is a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded control
applications.

The ATmega48/V/ 88/V /168/V is supported with a full suite of program and system development tools
including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and
Evaluation kits.

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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2. Configuration Summary

Features ATmega48/V/ 88/V /168/V

Pin Count 28/32

Flash (Bytes) 4K/8K/16K

SRAM (Bytes) 512/1K/1K

EEPROM (Bytes) 256/512/512

Interrupt Vector Size (instruction word/vector) 1/1/2

General Purpose I/O Lines 23

SPI 2

TWI (I2C) 1

USART 1

ADC 10-bit 15kSPS

ADC Channels 8

8-bit Timer/Counters 2

16-bit Timer/Counters 1

ATmega88/V and ATmega168/V support a real Read-While-Write Self-Programming mechanism. There is
a separate Boot Loader Section, and the SPM instruction can only execute from there. In ATmega48/V,
there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can
execute from the entire Flash.

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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5

3. Ordering Information

3.1. ATmega48/V

Speed [MHz]

(3)

Power Supply [V] Ordering Code

10 1.8V - 5.5V

20 2.7 - 5.5

(2)

ATmega48V-10AUR
ATmega48V-10MUR

(5)

(5)

ATmega48V-10AU
ATmega48V-10MMU
ATmega48V-10MMUR
ATmega48V-10MMH
ATmega48V-10MMHR
ATmega48V-10MU
ATmega48V-10PU

ATmega48-20AUR
ATmega48-20MUR

(5)

(5)

ATmega48-20AU
ATmega48-20MMU
ATmega48-20MMUR
ATmega48-20MMH

(4)

ATmega48-20MMHR
ATmega48-20MU
ATmega48-20PU

(5)

(4)

(4)(5)

(5)

(4)(5)

Package

32A
32M1-A
32A
28M1
28M1
28M1
28M1
32M1-A
28P3

32A
32M1-A
32A
28M1
28M1
28M1
28M1
32M1-A
28P3

(1)

Operational Range

Industrial
(-40°C to 85°C)

Industrial
(-40°C to 85°C)

Note: 

1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for
detailed ordering information and minimum quantities.

2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.

3. Please refer to Speed Grades for Speed vs. V

CC

4. Tape & Reel.

5. NiPdAu Lead Finish.

Package Type

28M1 28-pad, 4 x 4 x 1.0 body, Lead Pitch 0.45mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/

MLF)

28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)

32M1-A 32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/

MLF)

32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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6

3.2. ATmega88/V

Speed [MHz]

(3)

Power Supply [V] Ordering Code

10 1.8V - 5.5V

20 2.7 - 5.5

Note: 

1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for
detailed ordering information and minimum quantities.

2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.

3. Please refer to Speed Grades for Speed vs. V

4. Tape & Reel.

(2)

ATmega88V-10AUR
ATmega88V-10MUR
ATmega88V-10AU
ATmega88V-10MU
ATmega88V-10PU

ATmega88-20AUR
ATmega88-20MUR
ATmega88-20AU
ATmega88-20MU
ATmega88-20PU

CC

(4)

(4)

(4)

(4)

Package

32A
32M1-A
32A
32M1-A
28P3

32A
32M1-A
32A
32M1-A
28P3

(1)

Operational Range

Industrial
(-40°C to 85°C)

Industrial
(-40°C to 85°C)

Package Type

28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)

32M1-A 32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/

MLF)

32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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3.3. ATmega168/V

Speed [MHz]

(3)

Power Supply [V] Ordering Code

10 1.8V - 5.5V

20 2.7 - 5.5

Note: 

1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for
detailed ordering information and minimum quantities.

2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.

3. Please refer to Speed Grades for Speed vs. V

4. Tape & Reel.

(2)

ATmega168V-10AUR(4)
ATmega168V-10MUR(4)
ATmega168V-10AU
ATmega168V-10MU
ATmega168V-10PU

ATmega168-20AUR
ATmega168-20MUR

(4)

(4)

ATmega168-20AU
ATmega168-20MU
ATmega168-20PU

CC

Package

32A
32M1-A
32A
32M1-A
28P3

32A
32M1-A
32A
32M1-A
28P3

(1)

Operational Range

Industrial
(-40°C to 85°C)

Industrial
(-40°C to 85°C)

Package Type

28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)

32M1-A 32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/

MLF)

32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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4. Block Diagram

CPU

USART 0

ADC

ADC[7:0]

AREF

RxD0
TxD0
XCK0

I/O

PORTS

D
A
T
A
B
U
S

GPIOR[2:0]

SRAM

OCD

EXTINT

FLASH

NVM

programming

debugWire

I

N

/
O
U
T

D
A
T
A
B
U
S

TC 0

(8-bit)

SPI 0

AC

AIN0
AIN1

ADCMUX

EEPROM

EEPROMIF

TC 1

(16-bit)

OC1A/B

T1

ICP1

TC 2

(8-bit async)

TWI 0

SDA0
SCL0

Internal

Reference

Watchdog

Timer

Power

management

and clock

control

VCC

GND

Clock generation

8MHz

Calib RC

128kHz int

osc

32.768kHz
XOSC

External

clock

Power
Supervision
POR/BOD &

RESET

XTAL2 /
TOSC2

RESET

XTAL1 /
TOSC1

16MHz LP

XOSC

PCINT[23:0]

INT[1:0]

T0
OC0A
OC0B

MISO0
MOSI0
SCK0
SS0

OC2A
OC2B

PB[7:0]
PC[6:0]
PD[7:0]

ADC6,ADC7,PC[5:0]

AREF

PD[7:0], PC[6:0], PB[7:0]

PD3, PD2

PB1, PB2

PD5
PB0

PB3
PD3

PD4
PD6
PD5

PB4
PB3
PB5
PB2

PD6
PD7

ADC6, ADC7
PC[5:0]

PD0
PD1
PD4

PC4
PC5

Figure 4-1. Block Diagram

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

Atmel-2545W-ATmega48/V/88/V/168/V_Datasheet_Summary-11/2016

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5. Pin Configurations

Power

Ground

Programming/debug

Digital

Analog

Crystal/Osc

(PCINT14/RESET) PC6

(PCINT16/RXD) PD0

(PCINT17/TXD) PD1

(PCINT18/INT0) PD2

(PCINT19/OC2B/INT1) PD3

(PCINT20/XCK/T0) PD4

VCC

GND

(PCINT6/XTAL1/TOSC1) PB6

(PCINT7/XTAL2/TOSC2) PB7

(PCINT21/OC0B/T1) PD5

(PCINT22/OC0A/AIN0) PD6

(PCINT23/AIN1) PD7

(PCINT0/CLKO/ICP1) PB0

PC5 (ADC5/SCL/PCINT13)

PC4 (ADC4/SDA/PCINT12)

PC3 (ADC3/PCINT11)

PC2 (ADC2/PCINT10)

PC1 (ADC1/PCINT9)

PC0 (ADC0/PCINT8)

GND

AREF

AVCC

PB5 (SCK/PCINT5)

PB4 (MISO/PCINT4)

PB3 (MOSI/OC2A/PCINT3)

PB2 (SS/OC1B/PCINT2)

PB1 (OC1A/PCINT1)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

5.1. Pin-out

Figure 5-1. 28-pin PDIP

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

Atmel-2545W-ATmega48/V/88/V/168/V_Datasheet_Summary-11/2016

10

Figure 5-2. 28-pin MLF Top View

1

2

3

4

5

6

7

8

9

10

11

12

13

14

PD2 (INT0/PCINT18)

PD1 (TXD/PCINT17)

PD0 (RXD/PCINT16)

PC6 (RESET/PCINT14)

PC5 (ADC5/SCL/PCINT13)

PC4 (ADC4/SDA/PCINT12)

PC3 (ADC3/PCINT11)

PC2 (ADC2/PCINT10)

PC1 (ADC1/PCINT9)

PC0 (ADC0/PCINT8)

GND

AREF

AVCC

PB5 (SCK/PCINT5)

(PCINT22/OC0A/AIN0) PD6

(PCINT23/AIN1) PD7

(PCINT0/CLKO/ICP1) PB0

(PCINT1/OC1A) PB1

(PCINT2/SS/OC1B) PB2

(PCINT3/OC2A/MOSI) PB3

(PCINT4/MISO) PB4

(PCINT19/OC2B/INT1) PD3

(PCINT20/XCK/T0) PD4

VCC

GND

(PCINT6/XTAL1/TOSC1) PB6

(PCINT7/XTAL2/TOSC2) PB7

(PCINT21/OC0B/T1) PD5

Bottom pad should be

soldered to ground

Power

Ground

Programming/debug

Digital

Analog

Crystal/CLK

21

20

19

18

17

16

15

28

27

26

25

24

23

22

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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11

1

2

3

4

32

31

30

29

28

27

26

5

6

7

8

24

23

22

21

20

19

18

17

25

9

10

11

12

13

14

15

16

Power

Ground

Programming/debug

Digital

Analog

Crystal/CLK

(PCINT19/OC2B/INT1) PD3

(PCINT20/XCK/T0) PD4

GND

VCC

GND

VCC

(PCINT6/XTAL1/TOSC1) PB6

(PCINT7/XTAL2/TOSC2) PB7

PD2 (INT0/PCINT18)

PD1 (TXD/PCINT17)

PD0 (RXD/PCINT16)

PC6 (RESET/PCINT14)

PC5 (ADC5/SCL/PCINT13)

PC4 (ADC4/SDA/PCINT12)

PC3 (ADC3/PCINT11)

PC2 (ADC2/PCINT10)

PC1 (ADC1/PCINT9)

PC0 (ADC0/PCINT8)

ADC7

GND

AREF

ADC6

AVCC

PB5 (SCK/PCINT5)

(PCINT21/OC0B/T1) PD5

(PCINT23/AIN1) PD7

(PCINT0/CLKO/ICP1) PB0

(PCINT1/OC1A) PB1

(PCINT2/SS/OC1B) PB2

(PCINT3/OC2A/MOSI) PB3

(PCINT4/MISO) PB4

Figure 5-3. 32-pin TQFP Top View

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

Atmel-2545W-ATmega48/V/88/V/168/V_Datasheet_Summary-11/2016

12

Figure 5-4. 32-pin MLF Top View

1

2

3

4

32

31

30

29

28

27

26

5

6

7

8

24

23

22

21

20

19

18

17

25

9

10

11

12

13

14

15

16

PD2 (INT0/PCINT18)

PD1 (TXD/PCINT17)

PD0 (RXD/PCINT16)

PC6 (RESET/PCINT14)

PC5 (ADC5/SCL/PCINT13)

PC4 (ADC4/SDA/PCINT12)

PC3 (ADC3/PCINT11)

PC2 (ADC2/PCINT10)

PC1 (ADC1/PCINT9)

PC0 (ADC0/PCINT8)

ADC7

GND

AREF

ADC6

AVCC

PB5 (SCK/PCINT5)

(PCINT21/OC0B/T1) PD5

(PCINT22/OC0A/AIN0) PD6

(PCINT23/AIN1) PD7

(PCINT0/CLKO/ICP1) PB0

(PCINT1/OC1A) PB1

(PCINT2/SS/OC1B) PB2

(PCINT3/OC2A/MOSI) PB3

(PCINT4/MISO) PB4

(PCINT19/OC2B/INT1) PD3

(PCINT20/XCK/T0) PD4

GND

VCC

GND

VCC

Bottom pad should be

soldered to ground

Power

Ground

Programming/debug

Digital

Analog

Crystal/CLK

5.2. Pin Descriptions

5.2.1. VCC

5.2.2. GND

Digital supply voltage.

Ground.

5.2.3. Port B (PB[7:0]) XTAL1/XTAL2/TOSC1/TOSC2

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
B pins are tri-stated when a reset condition becomes active, even if the clock is not running.

Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator
amplifier and input to the internal clock operating circuit.

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator
amplifier.

If the Internal Calibrated RC Oscillator is used as chip clock source, PB[7:6] is used as TOSC[2:1] input
for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.

5.2.4. Port C (PC[5:0])

Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PC[5:0]
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
C pins are tri-stated when a reset condition becomes active, even if the clock is not running.

5.2.5. PC6/RESET

If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical characteristics
of PC6 differ from those of the other pins of Port C.

If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pin for longer
than the minimum pulse length will generate a Reset, even if the clock is not running. Shorter pulses are
not guaranteed to generate a Reset.

The various special features of Port C are elaborated in the Alternate Functions of Port C section.

5.2.6. Port D (PD[7:0])

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
D pins are tri-stated when a reset condition becomes active, even if the clock is not running.

5.2.7. AV

CC

AVCC is the supply voltage pin for the A/D Converter, PC[3:0], and PE[3:2]. It should be externally
connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through
a low-pass filter. Note that PC[6:4] use digital supply voltage, VCC.

5.2.8. AREF

AREF is the analog reference pin for the A/D Converter.

5.2.9. ADC[7:6] (TQFP and VFQFN Package Only)

In the TQFP and VFQFN package, ADC[7:6] serve as analog inputs to the A/D converter. These pins are
powered from the analog supply and serve as 10-bit ADC channels.

Atmel ATmega48/V / 88/V / 168/V [DATASHEET]

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14

6. I/O Multiplexing

Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.

The following table describes the peripheral signals multiplexed to the PORT I/O pins.

Table 6-1. PORT Function Multiplexing

(32-pin
MLF/TQFP)
Pin#

1 1 5 PD[3] INT1 PCINT19 OC2B

2 2 6 PD[4] PCINT20 T0 XCK0

4 3 7 VCC

3 4 8 GND

6 - - VCC

5 - - GND

7 5 9 PB[6] PCINT6 XTAL1/

8 6 10 PB[7] PCINT7 XTAL2/

9 7 11 PD[5] PCINT21 OC0B T1

10 8 12 PD[6] PCINT22 AIN0 OC0A

11 9 13 PD[7] PCINT23 AIN1

12 10 14 PB[0] PCINT0 CLKO ICP1

13 11 15 PB[1] PCINT1 OC1A

14 12 16 PB[2] PCINT2 OC1B SS0

15 13 17 PB[3] PCINT3 OC2A MOSI0

16 14 18 PB[4] PCINT4 MISO0

17 15 19 PB[5] PCINT5 SCK0

18 16 20 AVCC

19 - - ADC6 ADC6

20 17 21 AREF

21 18 22 GND

22 - - ADC7 ADC7

23 19 13 PC[0] PCINT8 ADC0

24 20 24 PC[1] PCINT9 ADC1

25 21 25 PC[2] PCINT10 ADC2

26 22 26 PC[3] PCINT11 ADC3

27 23 27 PC[4] PCINT12 ADC4 SDA0

28 24 28 PC[5] PCINT13 ADC5 SCL0

29 25 1 PC[6]/

(28-pin
MLF) Pin#

(28-pin
PIPD) Pin#

PAD EXTINT PCINT ADC/AC OSC T/C #0 T/C#1USART 0 I2C 0 SPI 0

TOSC1

TOSC2

PCINT14

RESET

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(32-pin
MLF/TQFP)
Pin#

30 26 2 PD[0] PCINT16 RXD0

31 27 3 PD[1] PCINT17 TXD0

32 28 4 PD[2] INT0 PCINT18

(28-pin
MLF) Pin#

(28-pin
PIPD) Pin#

PAD EXTINT PCINT ADC/AC OSC T/C #0 T/C#1USART 0 I2C 0 SPI 0

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7. Resources

A comprehensive set of development tools, application notes, and datasheets are available for download
on http://www.atmel.com/avr.

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8. Data Retention

Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM
over 20 years at 85°C.

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9. About Code Examples

This documentation contains simple code examples that briefly show how to use various parts of the
device. These code examples assume that the part specific header file is included before compilation. Be
aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C
is compiler dependent. Confirm with the C compiler documentation for more details.

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS”
combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

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10. Capacitive Touch Sensing

10.1. QTouch Library

The Atmel® QTouch® Library provides a simple to use solution to realize touch sensitive interfaces on
most Atmel AVR® microcontrollers. The QTouch Library includes support for the Atmel QTouch and Atmel
QMatrix® acquisition methods.

Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library for the
AVR Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors,
and then calling the touch sensing API’s to retrieve the channel information and determine the touch
sensor states.

The QTouch Library is FREE and downloadable from the Atmel website at the following location: http://

www.atmel.com/technologies/touch/. For implementation details and other information, refer to the Atmel
QTouch Library User Guide - also available for download from the Atmel website.

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11. Packaging Information

TITLE

DRAWING NO.

REV.

32A, 32-lead, 7 x 7mm body size, 1.0mm body thickness,

0.8mm lead pitch, thin profile plastic quad flat package (TQFP)

C

32A

2010-10-20

PIN 1 IDENTIFIER

0°~7°

PIN 1

L

C

A1

A2 A

D1

D

e

E1 E

B

Notes:

1. This package conforms to JEDEC reference MS-026, Variation ABA.

2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.

3. Lead coplanarity is 0.10mm maximum.

A – – 1.20

A1 0.05 – 0.15

A2 0.95 1.00 1.05

D 8.75 9.00 9.25

D1 6.90 7.00 7.10 Note 2

E 8.75 9.00 9.25

E1 6.90 7.00 7.10 Note 2

B 0.30 – 0.45

C 0.09 – 0.20

L 0.45 – 0.75

e 0.80 TYP

COMMON DIMENSIONS

(Unit of measure = mm)

SYMBOL

MIN

NOM

MAX

NOTE

11.1. 32-pin 32A

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11.2. 32-pin 32M1-A

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

MIN

NOM

MAX

NOTE

D1

D

E1

E

e

b

A3

A2

A1

A

D2

E2

0.08

C

L

1

2

3

P

P

0

1

2

3

A 0.80 0.90 1.00

A1 – 0.02 0.05

A2 – 0.65 1.00

A3 0.20 REF

b 0.18 0.23 0.30

D

D1

D2 2.95 3.10 3.25

4.90 5.00 5.10

4.70 4.75 4.80

4.70 4.75 4.80

4.90 5.00 5.10

E

E1

E2 2.95 3.10 3.25

e 0.50 BSC

L 0.30 0.40 0.50

P – – 0.60

– – 12o

Note : JEDEC Standard MO-220, Fig . 2 (Anvil Singulation), VHHD-2 .

TOP VIEW

SIDE VIEW

BOTTOM VIEW

0

Pin 1 ID

Pin #1 Notch

(0.20 R)

K 0.20 – –

K

K

32M1-A , 32-pad, 5 x 5 x 1.0mm Bod y, Lead Pitch 0.50mm ,

3.10mm Exposed P ad, Micro Lead Frame P a ckage (MLF)

32M1-A

03/14/2014

F

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11.3. 28-pin 28M1

TITLE

DRAWING NO.GPC

REV.

Package Drawing Co ntact:

packaged rawing s@a tm el.com

28M1ZBV B

28M1,28-pad, 4 x 4 x 1.0mm Body, Lead Pitch 0.45mm,

2.4 x 2.4mm Exposed Pad, Thermally Enha nce d
Plastic Very Thin Quad Flat No Lead Package (VQFN)

10/24/08

SIDE VIEW

Pin 1 ID

BOTTOM VIEW

TOP VIEW

Note:

The ter mi nal #1 ID is a Laser -ma r ked Feat ur e .

D

E

e

K

A1

C

A

D2

E2

y

L

1
2

3

b

1

2

3

0.45

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

MIN

NOM

MAX

NOTE

R 0.20

0.4 Ref
(4x)

A
A1
b
C
D
D2
E
E2
e
L
y
K

0.80 0.90 1.00

0.00 0.02 0.05

0.17 0.22 0.27

0.20 REF

3.95 4.00 4.05

2.35 2.40 2.45

3.95 4.00 4.05

2.35 2.40 2.45

0.45

0.35 0.40 0.45

0.00 – 0.08

0.20 – –

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11.4. 28-pin 28P3

2325 Orchard Parkway
San Jose, CA 95131

TITLE

DRAWING NO.

REV.

28P3 , 28-lead (0.300"/7.62mm Wide) Plastic Dual

Inline Package (PDIP)

B

28P3

09/28/01

PIN

1

E1

A1

B

REF

E

B1

C

L

SEATING PLANE

A

0º ~ 15º

D

e

eB

B2

(4 PLACES)

COMMON DIMENSIONS

(Unit of Measure = mm)

SYMBOL

MIN

NOM

MAX

NOTE

A – – 4.5724

A1 0.508 – –

D 34.544 – 34.798 Note 1

E 7.620 – 8.255

E1 7.112 – 7.493 Note 1

B 0.381 – 0.533

B1 1.143 – 1.397

B2 0.762 – 1.143

L 3.175 – 3.429

C 0.203 – 0.356

eB – – 10.160

e 2.540 TYP

Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25mm (0.010").

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Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)[phone] F: (+1)[phone] | www.atmel.com

©

2016 Atmel Corporation. / Rev.: Atmel-2545W-ATmega48/V/88/V/168/V_Datasheet_Summary-11/2016

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