– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
•
Commercial and Industrial Temperature Ranges
•
Dual-in-Line and Surface Mount Packages in Standard Pinouts
Description
The ATF16LV8C is a high-performanc e EECMOS Program mable Logic Devic e that
utilizes Atm el's pr oven e lectric ally er asab le Flash memory techn ology. Speeds down
to 10 ns and a 5 µA pin-controlled power down mode option are offered. All speed
ranges are specified over the full 3.0V to 5.25V range for industr ial and commercial
temperature ranges.
The ATF16LV8C incorpora tes a superse t of the gener ic
architectures, wh ich allows direct repl acemen t of the 16R8
family and most 20-pin combinatorial PLDs. Ei ght outputs
are each allocated eight produc t terms. Three different
modes of operation, configured automatically with software, allow highly complex logic functions to be realized.
The ATF16LV8C can significantly reduce total system
power, thereby enhancing system reliability and reducing
Block Diagram
Note:1.Includes optional PD control pin.
Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature.....................................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
(1)
(1)
power supply costs. When pi n 4 is confi gur e d as the power
down control pin, supply current drops to less than 5 µA
whenever the pin is high. If the power down feature isn't
required for a particular application, pin 4 may be used as a
logic input. Also, the pin keeper circuits eliminate the need
for internal pull-up resistors along with their attendant
power consumption.
*NOTICE:Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the dev ice . This is a s tress rating only an d
functional oper ation of the device at these o r any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions f or e xtended periods ma y af fect de vice
reliability.
Note:1.Minimum voltage is -0.6V dc, which may under-
shoot to -2.0V for pulses of less than 20 ns. Maximum output pin v oltage is Vcc + 0.75V dc , which
may overshoot to 7.0V for pulses of less than 20
ns.
DC and AC Operating Conditions
Commercial
Operating Temperature (Case)0°C - 70°C
V
Power Supply3.0V to 5.5V
CC
2
ATF16LV8C
Page 3
ATF16LV8C
DC Characteristics
SymbolParameterConditionMinTypMaxUnits
I
I
I
IL
IH
CC1
(1)
Input or I/O Low Leakage Current0 ≤ VIN ≤ VIL(MAX)-10µA
Input or I/O High Leakage Current1.8 ≤ VIN ≤ V
Output Low CurrentVCC = MIN8mA
Output High CurrentVCC = MIN-4mA
Note:1. All ICC parameters measured with outputs open.
AC Waveforms
(1)
VCC = MAX,
V
= 0, V
IN
V
OUT
V
CC
CC
= 0.5V;
= 3V; TA = 25°C
VCC = MIN; All Outputs
I
= 8 mA
OL
= MIN
V
CC
= -500 mA
I
OL
0.15µA
-150mA
0.5V
2.4V
Note:1.Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
3
Page 4
AC Characteristics
SymbolParameter
-10-15
UnitsMinMaxMinMax
t
PD
t
CF
t
CO
t
S
t
H
t
P
t
W
Input or Feedback to Non-Registered Output110115ns
Clock to Feedback58ns
Clock to Output27210ns
Input or Feedback Setup Time712ns
Input Hold Time00ns
Clock Period1216ns
Clock Width68ns
External Feedback 1/(tS+ tCO)71.445.5MHz
F
MAX
t
EA
t
ER
t
PZX
t
PXZ
Internal Feedback 1/(tS + tCF)83.350MHz
No Feedback 1/(t
)83.362.5MHz
P
Input to Output Enable —
Product Ter m
Input to Output Disable —
Product Ter m
OE pin to Output Enable28215ns
OE pin to Output Disable1.581.515ns
Power Down AC Characteristics
310315 ns
210215 ns
(1)(2)(3)
-10-15
SymbolParameter
t
IVDH
t
GVDH
t
CVDH
t
DHIX
t
DHGX
t
DHCX
t
DLIV
t
DLGV
t
DLCV
t
DLOV
Valid Input Before PD High1015ns
Valid OE Before PD High00ns
Valid Clock Before PD High00ns
Input Don't Care After PD High1015ns
OE Don't Care After PD High1015ns
Clock Don't Care After PD High1015ns
PD Low to Valid Input1015ns
PD Low to Valid OE2530ns
PD Low to Valid Clock2530ns
PD Low to Valid Output3035ns
Notes:1. Output data is latched and held.
2. HI-Z output s remain HI-Z.
3. Clock and input transitions are ignored.
MinMaxMinMax
Units
4
ATF16LV8C
Page 5
ATF16LV8C
Input Test Waveforms and
Measurement Levels:
tR, tF < 1.5ns (10% to 90%)
Output Test Loads:
Commercial
3.3V
R1 = 316
R2 = 348
Note:Similar devices are tested with slightly different loads.
These load differences may affect output signals’ delay
and slew rate. Atmel devices are tested with sufficient
margins to meet compatible devices.
Pin Capacitance
(f = 1 MHz, T = 25°C)
C
IN
C
OUT
Note:1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
(1)
TypMaxUnitsConditions
58 pFV
68 pFV
OUTPUT
PIN
CL = 35pF
= 0V
IN
= 0V
OUT
Power Up Reset
The ATF16LV8C’s registers are designed to reset during
power up. At a point delayed slightly from V
, all registers will be re set to th e low st ate. As a r esult,
V
RST
the registered output state will always be high on power-up.
This feature is critical for state machine initialization. How-
ever, due to the asynchronous nature of reset and the
uncertainty of h ow V
actually rises in the sys tem, the fo l-
CC
lowing conditions are required:
1.The V
rise must be monotonic from below 0.7
CC
volts.
2.The signals from which the clock is derived must
remain stable during T