Page 1
Tj
From 75% VDRM up to 3550 A, gate 10V 5ohm
-30 /
standard specification
ANSALDO
Ansaldo Trasporti s.p.a.
Unita' Semiconduttori
PHASE CONTROL THYRISTOR AT737LT
Repetitive voltage up to 2000 V
Mean on-state current 3565 A
Surge current 50.4 kA
FINAL SPECIFICATION
apr 97 - ISSUE : 01
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY
Tel. int. +39/(0)10 6556549 - (0)10 6556488
Fax Int. +39/(0)10 6442510
Tx 270318 ANSUSE I -
Symbol Characteristic Conditions
[°C]
Value Unit
BLOCKING
V RRM Repetitive peak reverse voltage 125 2000 V
V RSM Non-repetitive peak reverse voltage 125 2100 V
V DRM Repetitive peak off-state voltage 125 2000 V
I RRM Repetitive peak reverse current V=VRRM 125 200 mA
I DRM Repetitive peak off-state current V=VDRM 125 200 mA
CONDUCTING
I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 3565 A
I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 2880 A
I TSM Surge on-state current sine wave, 10 ms 125 50.4 kA
I² t I² t without reverse voltage 12701 x1E3 A²s
V T On-state voltage On-state current = 6300 A 25 1.65 V
V T(TO) Threshold voltage 125 0.95 V
r T On-state slope resistance 125 0.127 mohm
SWITCHING
di/dt Critical rate of rise of on-state current, min.
dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 125 500 V/µs
td Gate controlled delay time, typical VD=100V, gate source 25V, 10 ohm , tr=.5 µs 25 3 µs
tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 75% VDRM 320 µs
Q rr Reverse recovery charge di/dt=-20 A/µs, I= 2330 A 125 µC
I rr Peak reverse recovery current VR= 50 V A
I H Holding current, typical VD=5V, gate open circuit 25 300 mA
I L Latching current, typical VD=5V, tp=30µs 25 700 mA
125 200 A/µs
GATE
V GT Gate trigger voltage VD=5V 25 3.5 V
I GT Gate trigger current VD=5V 25 350 mA
V GD Non-trigger gate voltage, min. VD=VDRM 125 0.25 V
V FGM Peak gate voltage (forward) 30 V
I FGM Peak gate current 10 A
V RGM Peak gate voltage (reverse) 5 V
P GM Peak gate power dissipation Pulse width 100 µs 150 W
P G Average gate power dissipation 2 W
MOUNTING
R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 9.5 °C/kW
R th(c-h) Thermal impedance Case to heatsink, double side cooled 2 °C/kW
T j Operating junction temperature
F Mounting force 40.0 / 50.0 kN
Mass 1150 g
ORDERING INFORMATION : AT737LT S 20
VDRM&VRRM/100
125 °C
Page 2
AT737LT PHASE CONTROL THYRISTOR
ANSALDO
FINAL SPECIFICATION apr 97 - ISSUE : 01
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
30°
80
60°
70
60
90°
120°
180°
DC
50
PF(AV) [W]
8000
7000
6000
5000
4000
3000
2000
1000
0 1000 2000 3000 4000 5000
IF(AV) [A]
DC
180°
30°
60°
90°
120°
0
0 1000 2000 3000 4000 5000
IF(AV) [A]
Page 3
AT737LT PHASE CONTROL THYRISTOR
ANSALDO
ANSALDO
FINAL SPECIFICATION apr 97 - ISSUE : 01
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
80
70
60
50
PF(AV) [W]
8000
7000
6000
5000
4000
30°
60°
90°
120°
180°
0 1000 2000 3000 4000 5000
IF(AV) [A]
180°
90°
60°
30°
120°
3000
2000
1000
0
0 1000 2000 3000 4000 5000
IF(AV) [A]
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AT737LT PHASE CONTROL THYRISTOR
ON-STATE CHARACTERISTIC
On-state Current [A]
Zth j-h [°C/kW]
SURGE CHARACTERISTIC
ITSM [kA]
ANSALDO
FINAL SPECIFICATION apr 97 - ISSUE : 01
Tj = 125 °C
12000
10000
8000
6000
4000
2000
0
0.6 1.1 1.6 2.1 2.6
On-state Voltage [V]
Tj = 125 °C
60
50
40
30
20
10
0
1 10 100
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0.001 0.01 0.1 1 10 100
t[s]
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03
mm and roughness < 2 µm.
In the interest of product improvement ANSALDO reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
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