Page 1
Tj
From 75% VDRM up to 3100 A, gate 10V 5ohm
-30 /
standard specification
ANSALDO
Ansaldo Trasporti s.p.a.
Unita' Semiconduttori
PHASE CONTROL THYRISTOR AT706
Repetitive voltage up to 800 V
Mean on-state current 4305 A
Surge current 70 kA
FINAL SPECIFICATION
feb 97 - ISSUE : 02
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY
Tel. int. +39/(0)10 6556549 - (0)10 6556488
Fax Int. +39/(0)10 6442510
Tx 270318 ANSUSE I -
Symbol Characteristic Conditions
[°C]
Value Unit
BLOCKING
V RRM Repetitive peak reverse voltage 125 800 V
V RSM Non-repetitive peak reverse voltage 125 900 V
V DRM Repetitive peak off-state voltage 125 800 V
I RRM Repetitive peak reverse current V=VRRM 125 200 mA
I DRM Repetitive peak off-state current V=VDRM 125 200 mA
CONDUCTING
I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 4305 A
I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 3335 A
I TSM Surge on-state current sine wave, 10 ms 125 70 kA
I² t I² t without reverse voltage 24500 x1E3 A²s
V T On-state voltage On-state current = 10000 A 25 1.5 V
V T(TO) Threshold voltage 125 0.84 V
r T On-state slope resistance 125 0.060 mohm
SWITCHING
di/dt Critical rate of rise of on-state current, min.
dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 125 500 V/µs
td Gate controlled delay time, typical VD=100V, gate source 10V, 10 ohm , tr=.5 µs 25 3 µs
tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 75% VDRM 160 µs
Q rr Reverse recovery charge di/dt=-20 A/µs, I= 2050 A 125 µC
I rr Peak reverse recovery current VR= 50 V A
I H Holding current, typical VD=5V, gate open circuit 25 300 mA
I L Latching current, typical VD=5V, tp=30µs 25 700 mA
125 320 A/µs
GATE
V GT Gate trigger voltage VD=5V 25 3.5 V
I GT Gate trigger current VD=5V 25 250 mA
V GD Non-trigger gate voltage, min. VD=VDRM 125 0.25 V
V FGM Peak gate voltage (forward) 30 V
I FGM Peak gate current 10 A
V RGM Peak gate voltage (reverse) 5 V
P GM Peak gate power dissipation Pulse width 100 µs 150 W
P G Average gate power dissipation 2 W
MOUNTING
R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 11 °C/kW
R th(c-h) Thermal impedance Case to heatsink, double side cooled 2 °C/kW
T j Operating junction temperature
F Mounting force 40.0 / 50.0 kN
Mass 1700 g
ORDERING INFORMATION : AT706 S 08
VDRM&VRRM/100
125 °C
Page 2
AT706 PHASE CONTROL THYRISTOR
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
30°
80
60°
70
60
90°
120°
180°
DC
50
PF(AV) [W]
7000
6000
5000
4000
3000
2000
1000
0 1000 2000 3000 4000 5000 6000
IF(AV) [A]
DC
180°
120°
90°
60°
30°
0
0 1000 2000 3000 4000 5000 6000
IF(AV) [A]
Page 3
AT706 PHASE CONTROL THYRISTOR
ANSALDO
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
30°
80
70
60
60°
90°
120°
180°
50
PF(AV) [W]
7000
6000
5000
4000
3000
2000
1000
0 1000 2000 3000 4000 5000 6000
IF(AV) [A]
180°
120°
90°
60°
30°
0
0 1000 2000 3000 4000 5000 6000
IF(AV) [A]
Page 4
AT706 PHASE CONTROL THYRISTOR
ON-STATE CHARACTERISTIC
On-state Current [A]
Zth j-h [°C/kW]
SURGE CHARACTERISTIC
ITSM [kA]
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
Tj = 125 °C
14000
12000
10000
8000
6000
4000
2000
0
0.6 1 1.4 1.8
On-state Voltage [V]
Tj = 125 °C
70
60
50
40
30
20
10
0
1 10 100
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
12.0
10.0
8.0
6.0
4.0
2.0
0.0
0.001 0.01 0.1 1 10 100
t[s]
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03
mm and roughness < 2 µm.
In the interest of product improvement ANSALDO reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
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