Page 1
Tj
standard specification
ANSALDO
Ansaldo Trasporti s.p.a.
Unita' Semiconduttori
PHASE CONTROL THYRISTOR AT681
Repetitive voltage up to 6000 V
Mean on-state current 840 A
Surge current 10 kA
FINAL SPECIFICATION
feb 97 - ISSUE : 02
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY
Tel. int. +39/(0)10 6556549 - (0)10 6556488
Fax Int. +39/(0)10 6442510
Tx 270318 ANSUSE I -
Symbol Characteristic Conditions
[°C]
Value Unit
BLOCKING
V RRM Repetitive peak reverse voltage 120 6000 V
V RSM Non-repetitive peak reverse voltage 120 6100 V
V DRM Repetitive peak off-state voltage 120 6000 V
I RRM Repetitive peak reverse current V=VRRM 120 150 mA
I DRM Repetitive peak off-state current V=VDRM 120 150 mA
CONDUCTING
I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 840 A
I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 705 A
I TSM Surge on-state current sine wave, 10 ms 120 10 kA
I² t I² t without reverse voltage 500 x1E3 A²s
V T On-state voltage On-state current = 1570 A 25 2.4 V
V T(TO) Threshold voltage 120 1.3 V
r T On-state slope resistance 120 1.150 mohm
SWITCHING
di/dt Critical rate of rise of on-state current From 75% VDRM up to 1200 A 120 100 A/µs
dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 75% of VDRM 120 500 V/µs
td Gate controlled delay time, typical VD=200V, gate source 20V, 10 ohm 25 5 µs
tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 80% VDRM 650 µs
Q rr Reverse recovery charge di/dt=-60 A/µs, I= 1000 A 120 µC
I rr Peak reverse recovery current VR= 50 V A
I H Holding current, typical 25 300 mA
I L Latching current, typical 25 700 mA
GATE
V GT Gate trigger voltage 25 3.5 V
I GT Gate trigger current VD=5V 25 400 mA
V GD Non-trigger gate voltage, min. 0.5 VDRM 120 0.5 V
V FGM Peak gate voltage (forward) 30 V
I FGM Peak gate current 10 A
V RGM Peak gate voltage (reverse) 5 V
P GM Peak gate power dissipation Pulse width 100 µs 150 W
P G Average gate power dissipation 2 W
MOUNTING
R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 21 °C/kW
R th(c-h) Thermal impedance Case to heatsink, double side cooled 6 °C/kW
T j Operating junction temperature 120 °C
F Mounting force 22.0 / 24.5 kN
Mass 520 g
ORDERING INFORMATION : AT681 S 60
VDRM&VRRM/100
Page 2
AT681 PHASE CONTROL THYRISTOR
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
120
110
100
90
30°
80
60°
70
60
90°
120°
180°
DC
50
PF(AV) [W]
3500
3000
2500
2000
1500
1000
500
0 200 400 600 800 1000 1200
IF(AV) [A]
120°
180°
90°
60°
30°
DC
0
0 200 400 600 800 1000 1200
IF(AV) [A]
Page 3
AT681 PHASE CONTROL THYRISTOR
ANSALDO
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
120
110
100
90
30°
80
70
60
50
PF(AV) [W]
3500
3000
2500
2000
1500
60°
90°
120°
180°
0 200 400 600 800 1000 1200
IF(AV) [A]
180°
120°
90°
60°
30°
1000
500
0
0 200 400 600 800 1000 1200
IF(AV) [A]
Page 4
AT681 PHASE CONTROL THYRISTOR
ON-STATE CHARACTERISTIC
On-state Current [A]
Zth j-h [°C/kW]
SURGE CHARACTERISTIC
ITSM [kA]
ANSALDO
FINAL SPECIFICATION feb 97 - ISSUE : 02
Tj = 120 °C
3000
2500
2000
1500
1000
500
0
0.6 1.6 2.6 3.6 4.6
On-state Voltage [V]
Tj = 120 °C
10
9
8
7
6
5
4
3
2
1
0
1 10 100
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
25.0
20.0
15.0
10.0
5.0
0.0
0.001 0.01 0.1 1 10 100
t[s]
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03
mm and roughness < 2 µm.
In the interest of product improvement ANSALDO reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
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