Datasheet AT-36408-TR1, AT-36408-BLK Datasheet (HP)

Page 1
4.8 V NPN Common Emitter Output Power Transistor for␣ GSM Class IV Phones
Technical Data
AT-36408

Features

• 4.8 Volt Pulsed Operation
(pulse width = 577 µsec,
• +35.0 dBm P Typ.
• 65% Collector Efficiency @␣ 900 MHz, Typ.
• 9 dB Power Gain @ 900 MHz, Typ.
• Internal Input Pre-Matching Facilitates Cascading
@ 900 MHz,
out

Applications

• Output Power Device for GSM Class IV Handsets

SOIC-8 Surface Mount Plastic Package

Outline P8

Pin Configuration

BASE
EMITTER
EMITTER
18
27
45
BASE EMITTER
COLLECTORCOLLECTOR 3 6
EMITTER

Description

Hewlett Packard’s AT-36408 combines internal input pre­matching with low cost, NPN power silicon bipolar junction transistors in a SOIC-8 surface mount plastic package. This device is designed for use as the output device for GSM Class IV handsets. At 4.8 volts, the device features +35 dBm pulsed output power, superior power added efficiency, and excellent gain, making the AT-36408 an excellent choice for battery powered systems.
The AT-36408 is fabricated with Hewlett Packard’s 10 GHz Ft Self­Aligned-Transistor (SAT) process. The die are nitride passivated for surface protection. Excellent device uniformity, performance and reliability are produced by the use of ion-implantation, self­alignment techniques, and gold metalization in the fabrication of these devices.
4-81
5965-5960E
Page 2

AT-36408 Absolute Maximum Ratings

Absolute
Symbol Parameter Units Maximum
V
EBO
V
CBO
V
CEO
I
C
P
T
T
j
T
STG
Notes:
1. Permanent damage may occur if any of these limits are exceeded.
2. Pulsed operation, pulse width = 577␣ µsec, duty cycle␣ =␣ 12.5%.
3. Derate at 133.3 mW/°C for T
the collector pins 3 and 6, where the lead contacts the circuit board.
4. Using the liquid crystal technique, V “hot-spot” resolution.
Emitter-Base Voltage V 1.4 Collector-Base Voltage V 16.0 Collector-Emitter Voltage V 9.5 Collector Current Peak Power Dissipation
[2]
[2, 3]
A 1.7
W 8.6
Junction Temperature °C 150 Storage Temperature °C -65 to 150
␣>␣85 °C. T
C
is defined to be the temperature of
C
= 4.5 V, Ic= 100 mA, T
CE
=150° C, 1 - 2␣ µm
j
[1]
Thermal Resistance
θjc = 60°C/W
[4]
:
Electrical Specifications, T
= 25° C
C
Symbol Parameters and Test Conditions Units Min. Typ. Max.
Freq. = 900 MHz, VCE = 4.8 V, ICQ = 50 mA, pulsed operation, pulse width =
577 µsec, duty cycle = 12.5%, Test Circuit A,unless otherwise specified
[1]
[1]
[1]
[1]
[1]
Pin = +26 dBm dBm +34.0 +35.0
Pin = +26 dBm % 55 65
F0 = 900 MHz dBc -50
F0 = 900 MHz dBc -40
P
= +35 dBm 7:1
out
P
out
η
C
Output Power
Collector Efficiency
H2 2nd Harmonic
H3 3rd Harmonic
Mismatch Tolerance, No Damage
any phase, 2 sec duration
BV
BV
BV
h
FE
I
CEO
Note:
1. With external matching on input and output, tested in a 50 ohm environment. Refer to Test Circuit A (GSM).
Emitter-Base Breakdown Voltage IE = 0.8 mA, open collector V 1.4
EBO
Collector-Base Breakdown Voltage IC = 4.0 mA, open emitter V 16.0
CBO
Collector-Emitter Breakdown Voltage IC = 20.0 mA, open base V 9.5
CEO
Forward Current Transfer Ratio VCE = 3 V, IC = 180 mA 80 150 330
Collector Leakage Current V
= 5 V µA50
CEO
4-82
Page 3
AT-36408 Typical Performance, T
Frequency = 900 MHz, VCE = 4.8 V, I
= 50 mA, pulsed operation, pulse width␣ =␣ 577␣ µsec, duty cycle␣ =␣ 12.5%,
CQ
= 25° C
C
Test Circuit A (GSM), unless otherwise specified.
38
Γ
= 0.88 -171
source
Γ
= 0.85 +172
load
34
P
30
26
22
OUTPUT POWER (dBm)
18
14
618161081412 2220 282624
out
η
c
INPUT POWER (dBm)
Figure 1. Output Power and Collector Efficiency vs. Input Power.
95
80
65
50
35
20
5
38
Γ
source
Γ
(%)
COLLECTOR EFFICIENCY
load
33
28
23
OUTPUT POWER (dBm)
18
13
612810 14 2016 18 22 2624
Figure 2. Output Power vs. Input Power Over Bias Voltage.
= 0.88 -171
= 0.85 +172
INPUT POWER (dBm)
3.6 V
4.8 V
6.0 V
80
Γ
= 0.88 -171
source
Γ
= 0.85 +172
load
3.6 V
4.8 V
6.0 V
618161081412 2220 282624
INPUT POWER (dBm)
COLLECTOR EFFICIENCY (%)
70 60 50 40 30 20 10
0
Figure 3. Collector Efficiency vs. Input Power Over Bias Voltage.
36
Γ
= 0.88 -171
source
35
Γ
= 0.85 +172
load
34 33 32 31 30 29
OUTPUT POWER (dBm)
28
27
15 2117 19 23 282725
INPUT POWER (dBm)
TC = +85°C
= +25°C
T
C
= –40°C
T
C
Figure 4. Output Power vs. Input Power Over Temperature.
36.0
35.8
35.6
35.4
35.2
35.0
34.8
34.6
OUTPUT POWER (dBm)
34.4
34.2
34.0 880
Γ
= 0.88 -171
source
Γ
= 0.85 +172
load
FREQUENCY (MHz)
Pin = +26 dBm
η
c
75
71
P
out
67
63
59
55
Figure 5. Output Power and Collector Efficiency vs. Frequency.
Note: Tuned at 900 MHz, then swept over frequency.
0
Γ
= 0.88 -171
source
Γ
= 0.85 +172
load
FREQUENCY (MHz)
Output R.L.
Input R.L.
(%)
-5
-10
-15
RETURN LOSS (dB)
-20
COLLECTOR EFFICIENCY
-25 800 850 950 1000900890 910 920900
Figure 6. Input and Output Return Loss vs. Frequency.
4-83
Page 4

AT-36408 Typical Large Signal Impedances

VCE = 4.8 V, ICQ = 50 mA, Pulsed Operation, P
Freq. Γ
source
MHz Mag. Ang. Mag. Ang.
880 0.882 -170.0 0.847 172.7 890 0.885 -170.5 0.849 172.2 900 0.887 -171.1 0.851 171.6 910 0.890 -171.4 0.853 171.1 915 0.891 -169.0 0.854 168.4 920 0.893 -168.4 0.855 168.2
= +35.0 dBm
out
Γ
load

SPICE Model Parameters

Die Model Packaged Model
B
Die Area = 1.2 CPad = 0.3 pF
Value
Label
BF IKF ISE NE VAF NF TF XTF VTF ITF PTF XTB BR IKR ISC NC VAR NR
CPad
Label
280
299.9
9.9E-11
2.399
33.16
0.9935
1.6E-11
0.006656
0.02785
0.001 23 0
54.61 81
8.7E-13
1.587
1.511
0.9886
CPad
E1
Value
1E-9
TR
1.11
EG
3.598E-15
IS
3
XTI
0.8E-12
CJC
0.4831
VJC
0.2508
MJC
0.001
XCJC
0.999
FC
6.16E-12
CJE
1.186
VJE
0.5965
MJE
0.752
RB
0
IRB
0.01
RBM
1.27
RE
0.107
RC
E2
C
CPad
Rlead
B
Cpkg1
Rlead
E1
Cpkg1
Rlead
C
Cpkg1 Cpkg2
Rlead
E2
Label
Rlead Llead Rwire Lwire Cpkg1 Cpkg2 LE1
Llead
Cpkg2
Llead
Cpkg2
Llead
Llead
Value
0.63
1.45 nH
1.3
0.52 nH
0.4 pF
1.2 pF
0.3 nH
20 19 18 17
(pF)
16
Ccb
15 14 13 12
0462108
Vcb (V)
Figure 7. Collector-Base Capacitance vs. Collector-Base Voltage (DC Test).
Lwire Rwire
Lwire Rwire
Label
LE2 Cbase Rwbase Lwbase Rwbb Lwbb
Lwbase Rwbase
Lwbase Rwbase
Cbase
Lwbase Rwbase
L=0
R= 1
Lwbase Rwbase
Cbase
L=0
R=1
Value
0.00064 nH
46.0 pF
0.2
1.19 nH
0.1
0.1 nH
Lwbb Rwbb
Lwbb Rwbb
Lwbb Rwbb
Die
LE1 LE2
Die
LE1 LE2
Die
LE1 LE2
Die
LE1 LE2
4-84
Page 5
AT-36408 Typical Scattering Parameters, Common Emitter, Z
VCE = 3.6 V, Ic = 200 mA, T
Freq. S
11
= 25° C
c
S
21
S
12
= 50
O
GHz Mag. Ang. dB Mag. Ang. dB Mag. Ang. Mag. Ang.
0.05 0.96 -175 22.3 13.08 93 -38.4 0.012 11 0.74 -169
0.10 0.96 -178 16.4 6.61 88 -37.7 0.013 13 0.74 -174
0.25 0.96 177 8.8 2.76 80 -36.5 0.015 24 0.75 -177
0.50 0.94 173 4.2 1.63 66 -34.4 0.019 33 0.73 -177
0.75 0.90 169 3.4 1.49 46 -32.0 0.025 27 0.71 -172
0.90 0.84 168 4.2 1.63 24 -32.0 0.025 10 0.72 -165
1.00 0.79 170 4.6 1.70 0 -34.0 0.020 -14 0.81 -160
1.25 0.92 175 -1.2 0.87 -68 -37.1 0.014 126 1.01 -172
1.50 0.97 169 -9.6 0.33 -98 -30.2 0.031 97 0.96 -177
VCE = 4.8 V, Ic = 200 mA, T
= 25° C
c
0.05 0.96 -174 22.6 13.42 93 -37.7 0.013 11 0.74 -169
0.10 0.96 -178 16.6 6.79 88 -37.7 0.013 13 0.73 -174
0.25 0.96 178 9.0 2.83 80 -36.5 0.015 23 0.74 -177
0.50 0.94 173 4.4 1.66 66 -34.4 0.019 32 0.72 -176
0.75 0.90 169 3.6 1.51 46 -32.4 0.024 26 0.70 -172
0.90 0.84 168 4.3 1.64 24 -32.0 0.025 9 0.72 -164
1.00 0.80 170 4.6 1.71 0 -34.0 0.020 -14 0.81 -160
1.25 0.92 175 -1.0 0.89 -67 -37.1 0.014 126 1.01 -171
1.50 0.97 169 -9.4 0.34 -97 -30.2 0.031 97 0.96 -177
S
22
VCE = 6.0 V, Ic = 200 mA, T
= 25° C
c
0.05 0.96 -174 22.7 13.60 93 -37.7 0.013 12 0.73 -169
0.10 0.96 -178 16.7 6.88 88 -37.1 0.014 14 0.72 -174
0.25 0.96 178 9.2 2.87 79 -35.9 0.016 23 0.73 -177
0.50 0.94 173 4.5 1.68 65 -34.0 0.020 30 0.71 -176
0.75 0.90 169 3.7 1.52 45 -32.0 0.025 24 0.69 -171
0.90 0.85 168 4.3 1.64 23 -32.0 0.025 8 0.72 -164
1.00 0.80 170 4.6 1.70 0 -34.0 0.020 -14 0.81 -159
1.25 0.92 175 -1.0 0.90 -67 -37.7 0.013 125 1.01 -171
1.50 0.97 169 -9.2 0.35 -97 -30.2 0.031 96 0.95 -177

Typical Performance

35
MSG
30 25 20 15
(dB)
10
GAIN
5 0
-5
-10
0.05 0.500.10 0.25 0.75 1.50
MAG
2
|
|S
21
FREQUENCY (GHz)
MSG
1.000.90 1.25
Figure 8. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. V Ic = 200 mA.
= 3.6V,
CE
35
MSG
30 25 20 15
(dB)
10
GAIN
5 0
-5
-10
0.05 0.500.10 0.25 0.75 1.50
MAG
2
|
|S
21
FREQUENCY (GHz)
MSG
1.000.90 1.25
Figure 9. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. V Ic = 200 mA.
= 4.8V,
CE
35 30 25 20 15
(dB)
10
GAIN
-5
-10
0.05 0.500.10 0.25 0.75 1.50
MSG
MAG
5 0
2
|
|S
21
FREQUENCY (GHz)
Figure 10. Insertion Power Gain, Maximum Available Gain, and Maximum Stable Gain vs. Frequency. VCE = 6.0V, Ic = 200 mA.
MSG
1.000.90 1.25
4-85
Page 6

Test Circuit A: Test Circuit Board Layout @ 900 MHz (GSM)

38.1 (1.5)
V
BB
V
C1
BB
T1
R1
R2 R3
C2
C3
L1
R4
PA2 DEMO
76.2 (3.0)
Pulse Test
V
= 4.8 V
CE
= 50 mA
I
CQ
Freq. = 900 MHz
NOTE: Dimensions are shown in millimeters (inches).
Test Circuit: FR-4 Microstrip, glass epoxy board Dielectric Constant = 4.5 Thickness = 0.79 (.031)
L2
R5
B–MFG0140
C6
C7
V
CC
C8 C9
V
CC
9/96
C10C5C4
OUTPUTINPUT
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 R1 R2 R3 R4 R5 T1 L1 L2
39.0 pF
39.0 pF
100.0 nF
12.5 pF
11.5 pF
100.0 nF
39.0 pF
1.5 µF
10.0 µF
39.0 pF
2.2
619.0
2.2
10.0
10.0
MBT 2222A
18.0 µH
18.0 µH

Test Circuit A: Test Circuit Schematic Diagram @ 900 MHz (GSM)

B
CE
RF IN
V
BB
2.2
DC Transistor
619
2.2 10
18 µH
39 pF
12.5 pF = 1.52 (.060)
Pulse Test
V
= 4.8 V
CE
= 50 mA
I
CQ
Freq. = 900 MHz
100 nF
39 pF 39 pF
80 80
λ/4 @ 900 MHz λ/4 @ 900 MHz
50
50
= 4.88 (.192)
4-86
10
100 nF 1.5 µF 10 µF
18 µH
11.5 pF
V
CC
39 pF
RF OUT
Page 7

Part Number Ordering Information

Part Number No. of Devices Container
AT-36408-TR1 1000 7" Reel
AT-36408-BLK 25 Carrier Tape

Package Dimensions

SOIC-8 Surface Mount Plastic Package
1.27 (.050) 6x
3.80/4.00
(.1497/.1574)
Pin 1
1.35/1.75
(.0532/.0688)
0.33/0.51
(.013/.020) 8X
Note:
1. Dimensions are shown in millimeters (inches).
4.72/5.00
(.186/.197)
0.10/0.25
(.004/.0098)
5.84/6.20
(.230/.244)
0.38 ± 0.10
(.015 ± .004) x 45°
0°/8°
0.10 (.004)
0.19/0.25
(.0075/.0098)
0.41/1.27
(.016/.050)
4-87
Page 8

Tape Dimensions and Product Orientation For Package SOIC-8

REEL
CARRIER
TAPE
USER FEED DIRECTION
COVER TAPE
D
0
t
COVER TAPE
P
0
P
2
A
C
K
B
10 PITCHES CUMULATIVE TOLERANCE ON TAPE ±0.2 MM (±0.008)
EMBOSSMENT
E
F
W
USER FEED DIRECTION
T
CAVITY
PERFORATION
CARRIER TAPE
COVER TAPE
DISTANCE BETWEEN CENTERLINE
P
CENTER LINES OF CAVITY
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER
DIAMETER PITCH POSITION
WIDTH THICKNESS
WIDTH TAPE THICKNESS
CAVITY TO PERFORATION (WIDTH DIRECTION)
CAVITY TO PERFORATION (LENGTH DIRECTION)
1
A B K P D
D P E
W
C T
F
P
1 1
0 0
t
2
6.45 ± 0.10
5.13 ± 0.10
2.11 ± 0.10
8.00 ± 0.10
1.50 min.
1.50 + 0.10/-0
4.00 ± 0.10
1.75 ± 0.10
8.00 ± 0.30
0.255 ± 0.013
9.19 ± 0.10
0.051 ± 0.010
5.51 ± 0.05
2.00 ± 0.05
D
1
0.254 ± 0.004
0.202 ± 0.004
0.083 ± 0.004
0.315 ± 0.004
0.059 min.
0.059 + 0.004/-0
0.157 ± 0.004
0.069 ± 0.004
0.315 ± 0.012
0.0100 ± 0.0005
0.362 ± 0.004
0.0020 ± 0.0004
0.217 ± 0.002
0.079 ± 0.002
4-88
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