Datasheet AT27C2048-55JU Specification

Features

• Fast read access time – 55ns

• Low-power CMOS operation

– 100µA max standby

– 35mA max active at 5MHz

• JEDEC standard packages

– 44-lead PLCC

• Direct upgrade from 512Kbit and 1Mbit (Atmel

EPROMs

®

AT27C516 and AT27C1024)

• 5V  10% supply

• High-reliability CMOS technology

– 2,000V ESD protection

– 200mA latchup immunity

• Rapid

programming algorithm – 50µs/word (typical)

• CMOS- and TTL-compatible inputs and outputs

• Integrated product identification code

• Industrial temperature range

1. Description

The Atmel AT27C2048 is a low-power, high-performance 2,097,152-bit, one-time pro­grammable, read-only memory (OTP EPROM) organized as 128K by 16 bits. It requires a
single 5V power supply in normal read mode operation. Any word can be accessed in less
than 55 ns, eliminating the need for speed-reducing WAIT states. The x16 organization
makes this part ideal for high-performance, 16- and 32-bit microprocessor systems.

2Mb (128K x 16)
One-time
Programmable,
Read-only Memory

Atmel AT27C2048

In read mode, the AT27C2048 typically consumes 15mA. Standby mode supply current is
typically less than 10µA

The AT27C2048 is available in an industry-standard, JEDEC-approved, one-time program­mable (OTP) PLCC package. The device features two-line control (CE, OE) to eliminate
bus contention in high-speed systems.

With high-density, 128K word storage capability, the AT27C2048 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage media.

The AT27C2048 has additional features that ensure high quality and efficient production
use. The rapid programming algorithm reduces the time required to program the part and
guarantees reliable programming. Programming time is typically only 50 µs/word. The Inte­grated product identification code electronically identifies the device and manufacturer. This
feature is used by industry-standard programming equipment to select the proper pro­gramming algorithms and voltages.

0632G–EPROM–4/11

2. Pin configurations

PLCC

Pin name Function

A0 - A16 Addresses

O0 - O15 Outputs

CE Chip enable

OE Output enable

PGM Program strobe

NC No connect

DC Don’t connect

Note: Both GND pins must be

connected.

3. System considerations

Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.

44-lead

Top view

O13

O14

O15CEVPPDCVCC

65432

7

O12

8

O11

9

O10

10

O9

11

O8

12

GND

13

NC

14

O7

15

O6

16

O5

17

O4

1819202122232425262728

O3O2O1

O0

OE

Note: PLCC package pins 1 and 23 are “don’t

connect.”

and ground terminals of the device, as close to the device as possible.

CC

PGM

A16

1

4443424140

A0A1A2A3A4

DC

A15

A14

39
38
37
36
35
34
33
32
31
30
29

A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5

Figure 3-1. Block diagram

VCC
GND

DATA OUTPUTS

O0 - O15

VPP

OE

CE

A0 - A17

ADDRESS

INPUTS

2

Atmel AT27C2048

OE, CE AND

PROGRAM LOGIC

Y DECODER

X DECODER

OUTPUT

BUFFERS

Y-GATING

CELL MATRIX

IDENTIFICATION

0632G–EPROM–4/11

4. Absolute maximum ratings*

Atmel AT27C2048

Temperature under bias . . . . . . . . . . . . . -55C to +125C

Storage temperature . . . . . . . . . . . . . . . . -65C to +150C

Voltage on any pin with

respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V

Voltage on A9 with

respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V

VPP supply voltage with

respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V

Note: 1. Maximum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is

V

+ 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.

CC

5. DC and AC characteristics

Table 5-1. Operating modes

Mode/Pin CE OE PGM Ai V

Read V

Output disable X V

Standby V

Rapid program

PGM verify V

PGM inhibit V

Product identification

Notes: 1. X can be V

(2)

(4)

or VIH.

IL

2. Refer to the programming characteristics.

= 12.0  0.5V.

3. V

H

4. Two identifier words may be selected. All Ai inputs are held low (V
gled low (V

5. Standby V

) to select the manufacturer’s identification word and high (VIH) to select the device code word.

IL

current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.

CC

*NOTICE: Stresses beyond those listed under “Absolute maximum

ratings” may cause permanent damage to the device. This
is a stress rating only, and functional operation of the
device at these or any other conditions beyond those

(1)

indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

(1)

(1)

PP

IL

IH

V

IL

IL

IH

V

IL

V

IL

IH

XX X X

V

IH

V

IL

XX X V

V

IL

(1)

X

Ai X

X X X High Z

V

IL

V

IH

X

Ai V

Ai V

A9 = V

(3)

H

A0 = VIH or VIL

A1 - A16 = V

IL

IL

), except A9, which is set to VH, and A0, which is tog-

(1)

(5)

PP

PP

PP

V

CC

Outputs

D

OUT

High Z

D

IN

D

OUT

High Z

Identification code

Table 5-2. DC and AC operating conditions for read operation

Industrial operating temperature (case) -40C - 85C -40C - 85C

power supply 5V  10% 5V  10%

V

CC

0632G–EPROM–4/11

Atmel AT27C2048

-55 -90

3

Table 5-3. DC and operating characteristics for read operation

Symbol Parameter Condition Min Max Units

I

LI

I

LO

(2)

I

PP1

I

SB

I

CC

V

IL

V

IH

V

OL

V

OH

Notes: 1. V

Input load current VIN = 0V to V

Output leakage current V

(1)

V

read/standby current VPP = V

PP

(1)

V

standby current

CC

VCC active current f = 5MHz, I

Input low voltage -0.6 0.8 V

Input high voltage 2.0 VCC + 0.5 V

Output low voltage IOL = 2.1mA 0.4 V

Output high voltage I

must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.

CC

may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and

2. V

PP

I

..

PP

Table 5-4. AC characteristics for read operation

CC

= 0V to V

OUT

I

(CMOS)

SB1

CE = V

(TTL)

I

SB2

CE = 2.0 to V

= -400µA 2.4 V

OH

CC

CC

± 0.3V

OUT

CC

+ 0.5V

CC

= 0mA, CE = V

IL

1µA

5µA

10 µA

100 µA

1mA

35 mA

Atmel AT27C2048

-55 -90

Symbol Parameter Condition

t

t

t

t

t

ACC

CE

OE

DF

OH

(3)

(2)

(2)(3)

(4)(5)

(4)

Address to output delay

CE to output delay OE = V

OE to output delay CE = V

OE or CE high to output float, whichever occurred first 20 20 ns

Output hold from address, CE or OE, whichever occurred first 7 0 ns

CE = OE

= V

IL

IL

IL

Note: 2, 3, 4, 5. See the AC waveforms for read operation diagram.

Min Max Min Max

55 90 ns

55 90 ns

20 35 ns

Units

4

Atmel AT27C2048

0632G–EPROM–4/11

Atmel AT27C2048

Figure 5-1. AC waveforms for read operation

(1)

Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.

2.

OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.

OE may be delayed up to t

3.

- tOE after the address is valid without impact on t

ACC

ACC

.

4. This parameter is only sampled, and is not 100% tested.

5. Output float is defined as the point when data is no longer driven.

Figure 5-2. Input test waveforms and measurement levels

For -55 devices only:

, tF < 5ns (10% to 90%)

t

R

For -90 devices:

, tF < 20ns (10% to 90%)

t

R

0632G–EPROM–4/11

5

Figure 5-3. Output test load

Note: CL = 100pF including jig capacitance, except for the -55 devices, where CL = 30pF.

Table 5-5. Pin capacitance

Symbol Typ Max Units Conditions

C

IN

C

OUT

410pFV

812pFV

Note: Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested.

Figure 5-4. Programming waveforms

(1)

IN

OUT

= 0V

= 0V

Notes: 1. The input timing reference is 0.8V for VIL and 2.0V for VIH.

and t

2. t

OE

3. When programming the Atmel AT27C2048, a 0.1µF capacitor is required across V

are characteristics of the device, but must be accommodated by the programmer.

DFP

and ground to suppress spurious volt-

PP

age transients.

6

Atmel AT27C2048

0632G–EPROM–4/11

Table 5-6. DC programming characteristics

TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V

Atmel AT27C2048

Limits

Symbol Parameter Test conditions

I

LI

V

V

V

V

I

CC2

I

PP2

V

IL

IH

OL

OH

ID

Input load current VIN = VIL, V

Input low level -0.6 0.8 V

Input high level 2.0 V

Output low voltage IOL = 2.1mA 0.4 V

Output high voltage IOH = -400µA 2.4 V

VCC supply current (program and verify) 50 mA

VPP supply current CE = V

IL

A9 product identification voltage 11.5 12.5 V

Table 5-7. AC programming characteristics

TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V

Symbol Parameter Test Conditions

t

AS

t

OES

t

DS

t

AH

t

DH

t

DFP

t

VPS

t

VCS

t

PW

t

OE

t

PRT

Notes: 1. V

Address setup time

OE setup time 2 µs

Data setup time 2 µs

Input rise and fall times
(10% to 90%) 20ns

Address hold time 0 µs

Data hold time 2 µs

OE high to output float delay

(2)

VPP setup time 2 µs

VCC setup time 2 µs

PGM program pulse width

(3)

Data valid from OE 150 ns

Input pulse levels

0.45V to 2.4V

Input timing reference level

0.8V to 2.0V

Output timing reference level

0.8V to 2.0V

VPP pulse rise time during
programming

must be applied simultaneouslywithor before VPP and removed simultaneously with or after VPP.

CC

2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven.
See timing diagram.

3. Program pulse width tolerance is 50µs ± 5%.

(1)

UnitsMin Max

IH

10 µA

+ 0.5 V

CC

30 mA

Limits

UnitsMin Max

2µs

0 130 ns

47.5 52.5 µs

50 ns

Table 5-8. The Atmel AT27C2048 intergrated product identification code

Codes

Manufacturer 0 0 0 0 0 1 1110 001E

Device type 1 0 1 1 1 1 0111 00F7

0632G–EPROM–4/11

Pins

Hex dataA0 O15-O8 O7 O6 O5 O4 O3 O2 O1 O0

7

6. Rapid programming algorithm

A 50µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to

13.0V. Each address is first programmed with one 50µs
loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50µs pulses are applied
with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed.
After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and
VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails.

Figure 6-1. Rapid programming algorithm

CE pulse without verification. Then a verification/reprogramming

8

Atmel AT27C2048

0632G–EPROM–4/11

7. Ordering Information

Green package (Pb/halide-free)

I

(mA)

t

ACC

(ns)

CC

Atmel AT27C2048

Atmel ordering code Package Lead finish Operation rangeActive Standby

55 35 0.1 AT27C2048-55JU 44J Matte tin

90 35 0.1 AT27C2048-90JU 44J Matte tin

Industrial

(-40C to 85C)

Industrial

(-40C to 85C)

44J 44-lead, plastic, J-leaded chip carrier (PLCC)

0632G–EPROM–4/11

Package type

9

8. Packaging information

44J – PLCC

1.14(0.045) X 45°

B

e

0.51(0.020)MAX

45° MAX (3X)

Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC

2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.

3. Lead coplanarity is 0.004" (0.102mm) maximum

PIN NO. 1

IDENTIFIER

E1 E

D1

D

1.14(0.045) X 45°

0.318(0.0125)

0.191(0.0075)

NOM

D2/E2

MAX

B1

A2

A1

A

COMMON DIMENSIONS
(Unit of Measure = mm)

SYMBOL

A 4.191 – 4.572

A1 2.286 – 3.048

A2 0.508 – –

D 17.399 – 17.653

D1 16.510 – 16.662 Note 2

E 17.399 – 17.653

E1 16.510 – 16.662 Note 2

D2/E2 14.986 – 16.002

B 0.660 – 0.813

B1 0.330 – 0.533

e 1.270 TYP

MIN

NOTE

10

Package Drawing Contact:
[e-mail]

Atmel AT27C2048

TITLE

44J, 44-lead, Plastic J-leaded chip carrier (PLCC)

DRAWING NO.

44J

0632G–EPROM–4/11

10/04/01

REV.

B

9. Revision history

Doc. Rev. Date Comments

0632G 04/2011 Remove PDIP and VSOP packages

0632F 12/2007

Atmel AT27C2048

Add lead finish to ordering information

0632G–EPROM–4/11

11

Atmel Corporation

2325 Orchard Parkway

San Jose, CA 95131

USA

Tel: (+1) [phone]

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www.atmel.com

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JAPAN

Tel: (+81) (3) 3523-3551

Fax: (+81) (3) 3523-7581

Fax: [phone]

© 2011 Atmel Corporation. All rights reserved. / Rev.: 0632G–EPROM–4/11

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