Datasheet AT27BV256-90TI, AT27BV256-90TC, AT27BV256-90RI, AT27BV256-90RC, AT27BV256-90JI Datasheet (ATMEL)

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Page 1
0601A
Fast Read Access Ti me - 70 ns
Dual Voltage Range Operation
Unregulated Battery Power Sup ply Range, 2.7V to 3.6V or Standard 5V ± 10% Supply Range
Pin Compatible with JEDEC Standard AT27C256
Low Power CMOS Operation
20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V 29 mW max. Active at 5 MHz for VCC = 3.6V
JEDEC Standard Surface Mount Packa ge s
32-Lead PLCC 28-Lead 330-mil SOIC 28-Lead TSOP
High Reliabili ty C MOS Te ch nology
2,000V ESD Protection 200 mA Latchup Imm un ity
RapidProgramming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL and LVBO
Integrated Produc t Ide nti fication Code
Commercial and Industrial Temperature Ranges
Description
The AT27BV256 is a high performance, low power, low voltage 262,144 bit one-time programmable read only memory (OTP EPROM) organized as 32K by 8 bits. It re­quires only one supply in the range of 2.7V to 3.6V in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consumption of a 3V supply. At V accessed in less than 70 ns. With a typical power dissipation of only 18 mW at 5 MHz and V 5V EPROM.
Pin Configurations
= 3V, the AT27BV256 consumes less than one fifth the power of a standard
CC
SOIC Top View
= 2.7V, any word can be
CC
(continued)
AT27BV256
256K (32K x 8) Unregulated
Battery-Voltage
High Speed OTP CMOS EPROM
AT27BV256
Pin Name Function
A0 - A14 Addresses O0 - O7 Outputs CE Chip Enable OE Output Enable NC No Connect
PLCC Top View
Note: PLCC Package Pins 1 and 17 are DON’T CONNECT.
TSOP Top View
Type 1
3-3
Page 2
Description (Continued)
Standby mode supply current is typically less than 1 µA at 3V. The AT27BV256 simplifies s ystem design and stretches battery lifetime even further by eliminating the need for power supply regulation.
The AT27BV256 is available in industry standard JEDEC­approved one-time programmable (OTP) plastic PLCC, SOIC and TSOP packages. All devices feature two-line control ( bus contention.
The AT27BV256 operating with V level outputs that are compatible with standard TTL logic devices operating at V is compatible with JEDEC approved low voltage battery operation (LVBO) interface specifications. The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27BV256 has additional features to ensure high quality and efficient production use. The Rapid gramming Algorithm reduces the time required to program the part and guarantees reliable programming. Program­ming time i s typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the de­vice and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27BV256 programs exactly the same way as a standard 5V AT27C256R and uses the same programming equipment.
CE, OE) to give designers the flexibility to prevent
at 3.0V produces TTL
CC
= 5.0V. At VCC = 2.7V, the part
CC
Pro-
System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excur­sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de­vice non-conformance. At a minimum, a 0.1 µF high fre­quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the
and Ground terminals. This capacitor should be posi-
V
CC
tioned as close as possible to the point where the power supply is connected to the array.
and Ground terminals of
CC
3-4 AT27BV256
Page 3
AT27BV256
Block Diagram
Absolute Maximum Ra ti ngs *
Temperature Under Bias .................. -40°C to +85°C
Storage Temperature...................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground.........................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground.......................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-
mum Ratings” may cause permanent da ma ge to th e de vice . This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi­cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out­put pin voltage is V ceeded if certain precautions are observed (consult application notes) and which may overshoot to +7.0V for pulses of less than 20 ns.
+ 0.75V dc which may be ex-
CC
(1)
(1)
(1)
Operating Modes
Mode \ Pin
(2)
Read Output Disable Standby
(2)
Rapid Program PGM Verify Optional PGM Verify PGM Inhibit
Product Identification
Notes: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require,
2.7V ≤ VCC ≤ 3.6V, or 4.5V VCC 5.5V.
3. Refer to Programming Characteristics. Programming modes require VCC = 6.5V
(2)
(3)
(3)
(3)
(3)
(3, 5)
CE OE Ai V V
IL
V
IL
V
IH
V
IL
V
IL
V
IH
Ai V
(1)
X
XXVCCV
V
IH
Ai V
XVILAi V
V
IL
V
IH
V
IL
.
V
IL
V
IH
V
IL
Ai V
XVPPV
A9 = VH
(4)
A0 = VIH or VIL
A1 - A14 = V
4. VH = 12.0 ± 0.5V.
5. Two identifi e r bytes may be sel ec ted. All Ai inpu ts
IL
are held low (VIL), except A9 which is set to VH and A0 which is togg le d low (V fication byte and high (V
PP CC
V
CC
PP PP CC
V
CC
V
CC
(2)
V
CC
(2)
V
CC
(2)
CC
(3)
V
CC
(3)
V
CC
(3)
V
CC
(3)
CC
(3)
V
CC
) to select the Manufacturer’s Identi-
IL
) to select the Dev ice Code byte.
IH
Outputs
D
OUT
High Z High Z D
IN
D
OUT
D
OUT
High Z Identification
Code
3-5
Page 4
DC and AC Operating Conditions f or Read Operation
AT27BV256
-70 -90 -12 -15
Operating Temperature (Case)
Power Supply
V
CC
Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C
2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%
DC and Operating Characte ristics for Read Opera tion
Symbol Parameter Condition Min Max Units
VCC = 2.7V to 3.6V
I
LI
I
LO
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
VCC = 4.5V to 5.5V
I
LI
I
LO
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes: 1. VCC must be applied simulta ne ou sl y wit h or be fo re
Input Load Current VIN = 0V to V Output Leakage Current V
(2)
(1)
VPP
Read/Standby Current VPP = V
(1)
VCC
Standby Current
VCC Active Current Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Load Current VIN = 0V to V Output Leakage Current V
(2)
(1)
VPP
Read/Standby Current VPP = V
(1)
VCC
Standby Current
VCC Active Current f = 5 MHz, I
= 0V to V
OUT
I
(CMOS), CE = VCC ± 0.3V
SB1
(TTL), CE = 2.0 to VCC + 0.5V
I
SB2
f = 5 MHz, I V
= 3.0 to 3.6V -0.6 0.8 V
CC
V
= 2.7 to 3.6V -0.6 0.2 x V
CC
V
= 3.0 to 3.6V 2.0 VCC + 0.5 V
CC
V
= 2.7 to 3.6V 0.7 x VCCVCC + 0.5 V
CC
I
= 2.0 mA 0.4 V
OL
I
= 100 µA 0.2 V
OL
I
= 20 µA 0.1 V
OL
I
= -2.0 mA 2.4 V
OH
I
= -100 µAV
OH
I
= -20 µAV
OH
= 0V to V
OUT
I
(CMOS), CE = VCC ± 0.3V 100 µA
SB1
I
(TTL), CE = 2.0 to VCC + 0.5V 1 mA
SB2
CC
CC
CC
CC
= 0 mA, CE = VIL, VCC = 3.6V
OUT
CC
CC
= 0 mA, CE = V
OUT
IL
- 0.2 V
CC
- 0.1 V
CC
Input Low Voltage -0.6 0.8 V Input High Voltage 2.0 VCC + 0.5 V Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA 2.4 V
may be connected directly to VCC, except during pro-
2. V
PP
, and removed simultaneously with or after
V
PP
.
V
PP
gramming. The suppl y current would then be the sum of I and IPP.
±1 µA ±5 µA
10 µA 20 µA
100 µA
8mA
CC
±1 µA ±5 µA
10 µA
20 mA
V
CC
3-6 AT27BV256
Page 5
AT27BV256
AC Characteristics for Read Operation (V
Symbol Parameter Condition
(3)
t
ACC
t
CE
(2, 3)
t
OE
t
DF
t
OH
Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.
Address to Output Delay CE = OE = V
(2)
CE to Output Delay OE = V OE to Output Delay CE = V OE or CE High to Output Float,
(4, 5)
whichever occurred first Output Hold from Address, CE or OE,
whichever occurred first
IL
IL
(1)
AC Waveforms for Re ad O peration
= 2.7V to 3.6V and 4.5V to 5.5V)
CC
AT27BV256
-70 -90 -12 -15
Min Max Min Max Min Max Min Max
IL
70 90 120 150 ns 70 90 120 150 ns 50 50 50 60 ns
40 40 40 50 ns
0 0 0 0 ns
Units
Notes: 1. Timing measurement referenc es are 0. 8V and 2.0V.
Input AC drive levels are 0.45V and 2.4V, unless oth­erwise specifie d. OE may be delayed up to tCE-tOE after the falling
2. edge of OE may be delayed up to t
3. is valid without impact on t
CE without impact on tCE.
ACC-tOE
.
ACC
after the address
4. This parameter is only sampled and is not 100 % tested.
5. Output float is defined as the point when data is no longer driven.
6. When reading a 27BV256, a 0.1 µF capaci to r is required across VCC and ground to supress spurious voltage tran­sients.
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Page 6
Input Test Waveform and Meas urement Level
tR, tF < 20 ns (10% to 90%)
Output Test Load
Note: CL = 100 pF including jig capacitanc e.
Pin Capacitance (f = 1 MHz, T = 25°C)
(1)
Typ Max Units Conditions
C
IN
C
OUT
Note: 1. Typical values for nominal supply vol ta ge . Thi s pa ramet er is onl y samp le d an d is not 100 % te st ed .
48pFV 812pFV
= 0V
IN OUT
= 0V
3-8 AT27BV256
Page 7
AT27BV256
Programming Wavef or ms
(1)
Notes: 1. The Input Timing Reference is 0. 8V for VIL and
2.0V for V and t
2. t
OE
must be accommodated by the programmer.
.
IH
are characteristics of the device but
DFP
3. When programming the AT27BV256 a 0.1 µF capacitor is required across V age transie nt s.
and ground to suppress spurious volt-
PP
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter
I
LI
V
IL
V
IH
V
OL
V
OH
I
CC2
I
PP2
V
ID
Input Load Current VIN = VIL, V Input Low Level -0.6 0.8 V Input High Level 2.0 VCC + 0.5 V Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage I VCC Supply Current (Program and Verify) 25 mA VPP Current CE = V A9 Product Identification Voltage 11.5 12.5 V
Test Conditions
IH
= -400 µA2.4 V
OH
IL
Min
Limits
Max
±10 µA
25 mA
Units
3-9
Page 8
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Sym­bol Parameter
Address Setup
t
AS
Time OE Setup Time 2 µs
t
OES
Data Setup Time 2 µs
t
DS
Address Hold Time 0 µs
t
AH
Data Hold Time 2 µs
t
DH
OE High to Out-
t
DFP
put Float Delay VPP Setup Time 2 µs
t
VPS
VCC Setup Time 2 µs
t
VCS
CE Program Pulse
t
PW
t
OE
t
PRT
*AC Conditions of Test:
(3)
Width Data Valid
from OE VPP Pulse Rise Time During
Programming
Input Rise and Fa ll Times (10% to 90%)...........20 ns
Input Pulse Levels................................0.45V to 2.4V
Input Timing Reference Level................0.8V to 2.0V
Output Timing Reference Level.............0.8V to 2.0V
(2)
Test Conditions*
(2)
(1)
Limits
Min Max
2
0130ns
95 105 µs
150 ns
50 ns
Units
µs
Rapid Programming Algor ithm
A 100 µs CE pulse width is used to program. The address is set to the first location. V raised to 13.0V. Each address is first programmed with one 100 µs
CE pulse without verification. Then a verifica­tion / reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 suc­cessive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. V
is then lowered to 5.0V and VCC to
PP
5.0V. All bytes are read again and compar ed with the original data to determine if the device passes or fails.
is raised to 6.5V and VPP is
CC
Notes: 1. V
Atmel’s 27BV256 Integrated
must be applied simultaneously or before V
CC
and removed simultane ou sl y or af te r VPP.
2. This parameter is only samp le d an d is not 100 % tested. Output Float is defined as the point where data is no longer driven —see timing diagram.
3. Program Pulse width tolerance is 100
µsec ± 5%.
(1)
PP
Product Identification Code
Pins
Codes
Manufacturer0000111101E Device Type 1100011008C Note: 1. The AT27BV256 has the same Product Identi fi ca tion
A0 O7 O6 O5 O4 O3 O2 O1 O0
Code as the AT27C256R. Both are programming compatible.
Hex
Data
3-10 AT27BV256
Page 9
AT27BV256
Ordering Information
t
ACC
(ns)
70 8 0.02 AT27BV256-70JC 32J Commercial
90 8 0.02 AT27BV256-90JC 32J Commercial
120 8 0.02 AT27BV256-12JC 32J Commercial
150 8 0.02 AT27BV256-15JC 32J Commercial
I
(mA)
CC
Active Standby
8 0.02 AT27BV256-70JI 32J Industrial
8 0.02 AT27BV256-90JI 32J Industrial
8 0.02 AT27BV256-12JI 32J Industrial
8 0.02 AT27BV256-15JI 32J Industrial
Ordering Code Package Operation Range
AT27BV256-70RC 28R (0°C to 70°C) AT27BV256-70TC 28T
AT27BV256-70RI 28R (-40°C to 85°C) AT27BV256-70TI 28T
AT27BV256-90RC 28R (0°C to 70°C) AT27BV256-90TC 28T
AT27BV256-90RI 28R (-40°C to 85°C) AT27BV256-90TI 28T
AT27BV256-12RC 28R (0°C to 70°C) AT27BV256-12TC 28T
AT27BV256-12RI 28R (-40°C to 85°C) AT27BV256-12TI 28T
AT27BV256-15RC 28R (0°C to 70°C) AT27BV256-15TC 28T
AT27BV256-15RI 28R (-40°C to 85°C) AT27BV256-15TI 28T
Package Type
32J 32 Lead, Plastic J-Leade d Chi p Carrier (PLCC) 28R 28 Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28 Lead, Plastic Thin Small Outline Package (TSOP)
3-11
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