Datasheet AT27BV1024-15VC, AT27BV1024-15JI, AT27BV1024-15JC, AT27BV1024-12VI, AT27BV1024-12VC Datasheet (ATMEL)

AT27BV1024

Features

0631A

Fast Read Access Ti me - 90 ns

•

Dual Voltage Range Operation

•

Unregulated Battery Power Sup ply Range, 2.7V to 3.6V
or Standard 5V ± 10% Supply Range

Pin Compatible with JEDEC Standard AT27C1024

•

Low Power CMOS Operation

•

20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V
29 mW max. Active at 5 MHz for VCC = 3.6V

JEDEC Standard Surface Mount Packa ge s

•

44-Lead PLCC
40-Lead TSOP (10 x 14mm)

High Reliabili ty C MOS Te ch nology

•

2,000V ESD Protection
200 mA Latchup Imm un ity

RapidProgramming Algorithm - 100 µs/word (typical)

•

CMOS and TTL Compatible Inputs and Outputs

•

JEDEC Standard for LVTTL and LVBO

Integrated Produc t Ide nti fication Code

•

Commercial and Industrial Temperature Ranges

•

Description

The AT27BV1024 is a high performance, low power, low voltage 1,048,576 bit one­time programmable read only memory (OTP EPROM) organized as 64K by 16 bits.
It requires only one supply in the range of 2.7V to 3.6V in normal read mode opera­tion. The by-16 organization makes this part ideal for portable and handheld 16 and
32 bit microprocessor based systems using either regulated or unregulated battery
power.

(continued)

Pin Configurations

Pin Name Function

A0 - A15 Addresses
O0 - O15 Outputs
CE Chip Enable
OE Output Enable
PGM Program Strobe
NC No Connect

Note: Both GND pins must be
connected.

PLCC Top View

AT27BV1024

1 Megabit
(64K x 16)
Unregulated



Battery-Voltage

High Speed
OTP
CMOS EPROM

Note: PLCC Package Pins 1 and
23 are DON’T CONNECT.

TSOP Top View

Type 1

3-33

Description (Continued)

Atmel’s innovative design techniques provide fast speeds
that rival 5V parts while keeping the low power consump­tion of a 3V supply. At V
cessed in less than 120 ns. With a typical power dissipa­tion of only 18 mW at 5 MHz and V
AT27BV1024 consumes less than one fifth the power of a
standard 5V EPROM.

Standby mode supply current is typically less than 1 µA a t
3V. The AT27BV1024 simplifies system design and
stretches battery lifetime even further by eliminating the
need for power supply regulation.

The AT27BV1024 is available in industry standard
JEDEC-approved one-time programmable (OTP) plastic
PLCC and TSOP packages. All devices feature two-line
control (

CE, OE) to give designers the flexibility to prevent

bus contention.
The AT27BV1024 operating with V

TTL level outputs that are compatible with standard TTL
logic devices operating at V
part is compatible with JEDEC approved low voltage bat­tery operation (LVBO) interface specifications. The device
is also capable of standard 5-volt operation making it ide­ally suited for dual supply range systems or card products
that are pluggable in both 3-volt and 5-volt hosts.

Atmel’s AT27BV1024 has additional features to ensure
high quality and efficient production use. The Rapid
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program­ming time is typically only 100 µs/word. The Integrated
Product Identification Code electronically identifies the de­vice and manufacturer. This feature is used by industry
standard programming equipment to select the proper
programming algorithms and voltages. The AT27BV1024
programs exactly the same way as a standard 5V
AT27C1024 and uses the same programming equipment.

= 2.7V, any word can be ac-

CC

= 3V, the

CC

at 3.0V produces

CC

= 5.0V. At VCC = 2.7V, the

CC



Pro-

System Considerations

Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excur­sions. Unless accommodated by the system design, these
transients may exceed data sheet limits, resulting in de­vice non-conformance. At a minimum, a 0.1 µF high fre­quency, low inherent inductance, ceramic capacitor
should be utilized for each device. This capacitor should
be connected between the V
the device, as close to the device as possible. Additionally,
to stabilize the supply volt age level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic
capacitor should be utilized, again connected between the

and Ground terminals. This capacitor should be posi-

V

CC

tioned as close as possible to the point where the power
supply is connected to the array.

and Ground terminals of

CC

3-34 AT27BV1024

AT27BV1024

Block Diagram

Absolute Maximum Ra ti ngs *

Temperature Under Bias ................-55°C to +125°C

Storage Temperature...................... -65°C to +150°C

Voltage on Any Pin with

Respect to Ground.........................-2.0V to +7.0V

Voltage on A9 with

Respect to Ground ......................-2.0V to +14.0V

VPP Supply Voltage with

Respect to Ground.......................-2.0V to +14.0V

*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-

mum Ratings” may cause permanent da ma ge to th e de vice .
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi­cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.

Note: 1. Minimum voltage is -0.6V dc which ma y unde rshoot to

-2.0V for pulses of less than 20 ns. Maximum out put
pin voltage is V
to +7.0V for pulses of less than 20 ns.

+ 0.75V dc which may overshoot

CC

(1)

(1)

(1)

Operating Modes

Mode \ Pin

(2)

Read
Output Disable
Standby
Rapid Program
PGM Verify
PGM Inhibit

Product Identification

Notes: 1. X can be VIL or VIH.

2. Read, output disable, and standby modes require,

2.7V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.

3. Refer to Programming Characteristics. Programming
modes require VCC = 6.5V.

(2)

(2)

(3)

(3)

(3)

(3, 5)

CE OE PGM Ai V
V

IL

V

IL

X

(1)

Ai X V

PP

XVIHXXXV

V

IH

V

IL

V

IL

V

IH

V

IL

XX X X

V

IH

V

IL

V

IL

V

IH

Ai V
Ai V

XX X VPPV

(4)

A9 = V

V

IL

X

A0 = VIH or VIL

A1 - A15 = V

4. V

5. Two identifier words may be selected. All Ai in pu ts

H

IL

= 12.0 ± 0.5V.

H

are held low (VIL), except A9 which is set to VH and A0
which is togg le d low (V
fication word and high (V

(5)

PP
PP

V

CC

) to select the Manufacturer’s Identi-

IL

V

CC
CC
CC

V

CC

V

CC

V

CC
CC

V

CC

) to select the Device Code word.

IH

(2)
(2)
(2)

(3)
(3)

(3)

(3)

Outputs

D
High Z
High Z
D
D
High Z

Identification
Code

OUT

IN
OUT

3-35

DC and AC Operating Conditions f or Read Operation

AT27BV1024

-90 -12 -15

Operating
Temperature (Case)

V

Power Supply

CC

Com. 0°C - 70°C0°C - 70°C0°C - 70°C
Ind. -40°C - 85°C-40°C - 85°C-40°C - 85°C

2.7V - 3.6V 2.7V - 3.6V 2.7V - 3.6V
5V ± 10% 5V ± 10% 5V ± 10%

= Preliminary Information

DC and Operating Characte ristics for Read Oper a ti on

Symbol Parameter Condition Min Max Units

VCC = 2.7V to 3.6V

I

LI

I

LO

I

PP1

I

SB

I

CC

V

IL

V

IH

V

OL

V

OH

VCC = 4.5V to 5.5V

I

LI

I

LO

I

PP1

I

SB

I

CC

V

IL

V

IH

V

OL

V

OH

Notes: 1. VCC must be applied simulta ne ou sl y wit h or be fo re

Input Load Current VIN = 0V to V
Output Leakage Current V

(2)

(1)

VPP

Read/Standby Current VPP = V

(1)

VCC

Standby Current

VCC Active Current
Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage

Input Load Current VIN = 0V to V
Output Leakage Current V

(2)

(1)

VPP

Read/Standby Current VPP = V

(1)

VCC

Standby Current

VCC Active Current f = 5 MHz, I

= 0V to V

OUT

I

(CMOS), CE = VCC ± 0.3V

SB1

(TTL), CE = 2.0 to VCC + 0.5V

I

SB2

f = 5 MHz, I
V

= 3.0 to 3.6V -0.6 0.8 V

CC

V

= 2.7 to 3.6V -0.6 0.2 x V

CC

V

= 3.0 to 3.6V 2.0 VCC + 0.5 V

CC

V

= 2.7 to 3.6V 0.7 x VCCVCC + 0.5 V

CC

I

= 2.0 mA 0.4 V

OL

I

= 100 µA 0.2 V

OL

I

= 20 µA 0.1 V

OL

I

= -2.0 mA 2.4 V

OH

I

= -100 µAV

OH

I

= -20 µAV

OH

= 0V to V

OUT

I

(CMOS), CE = VCC ± 0.3V 100 µA

SB1

I

(TTL), CE = 2.0 to VCC + 0.5V 1 mA

SB2

CC

CC

CC

CC

= 0 mA, CE = VIL, VCC = 3.6V

OUT

CC

CC

= 0 mA, CE = V

OUT

IL

- 0.2 V

CC

- 0.1 V

CC

Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA 2.4 V

may be connected directly to VCC, except during pro-

2. V

PP

, and removed simultaneously with or after

V

PP

.

V

PP

gramming. The suppl y current would then be the sum of I
and IPP.

±1 µA
±5 µA

10 µA
20 µA

100 µA

8mA

CC

±1 µA
±5 µA

10 µA

30 mA

V

CC

3-36 AT27BV1024

AT27BV1024

AC Characteristics for Read Operation (V

Symbol Parameter Condition

(3)

t

ACC

(2)

t

CE

(2, 3)

t

OE

(4, 5)

t

DF

t

OH

Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.

Address to
Output Delay

CE to Output Delay OE = V
OE to Output Delay CE = V

OE or CE High to Output Float,
whichever occurred firs t

Output Hold from Add ress, CE or OE,
whichever occurred firs t

AC Waveforms for Re ad O peration

CE = OE
= V

IL

IL
IL

(1)

= 2.7V to 3.6V and 4.5V to 5.5V)

CC

AT27BV1024

-90 -12 -15

Min Max Min Max Min Max

90 120 150 ns
90 120 150 ns

30 35 50 ns
30 30 40 ns

0 0 0 ns

= Preliminary Information

Units

Notes: 1. Timing measurement references are 0. 8V and 2.0V.

Input AC drive levels are 0.45V and 2.4V, unless oth­erwise specifie d.
OE may be delayed up to t

2.
edge of
OE may be delayed up to t

3.
is valid without impact on t

CE without impact on tCE.

- tOE after the falling

CE

- tOE after the address

ACC

.

ACC

4. This parameter is only sampled and is not 100% tested.

5. Output float is defined as the point when data is no longer
driven.

6. When reading a 27BV1024, a 0.1 µF capacitor is required
across VCC and ground to supress spurious voltage tran­sients.

3-37

Note: CL = 100 pF including
jig capacitance.

Input Test Waveforms and Measurement Level s

tR, tF < 20 ns (10% to 90%)

Output Test Load

Pin Capacitance (f = 1 MHz T = 25°C)

(1)

Typ Max Units Conditions

C

IN

C

OUT

Note: 1. Typical values for nominal supp ly voltage. This parameter is onl y samp le d an d is not 100 % te st ed .

410pFV
812pFV

= 0V

IN
OUT

= 0V

3-38 AT27BV1024

AT27BV1024

Programming Wavef or ms

(1)

Notes: 1. The Input Timing Reference is 0.8V for V

.

for V

IH

and t

2. t

OE

must be accommodated by the programmer.

are characteristics of the device but

DFP

and 2.0V

IL

3. When programming the AT27BV1024 a 0.1
required across V
age transie nt s.

DC Programming Characteristics

TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, V

Symbol Parameter Test Conditions

I

LI

V

IL

V

IH

V

OL

V

OH

I

CC2

I

PP2

V

ID

Input Load Current V
Input Low Level -0.6 0.8 V
Input High Level 2.0 V
Output Low Voltage I
Output High Volta ge I
VCC Supply Current (Program and Verify) 50 mA
VPP Supply Current CE = PGM = V
A9 Product Identi fication Voltage 11.5 12.5 V

= 13.0 ± 0.25V

PP

= VIL, V

IN

OL

= -400 µA2.4 V

OH

IH

= 2.1 mA 0.4 V

µF capacitor is

and ground to suppress spurious volt-

PP

Limits

Min

IL

Max

±10 µA

+ 0.1 V

CC

30 mA

Units

3-39

AC Programming Characteristics

TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, V

Sym­bol Parameter

Address Setup Time 2 µs

t

AS

CE Setup Time 2 µs

t

CES

OE Setup Time 2 µs

t

OES

Data Setup Time 2 µs

t

DS

Address Hold Time 0 µs

t

AH

Data Hold Time 2 µs

t

DH

OE High to Out-

t

DFP

put Float Delay
VPP Setup Time 2 µs

t

VPS

VCC Setup Time 2 µs

t

VCS

PGM Program Pulse

t

PW

Width
Data Valid from OE 150 ns

t

OE

V

Pulse Rise Time During

t

PRT

PP

Programming

Test
Conditions*

(2)

(3)

= 13.0 ± 0.25V

PP

Limits

(1)

Min Max

0130ns

95 105 µs

50 ns

Units

Rapid Programming Algor ithm

A 100 µs PGM pulse width is used to program. The ad­dress is set to the first location. V

is raised to 13.0V. Each address is first programmed

V

PP

with one 100 µs

PGM pulse without verification. Then a
verification / reprogramming loop is executed for each ad­dress. In the event a word fails to pass verification, up to
10 successive 100 µs pulses are applied with a verifica-
tion after each pulse. If the word fails to verify after 10
pulses have been applied, the part is considered failed.
After the word verifies properly, the next address is se­lected until all have been checked. V

5.0V and V

to 5.0V. All words are read again and com-

CC

pared with the original data to determine if the dev ice
passes or fails.

is raised to 6.5V and

CC

is then lowered to

PP

*AC Conditions of Test:

Input Rise and Fa ll Times (10% to 90%). .......... ...20 ns

Input Pulse Levels.................................. 0.45V to 2.4V

Input Timing Reference Level ..................0.8V to 2.0V

Output Timing Reference Level ...............0.8V to 2.0V

Notes: 1. V

Atmel’s 27BV102 4 Int egrated
Product Identification Code

Codes

Manufacturer0 0 00011110001E
Device Type 1 0 1111000100F1

Note: 1. The AT27BV1024 has the same Produc t Id en tification

must be applied simultaneou sl y or before V

CC

and removed simultaneously or a fter VPP.

2. This parameter is only sampled and is no t 10 0%
tested. Output Float is defined as the point where
data is no longer driven — see timing diagram.

3. Program Pu ls e wid th tolerance is 100

Pins

A0 015-08 O7 O6 O5 O4 O3 O2 O1 O0

Code as the AT27C1024. Both are prog ramming
compatib le.

µsec ± 5%.

(1)

Hex

Data

PP

3-40 AT27BV1024

Ordering Information

AT27BV1024

t

ACC

(ns)

90 8 0.02 AT27BV1024-90JC 44J Commercial

120 8 0.02 AT27BV1024-12JC 44J Commercial

150 8 0.02 AT27BV1024-15JC 44J Commercial

I

(mA)

CC

Active Standby

8 0.02 AT27BV1024-90JI 44J Industrial

8 0.02 AT27BV1024-12JI 44J Industrial

8 0.02 AT27BV1024-15JI 44J Industrial

Ordering Code Package Operation Range

AT27BV1024-90VC 40V (0°C to 70°C)

AT27BV1024-90VI 40V (-40°C to 85°C)

AT27BV1024-12VC 40V (0°C to 70°C)

AT27BV1024-12VI 40V (-40°C to 85°C)

AT27BV1024-15VC 40V (0°C to 70°C)

AT27BV1024-15VI 40V (-40°C to 85°C)

= Preliminary Information

Package Type

44J 44 Lead, Plastic J-Leade d Chi p Carrier (PLCC)
40V 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm

3-41