The AT27BV040 chip is a high performance, low power, low voltage, 4,194,304 bit
one-time programmable read only memory (EPROM) organized as 512K by 8 bits. It
requires only one supply in the range of 2.7 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At V
accessed in less than 100 ns. With a typical power dissipation of only 18 mW at 5
MHz and V
standard 5V EPROM. Standby mode supply current is typically les s than 1 µA at 3V.
The AT27BV040 simplifies system design and stretches battery lifetime even further
by eliminating the need for power supply regulation.
= 3V, the AT27BV040 consumes less than one fifth the power of a
The AT27BV040 is available in industry standard JEDECapproved one-time programmable (OTP) plastic PLCC
and TSOP packages. All devices feature two-line control
CE, OE) to give designers the flexibility to prevent bus
(
contention.
The AT27BV040 operating with V
level outputs that are compatible with standard TTL logic
devices operating at V
= 5.0V. At VCC = 2.7V, the part
CC
is compatible with JEDEC approved low voltage battery
operation (LVBO) interface specifications. The device is
also capable of standard 5-volt operation making it ideally
suited for dual supply range systems or card products that
are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27BV040 has additional features to ensure
high quality and efficient production use. The Rapid
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time i s typically only 100 µs/byte. The Integrated
Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry
standard programming equipment to select the proper
programming algorithms and voltages. The AT27BV040
programs exactly the same way as a standard 5V
AT27C040 and uses the same programming equipment.
at 3.0V produces TTL
CC
Pro-
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these
transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor
should be utilized for each device. This capacitor should
be connected between the V
the device, as close to the device as possible. Additionally,
to stabilize the supply volt age level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic
capacitor should be utilized, again connected between the
and Ground terminals. This capacitor should be posi-
V
CC
tioned as close as possible to the point where the power
supply is connected to the array.
and Ground terminals of
CC
3-54AT27BV040
Page 3
AT27BV040
Block Diagram
Absolute Maximum Ra ti ngs *
Temperature Under Bias .................. -40°C to +85°C
Storage Temperature...................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground.........................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground.......................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-
mum Ratings” may cause permanent da ma ge to th e de vice .
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note: 1. Minimum volta ge is -0. 6V dc whic h ma y unde rsh oo t
to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is V
ceeded if certain precautions are observed (consult
application notes) and which may overshoot to
+7.0V for pulses of less than 20 ns.
+ 0.75V dc which may be ex-
CC
(1)
(1)
(1)
Operating Modes
Mode \ Pin
(2)
Read
Output Disable
Standby
Rapid Program
PGM Verify
PGM Inhibit
Product Identification
Notes: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require,
3. Refer to Programming Characteristics. Programming
(2)
(2)
(3)
(3)
(3)
(3, 5)
2.7V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
modes require VCC = 6.5V.
CEOEAiV
V
IL
XV
V
IH
V
IL
XV
V
IH
V
IL
V
IL
IH
Ai X
XXV
XXXV
V
IH
IL
V
IH
V
IL
AiV
AiV
XVPPVCC
A9 = VH
(4)
A0 = VIH or VIL
A1 - A18 = V
IL
4. VH = 12.0 ± 0.5V.
5. Two identifier by tes may be selected. All Ai inputs are held
low (VIL), except A9 which is set to VH and A0 which is
toggled low (V
byte and high (V
PP
(1)
PP
PP
XV
) to select the Manufacturer’s Identification
IL
) to select the Device Code byte.
IH
V
VCC
CC
CC
VCC
VCC
CC
CC
(2)
(2)
(2)
(3)
(3)
(3)
(3)
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
Identification
Code
3-55
Page 4
DC and AC Operating Conditions f or Read Operation
A 100 µs CE pulse width is used to program. The address
is set to the first location. V
raised to 13.0V. Each address is first programmed with
one 100 µs
CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In
the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after
each pulse. If the byte fails to verify after 10 pulses have
been applied, the part is considered failed. After the byte
verifies properly, the next address is selected until all have
been checked. V
is then lowered to 5.0V and VCC to
PP
5.0V. All bytes are read again and compar ed with the
original data to determine if the device passes or fails.
is raised to 6.5V and VPP is
CC
*AC Conditions of Test:
Input Rise and Fa ll Times (10% to 90%). ..............20 ns
Input Pulse Levels....................................0.45V to 2.4V
Input Timing Reference Level....................0.8V to 2.0V
Output Timing Reference Level.................0.8V to 2.0V
Notes: 1. V
Atmel’s 27BV040 Integrated
must be applied simultaneously or before VPP
CC
(1)
PP
.
and removed simultaneously or af ter V
2. This parameter is only sampled and is not 100%
tested. Output Float is defined as the point where
data is no longer driven —see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
Product Identification Code
Pins
Codes
Manufacturer000011110 1E
Device Type 1000010110B
Note:1. The AT27BV040 has the same Prod uc t Id en tification
A0 O7 O6 O5 O4 O3 O2 O1 O0
Code as the AT27C040. Both are prog ramming
compatible.
Hex
Data
3-60AT27BV040
Page 9
= Preliminary Information
AT27BV040
Ordering Information
(mA)
I
t
ACC
(ns)
12080.02AT27BV040-12JC32JCommercial
15080.02AT27BV040-15JC32JCommercial
CC
V
= 3.6V
CC
ActiveStandby
80.02AT27BV040-12JI32JIndustrial
80.02AT27BV040-15JI32JIndustrial
Ordering CodePackageOperation Range
AT27BV040-12TC32T(0°C to 70°C)
AT27BV040-12TI32T(-40°C to 85°C)
AT27BV040-15TC32T(0°C to 70°C)
AT27BV040-15TI32T(-40°C to 85°C)
32J32 Lead, Plastic J-Leade d Chi p Carrier (PLCC)
32T32 Lead, Plasti c Thin Smal l Outli ne Packag e (TSOP)
Package Type
3-61
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