Datasheet AT27BV020-90VI, AT27BV020-90VC, AT27BV020-90TI, AT27BV020-90TC, AT27BV020-90JI Datasheet (ATMEL)

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Page 1
Features
Fast Read Access Time - 90 ns
Dual Voltage Range Operation
– Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V ± 10% Supply Range
Compatible with JEDEC Standard AT27C020
Low Power CMOS Operation
–20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V – 29 mW max. Active at 5 MHz for VCC = 3.6V
Wide Selection of JEDEC Standard Packages
– 32-Lead PLCC – 32-Lead TSOP (8 x 20mm) – 32-Lead VSOP (8 x 14mm) – 42-Ball CBGA (8 x 8mm)
High Reliability CMOS Technology
– 2,000V ESD Protection – 200 mA Latchup Immunity
Rapid™ Programming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
AT27BV020
2-Megabit (256K x 8) Unregulated
Battery-Voltage™
High Speed
Description
The AT27BV020 is a high-performance, low-power, low-voltage 2,097,152-bit one­time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one supply in the range of 2.7 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power.
Pin Configurations
Pin Name Function
A0 - A17 Address O0 - O7 Outputs CE OE PGM
PLCC, Top View
Chip Enable Output Enable Program Strobe
CBGA Top View
234567
1
A
GND
O6
VCC
VCC
B
A17
O7
C
A10
D
A14
E
A16
F
A15
NC A13 A11 A12
O4 O5 A9
PGM
A8
NC NC NC NC NC
O2 NC O3 NC A7
VPP
TSOP, VSOP Top View
Type 1
(continued)
OE
GND
O0
CE
O1
A0
A6
A3
A4
A1
A5
A2
OTP EPROM
AT27BV020
0902A-A–10/97
1
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Atmel’s innovativ e design techniques provide fas t speeds that rival 5V parts while keep ing th e low pow er consum p­tion of a 3V supply. At V
= 2.7V, any byte can be
CC
accessed in less than 90 ns. With a typical power dissipa­tion of only 18 mW at 5 MHz and V
= 3V, the AT27BV020
CC
consumes less than one fifth the power of a standard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3V. The AT27BV020 simplifies system design and stretches battery li fetime even further by eliminating the need for power supply regulation
The AT27BV020 is available in industry standard JEDEC approved one-time programmable (OTP) plastic PLCC, TSOP and VSOP packages, as well as a 42-ball, 1 mm pitch, plastic chip-scale Ball Grid Array package (CBGA). All devices feature two-line control (CE
, OE) to give design-
ers the flexibility to prevent bus contention. The AT27BV020 op eratin g with V
at 3.0V produces TTL
CC
level outputs that are compatible with standard TTL logic devices operat ing at V
= 5.0V. At VCC = 2.7V, the part is
CC
compatible with JEDEC approved low voltage battery oper­ation (LVBO) interface specifications . The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel's AT27B V020 has addi tional fe atures to e nsure high quality and efficient production use. The Rapid
Program-
ming Algori thm reduc es the ti me requi red to pro gram the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Inte grated Produc t Identification Code electronically identi fies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27BV020 programs exactly the same way as a standard 5V AT27C020 and uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the Chip Enable pin may prod uce tr ans ie nt v olt age excur sions. Unless accommodated by the system design, these tran­sients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequ enc y, low inherent inductance, ceramic capacitor should be uti­lized for each device. This capacitor shoul d be connected between the V close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
and Ground terminals of the device, as
CC
and Ground
CC
2
AT27BV020
Page 3
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
AT27BV020
*NOTICE: Stresses beyond those listed und er “Absolute M axi-
mum Ratings” ma y cause permanent damage to th e device. This is a stress rating only and functional operation of the device at these or any other condi-
(1)
(1)
Note: Minimum voltage is -0.6V DC which may undershoot to -
(1)
tions beyond those indicated in the operational sec­tions of this specific ation is not implie d. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2.0V for pulses of less than 20 ns.Maximum output pin voltage is V
+ 0.75V DC which may be exceeded if cer-
CC
tain precautions are obs erved (consult application not es) and which ma y ov ershoot to +7.0V f or pulse s of less than 20 ns.
Operating Modes
Mode / Pin CE OE PGM Ai V
(2)
Read Output Disable Standby Rapid Program PGM Verify PGM Inhibit
Product Identification
(2)
(2)
(3)
(3)
(3)
(3)(5)
Notes: 1. X Can be VIL or VIH.
2. Read, output disable, and standby modes requir e, 2.7V V
3. Refer to Programming Characteristics. Programming modes requires VCC = 6.5V. = 12.0 ± 0.5V.
4. V
H
5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggl ed low
) to select the Manufacturer’s Identification byte and high (VIH) to select the Devi ce Code byte.
(V
IL
V
IL
X V
V
IH
V
IL
V
IL
V
IH
V
IL
V
IL
IH
XX X XV
V
IH
V
IL
XX X VPPV
V
IL
(1)
X
Ai X V
XXXV
V
IL
V
IH
X
Ai V Ai V
A9 = V
A0 = VIH or V
A1 - A17 = V
3.6V, or 4.5V VCC 5.5V.
CC
(4)
H
IL
IL
PP
PP
PP
XV
V
CC
(2)
CC
(2)
CC
(2)
CC
(3)
V
CC
(3)
V
CC
(3)
CC
(3)
CC
Outputs
D
OUT
High Z High Z D
IN
D
OUT
High Z Identification
Code
3
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DC and AC Operating Conditions for Read Operation
AT27BV020
-90 -12 -15
Com.
0°C - 70°C 0°C - 70°C 0°C - 70°C
Operating Temperature (Case)
Ind.
-40°C - 85°C -40°C - 85°C -40°C - 85°C
2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V
V
Power Supply
CC
5V ± 10% 5V ± 10% 5V ± 10%
= Preliminary Information
DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units V
= 2.7V to 3.6V
CC
±
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
= 4.5V to 5.5V
V
CC
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes: 1.
Input Load Current VIN = 0V to V Output Leakage Current V
(1)
V
Read/Standby Current VPP = V
PP
(1)
V
Standby Current
CC
VCC Active Current f = 5 MHz, I
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Load Current VIN = 0V to V Output Leakage Current V
(1)
V
Read/Standby Current VPP = V
PP
(1)
VCC
Standby Current
VCC Active Current f = 5 MHz, I Input Low Voltage -0.6 0.8 V Input High Voltage 2.0 VCC + 0.5 V Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA2.4V
VCC must be applied simultaneously with or before
2.
VPP may be connected directly to VCC, expect during programming. The supply current would then be the sum of ICC and IPP.
CC
= 0V to V
OUT
(CMOS), CE = V
I
SB1
I
(TTL), CE = 2.0 to VCC + 0.5V 100
SB2
= 3.0 to 3.6V -0.6 0.8 V
V
CC
V
= 2.7 to 3.6V -0.6 0.2 x V
CC
= 3.0 to 3.6V 2.0 VCC + 0.5 V
V
CC
V
= 2.7 to 3.6V 0.7 x V
CC
= 2.0 mA 0.4 V
I
OL
I
= 100 µA0.2V
OL
I
= 20 µA0.1V
OL
= -2.0 mA 2.4 V
I
OH
I
= -100 µAV
OH
I
= -20 µAV
OH
= 0V to V
OUT
(CMOS), CE = VCC ± 0.3V 100
I
SB1
I
(TTL), CE = 2.0 to VCC + 0.5V 1 mA
SB2
V
, and removed simultaneously with or after VPP.
PP
CC
CC
±
0.3V 20
CC
= 0 mA, CE = VIL, VCC = 3.6V 8 mA
OUT
CC
- 0.2 V
CC
- 0.1 V
CC
CC
CC
CC
= 0 mA, CE = V
OUT
IL
1
±
5
10
CC
VCC + 0.5 V
±
1
±
5
10
25 mA
µ
A
µ
A
µ
A
µ
A
µ
A
V
µ
A
µ
A
µ
A
µ
A
4
AT27BV020
Page 5
AC Characteristics for Read Operat ion
(V
= 2.7V to 3.6V and 4.5V to 5.5V)
CC
AT27BV020
AT27BV020
-90 -12 -15
Symbol Parameter Condition
(3)
t
ACC
t
CE
t
OE
t
DF
t
OH
(2)
(2)(3)
(4)(5)
Address to Output Delay CE = OE = V CE to Output Delay OE = V OE to Output Delay CE = V OE or CE High to Output Float,
whichever occurred first Output Hold from Address, CE or OE,
whichever occurre d firs t
Note: 2,3,4,5. - see AC Waveforms for Read Operation
AC Waveforms for Read Operation
(1)
Min Max Min Max Min Max
IL
IL
IL
90 120 150 ns 90 120 150 ns 50 50 60 ns
Units
40 40 50 ns
0 00ns
= Preliminary Information
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE
may be delayed up to t
- tOE after the address is valid without impact on t
ACC
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
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Input Test Waveform and Measurement LevelInput Test Waveform and Measurement Level
Note: CL = 100 pF including jig capacitance.
tR, tF < 20 ns (10% to 90%)
Output Test Load
Pin Capacitance
(f = 1 MHz, T = 25°C)
(1)
Typ Max Units Conditions
C
IN
C
OUT
Note: Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
48pF V 812pF V
IN
OUT
= 0V
= 0V
6
AT27BV020
Page 7
AT27BV020
Programming Waveforms
(1)
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and t
are characteristics of the device but must be accommodated by the programmer.
DFP
3. When programming the AT27BV020 a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
I
LI
V
IL
V
IH
V
OL
V
OH
I
CC2
I
PP2
V
ID
Input Load Current V Input Low Level -0.6 0.8 V Input High Level 2.0 VCC + 0.5 V Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA2.4 V VCC Supply Current
(Program and Verify) VPP Supply Curr ent CE = PGM = V A9 Product
Identification Voltage
= VIL,V
IN
IH
Limits
UnitsMin Max
10
±
A
µ
40 mA
IL
20 mA
11.5 12.5 V
7
Page 8
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
(1)
(3)
(2)
Symbol
t
AS
t
CES
t
OES
t
DS
t
AH
t
DH
t
DFP
t
VPS
t
VCS
t
PW
t
OE
t
PRT
Test Conditions
Address Setup Time CE Setup Time 2 OE Setup Time 2 Data Setup Time 2 Address Hold Time 0 Data Hold Time 2 OE High to Output Float Delay VPP Setup Time 2 VCC Setup Time 2 PGM Program Pulse Width Data Valid from OE 150 ns VPP Pulse Rise Time During
Programming
AC Conditions of Test
Input Rise and Fall Times
(10% to 90%) 20ns
Input Pulse Levels
0.45V to 2.4V
Input Timing Reference Level
0.8V to 2.0V
Output Timing Reference Level
0.8V to 2.0V
Limits
UnitsParameter Min Max
2
µ µ µ µ µ µ
0 130 ns
µ µ
95 105
µ
50 ns
s s s s s s
s s s
Notes: 1. V
must be applied simultaneously or before VPP and removed simultaneously or after VPP.
CC
2. This parameter is only sa mp led and is not 1 00% tes t ed . O utp ut Fl oat is defined as the point whe r e da ta i s no lon ge r driven
—see timing diagram.
3. Program Pulse wi dth tolerance is 100 µsec ± 5%.
Atmel’s 27BV020 Integrated Product Identification Code
(1)
Pins Codes Manufacturer Device Type
0000111101E 11000011086
Note: The AT27BV020 has the same Product Identification Code as the AT27C020. Both are programming compatible.
Hex
DataA0 O7 O6 O5 O4 O3 O2 O1 O0
8
AT27BV020
Page 9
Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The address is set to the first location. V
is raised to 13.0V. Each address is first programmed
V
PP
with one 100 µs PGM verification/reprogramming loop is executed for each address. In the even t a byte fails to pass verifi cation, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses
pulse without verification. Then a
is raised to 6.5V and
CC
AT27BV020
have been applied, the part is cons idered failed. After the byte verifies properly, the next address is selected until all have been checked. V
5.0V. All bytes are read again and compared with the o r igi ­nal data to determine if the device passes or fails.
is then lowered to 5.0V and VCC to
PP
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Page 10
Ordering Information
VCC = 3.6V
t
(ns)
ACC
90 8 0.02 AT27BV020-90CC
8 0.02 AT27BV020-90CI
120 8 0.02 AT27BV020-12CC
8 0.02 AT27BV020-12CI
150 8 0.02 AT27BV020-15CC
8 0.02 AT27BV020-15CI
I
CC
(mA)
Ordering Code Package Operation RangeActive Standby
AT27BV020-90JC AT27BV020-90TC AT27BV020-90VC
AT27BV020-90JI AT27BV020-90TI AT27BV020-90VI
AT27BV020-12JC AT27BV020-12TC AT27BV020-12VC
AT27BV020-12JI AT27BV020-12TI AT27BV020-12VI
AT27BV020-15JC AT27BV020-15TC AT27BV020-15VC
AT27BV020-15JI AT27BV020-15TI AT27BV020-15VI
42C 32J 32T 32V
42C 32J 32T 32V
42C 32J 32T 32V
42C 32J 32T 32V
42C 32J 32T 32V
42C 32J 32T 32V
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
Package Type
42C 42-Ball, Plastic Chip-Scale Ball Grid Array (CBGA) (8 x 8mm) 32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 32T 32-Lead, Plastic Thin Small Outline Package (TSOP) (8 x 20mm) 32V 32-Lead, Plastic Thin Small Outline Package (VSOP) (8 x 14mm)
10
AT27BV020
= Preliminary Information
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