Datasheet AT25080B, AT25160B, AT25320B, AT25640B Datasheet
AT25080B/AT25160B/
AT25320B/AT25640B
SPI Automotive Temperature Serial EEPROM
8 Kbits (1,024 x 8), 16 Kbits (2,048 x 8),
32 Kbits (4,096 x 8) and 64 Kbits (8,192 x 8)
Features
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1):
– Data sheet describes mode 0 operation
• Low-Voltage and Medium-Voltage Operation:
– Grade 1, VCC = 2.5V to 5.5V
– Grade 3, VCC = 1.7V to 5.5V
• Extended Temperature Range (Grade 1 and Grade 3 as defined in AEC-Q100):
– Grade 1 Temperature Range: -40°C to +125°C
– Grade 3 Temperature Range: -40°C to +85°C
• 5 MHz Clock Rate (5V)
• 32‑Byte Page Mode
• Block Write Protection:
– Protect 1/4, 1/2 or entire array
• Write-Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
• Self-Timed Write Cycle within 5 ms Maximum
• Automotive AEC-Q100 Qualified
• High Reliability:
– Endurance: 1,000,000 write cycles
– Data retention: 100 years
• Green (Lead-free/Halide-free/RoHS Compliant) Package Options
Packages
• 8-Lead SOIC, 8-Lead TSSOP and 8-Pad UDFN
© 2020 Microchip Technology Inc.
DS20006310A-page 1
AT25080B/AT25160B/AT25320B/AT25640B
Table of Contents
Features......................................................................................................................................................... 1
Packages........................................................................................................................................................1
1. Package Types (not to scale)..................................................................................................................4
2. Pin Description........................................................................................................................................ 5
2.1. Chip Select (CS)...........................................................................................................................5
2.2. Serial Data Output (SO)............................................................................................................... 5
2.3. Write-Protect (WP)....................................................................................................................... 5
2.4. Ground (GND).............................................................................................................................. 5
2.5. Serial Data Input (SI)....................................................................................................................6
2.6. Serial Data Clock (SCK)...............................................................................................................6
2.7. Suspend Serial Input (HOLD).......................................................................................................6
2.8. Device Power Supply (VCC)......................................................................................................... 6
3. Description.............................................................................................................................................. 7
3.1. SPI Bus Master Connections to Serial EEPROMs.......................................................................7
3.2. Block Diagram.............................................................................................................................. 8
4. Electrical Characteristics.........................................................................................................................9
4.1. Absolute Maximum Ratings..........................................................................................................9
4.2. DC and AC Operating Range.......................................................................................................9
4.3. DC Characteristics....................................................................................................................... 9
4.4. AC Characteristics......................................................................................................................10
4.5. SPI Synchronous Data Timing....................................................................................................11
4.6. Electrical Specifications..............................................................................................................11
5. Device Operation.................................................................................................................................. 13
5.1. Interfacing the AT25080B/AT25160B/AT25320B/AT25640B on the SPI Bus.............................13
5.2. Device Opcodes......................................................................................................................... 14
5.3. Hold Function............................................................................................................................. 14
5.4. Write Protection..........................................................................................................................15
6. Device Commands and Addressing......................................................................................................16
6.1. STATUS Register Bit Definition and Function............................................................................ 16
6.2. Read STATUS Register (RDSR)..................................................................................................17
6.3. Write Enable (WREN) and Write Disable (WRDI)......................................................................... 17
6.4. Write STATUS Register (WRSR)..................................................................................................18
7. Read Sequence.................................................................................................................................... 21
8. Write Sequence.....................................................................................................................................22
8.1. Byte Write...................................................................................................................................22
8.2. Page Write..................................................................................................................................22
8.3. Polling Routine........................................................................................................................... 23
9. Packaging Information.......................................................................................................................... 24
© 2020 Microchip Technology Inc.
DS20006310A-page 2
AT25080B/AT25160B/AT25320B/AT25640B
9.1. Package Marking Information.....................................................................................................24
10. Revision History.................................................................................................................................... 33
The Microchip Website.................................................................................................................................34
Product Change Notification Service............................................................................................................34
Customer Support........................................................................................................................................ 34
Product Identification System.......................................................................................................................35
Microchip Devices Code Protection Feature................................................................................................ 36
Legal Notice................................................................................................................................................. 36
Trademarks.................................................................................................................................................. 36
Quality Management System....................................................................................................................... 37
Worldwide Sales and Service.......................................................................................................................38
© 2020 Microchip Technology Inc.
DS20006310A-page 3
8-Lead SOIC/TSSOP
(Top View)
CS 1
2
3
4
8
7
6
5
SO
WP
GND
Vcc
HOLD
SCK
SI
CS
SO
WP
GND
Vcc
HOLD
SCK
SI
8-Pad UDFN
(Top View)
1
2
3
4 5
6
7
8
AT25080B/AT25160B/AT25320B/AT25640B
1. Package Types (not to scale)
Package Types (not to scale)
© 2020 Microchip Technology Inc.
DS20006310A-page 4
2. Pin Description
The descriptions of the pins are listed in Table 2-1.
Table 2-1. Pin Function Table
Name 8-Lead SOIC 8-Lead TSSOP 8-Pad UDFN
CS 1 1 1 Chip Select
SO 2 2 2 Serial Data Output
(2)
WP
GND 4 4 4 Ground
SI 5 5 5 Serial Data Input
SCK 6 6 6 Serial Data Clock
(2)
HOLD
V
CC
Note:
1. The exposed pad on this package can be connected to GND or left floating.
2. The Write-Protect (WP) and Hold (HOLD) pins should be driven high or low as appropriate.
AT25080B/AT25160B/AT25320B/AT25640B
Pin Description
(1)
3 3 3 Write-Protect
7 7 7 Suspends Serial Input
8 8 8 Device Power Supply
Function
2.1 Chip Select (CS)
The AT25080B/AT25160B/AT25320B/AT25640B is selected when the Chip Select (CS) pin is low. When the device is
not selected, data will not be accepted via the Serial Data Input (SI) pin, and the Serial Output (SO) pin will remain in
a high‑impedance state.
To ensure robust operation, the CS pin should follow VCC upon power-up. It is therefore recommended to connect CS
to VCC using a pull-up resistor (less than or equal to 10 kΩ). After power-up, a low level on CS is required prior to any
sequence being initiated.
2.2 Serial Data Output (SO)
The Serial Data Output (SO) pin is used to transfer data out of the AT25080B/AT25160B/AT25320B/AT25640B.
During a read sequence, data is shifted out on this pin after the falling edge of the Serial Data Clock (SCK).
2.3 Write-Protect (WP)
The Write-Protect (WP) pin will allow normal read/write operations when held high. When the WP pin is brought low
and the WPEN bit is set to a logic ‘1’, all write operations to the STATUS register are inhibited. WP going low while
CS is still low will interrupt a write operation to the STATUS register. If the internal write cycle has already been
initiated, WP going low will have no effect on any write operation to the STATUS register. The WP pin function is
blocked when the WPEN bit in the STATUS register is set to a logic ‘0’. This will allow the user to install the
AT25080B/AT25160B/AT25320B/AT25640B in a system with the WP pin tied to ground and still be able to write to the
STATUS register. All WP pin functions are enabled when the WPEN bit is set to a logic ‘1’.
2.4 Ground (GND)
The ground reference for the Device Power Supply (VCC). The Ground (GND) pin should be connected to the system
ground.
© 2020 Microchip Technology Inc.
DS20006310A-page 5
AT25080B/AT25160B/AT25320B/AT25640B
2.5 Serial Data Input (SI)
The Serial Data Input (SI) pin is used to transfer data into the device. It receives instructions, addresses and data.
Data is latched on the rising edge of the Serial Data Clock (SCK).
2.6 Serial Data Clock (SCK)
The Serial Data Clock (SCK) pin is used to synchronize the communication between a master and the AT25080B/
AT25160B/AT25320B/AT25640B. Instructions, addresses or data present on the Serial Data Input (SI) pin is latched
in on the rising edge of SCK, while output on the Serial Data Output (SO) pin is clocked out on the falling edge of
SCK.
2.7 Suspend Serial Input (HOLD)
The Suspend Serial Input (HOLD) pin is used in conjunction with the Chip Select (CS) pin to pause the AT25080B/
AT25160B/AT25320B/AT25640B. When the device is selected and a serial sequence is underway, HOLD can be
used to pause the serial communication with the master device without resetting the serial sequence. To pause, the
HOLD pin must be brought low while the Serial Data Clock (SCK) pin is low. To resume serial communication, the
HOLD pin is brought high while the SCK pin is low (SCK may still toggle during HOLD). Inputs to the Serial Data
Input (SI) pin will be ignored while the Serial Data Output (SO) pin will be in the high‑impedance state.
Pin Description
2.8 Device Power Supply (VCC)
The Device Power Supply (VCC) pin is used to supply the source voltage to the device. Operations at invalid V
voltages may produce spurious results and should not be attempted.
CC
© 2020 Microchip Technology Inc.
DS20006310A-page 6
SPI Master:
Microcontroller
Slave 0
AT25XXX
Data Clock (SCK)
Data Output (SO)
Data Input (SI)
CS3 CS2 CS1 CS0
SI SO SCK
CS
Slave 1
AT25XXX
SI SO SCK
Slave 2
AT25XXX
SI SO SCK
Slave 3
AT25XXX
SI SO SCK
CS
CSCS
AT25080B/AT25160B/AT25320B/AT25640B
3. Description
The AT25080B/AT25160B/AT25320B/AT25640B provides 8,192/16,384/32,768/65,536 bits of Serial Electrically
Erasable and Programmable Read-Only Memory (EEPROM) organized as 1,024/2,048/4,096/8,192 words of 8 bits
each. The device is optimized for use in many industrial and commercial applications where low‑power and
low‑voltage operation are essential. The device is available in space-saving 8‑lead SOIC, 8‑lead TSSOP and 8‑pad
UDFN packages. All packages operate from 1.7V to 5.5V.
3.1 SPI Bus Master Connections to Serial EEPROMs
Description
© 2020 Microchip Technology Inc.
DS20006310A-page 7
3.2 Block Diagram
GND
Memory
System Control
Module
High-Voltage
Generation
Circuit
Address Register
and Counter
Write Protection
Control
VCC
SCK
SI
Power-on
Reset
Generator
Row Decoder
Data Register
SO
Pause
Operation
Control
Register Bank:
STATUS Register
Data Output
Buffer
CS
WP
HOLD
1 page
EEPROM Array
Column Decoder
AT25080B/AT25160B/AT25320B/AT25640B
Description
© 2020 Microchip Technology Inc.
DS20006310A-page 8
AT25080B/AT25160B/AT25320B/AT25640B
4. Electrical Characteristics
4.1 Absolute Maximum Ratings
Operating temperature -40°C to +125°C
Storage temperature -65°C to +150°C
Voltage on any pin with respect to ground -1.0V to +7.0V
V
CC
DC output current 5.0 mA
ESD protection > 2 kV
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Electrical Characteristics
6.25V
4.2 DC and AC Operating Range
Table 4-1. DC and AC Operating Range
AT25080B/AT25160B/AT25320B/AT25640B Automotive Grade 1 Automotive Grade 3
Operating Temperature (Case) -40°C to +125°C -40°C to +85°C
VCC Power Supply 2.5V to 5.5V 1.7V to 5.5V
4.3 DC Characteristics
CC1
CC2
CC1
CC2
CC3
SB1
SB2
SB3
IL
OL
IL
(2)
(1)
2.5 — 5.5 V Grade 1
1.7 — 5.5 V Grade 3
-3.0 — 3.0 µA VIN = 0V to V
-3.0 — 3.0 µA VIN = 0V to V
-0.6 — VCC x 0.3 V
Table 4-2. DC Characteristics
Parameter Symbol Minimum Typical Maximum Units Conditions
Supply Voltage V
Supply Voltage V
Supply Current I
Supply Current I
Supply Current I
Standby Current I
Standby Current I
Standby Current I
Input Leakage I
Output Leakage I
Input Low‑Voltage V
— — 6.0 mA VCC = 5.0V at 5 MHz,
SO = Open, Read
— — 3.0 mA VCC = 5.0V at 1 MHz
— — 7.0 mA VCC = 5.0V at 5 MHz,
SO = Open, Read, Write
— 0.1 9.0 µA VCC = 1.7V, CS = V
— 0.2 10.0 µA VCC = 2.5V, CS = V
— 2.0 13.0 µA VCC = 5.0V, CS = V
CC
CC
CC
CC
CC
© 2020 Microchip Technology Inc.
DS20006310A-page 9
...........continued
Parameter Symbol Minimum Typical Maximum Units Conditions
Input High‑Voltage V
Output Low‑Voltage V
Output High‑Voltage V
Output Low‑Voltage V
Output High‑Voltage V
Note:
1. Applicable over recommended operating range from: TA1 = -40°C to +125°C, V
to +85°C, V
= 1.7V to 5.5V.
CC2
2. VIL min and VIH max are reference only and are not tested.
4.4 AC Characteristics
Table 4-3. AC Characteristics
Parameter Symbol Minimum Maximum Units Conditions
IH
OL1
OH1
OL2
OH2
AT25080B/AT25160B/AT25320B/AT25640B
Electrical Characteristics
(2)
VCC x 0.7 — VCC + 0.5 V
— — 0.4 V 2.5V ≤ VCC ≤ 5.5V IOL = 3.0 mA
VCC - 0.8 — — V 2.5V ≤ VCC ≤ 5.5V IOH = -1.6 mA
— — 0.2 V 1.7V ≤ VCC ≤ 5.5V IOL = 0.15 mA
VCC - 0.2 — — V 1.7V ≤ VCC ≤ 5.5V IOH = -100 µA
= 2.5V to 5.5V, TA2 = -40°C
CC1
(1)
SCK Clock Frequency f
Input Rise Time t
Input Fall Time t
SCK High Time t
SCK Low Time t
CS High Time t
CS Setup Time t
CS Hold Time t
Data In Setup Time t
Data In Hold Time t
HOLD Setup Time t
HOLD Hold Time t
Output Valid t
Output Hold Time t
HOLD to Output Low Z t
HOLD to Output High Z t
Output Disable Time t
Write Cycle Time t
SCK
RI
FI
WH
WL
CS
CSS
CSH
SU
H
HD
CD
V
HO
LZ
HZ
DIS
WC
0 5 MHz
— 2000 ns
— 2000 ns
40 — ns
40 — ns
80 — ns
80 — ns
80 — ns
5 — ns
20 — ns
40 — ns
40 — ns
0 40 ns
0 — ns
0 40 ns
— 80 ns
— 80 ns
— 5 ms
Note:
1. Applicable over recommended operating ranges from TA1 = -40°C to +125°C, V
TA2 = -40°C to +85°C, V
© 2020 Microchip Technology Inc.
= 1.7V to 5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted).
CC2
= 2.5V to 5.5V and
CC1
DS20006310A-page 10
t
DIS
t
HO
t
CSH
t
CS
t
V
t
H
V
OH
V
OL
High
Impedance
Valid Data In
t
WH
V
IH
V
IH
V
IL
t
CSS
t
WL
SCK
SI
SO
CS
V
IL
V
IH
V
IL
t
SU
High
Impedance
AT25080B/AT25160B/AT25320B/AT25640B
4.5 SPI Synchronous Data Timing
Electrical Characteristics
4.6 Electrical Specifications
4.6.1 Power-Up Requirements and Reset Behavior
During a power-up sequence, the VCC supplied to the AT25080B/AT25160B/AT25320B/AT25640B should
monotonically rise from GND to the minimum VCC level, as specified in Table 4-1, with a slew rate no faster than
0.1 V/µs.
4.6.1.1 Device Reset
To prevent inadvertent write operations or any other spurious events from occurring during a power-up sequence, the
AT25080B/AT25160B/AT25320B/AT25640B includes a Power-on Reset (POR) circuit. Upon power-up, the device will
not respond to any instructions until the VCC level crosses the internal voltage threshold (V
out of Reset and into Standby mode.
The system designer must ensure the instructions are not sent to the device until the VCC supply has reached a
stable value greater than or equal to the minimum VCC level. Additionally, once the VCC is greater than or equal to the
minimum VCC level, the bus master must wait at least t
4-4 for the values associated with these power-up parameters.
(1)
level specified, it is recommended that a full-power cycle sequence be performed by
POR
Table 4-4. Power-Up Conditions
Symbol Parameter Min. Max. Units
t
PUP
V
POR
t
POFF
Time required after VCC is stable before the device can accept instructions 100 － µs
Power-on Reset Threshold Voltage － 1.5 V
Minimum time at VCC = 0V between power cycles 500 － ms
Note:
1. These parameters are characterized but they are not 100% tested in production.
If an event occurs in the system where the VCC level supplied to the AT25080B/AT25160B/AT25320B/AT25640B
drops below the maximum V
first driving the VCC pin to GND in less than 1 ms, waiting at least the minimum t
power-up sequence in compliance with the requirements defined in this section.
© 2020 Microchip Technology Inc.
) that brings the device
POR
before sending the first instruction to the device. See Table
PUP
time and then performing a new
POFF
DS20006310A-page 11
4.6.2 Pin Capacitance
Table 4-5. Pin Capacitance
Symbol Test Condition Max. Units Conditions
AT25080B/AT25160B/AT25320B/AT25640B
Electrical Characteristics
(1,2)
C
C
OUT
IN
Output Capacitance (SO) 8 pF V
Input Capacitance (CS, SCK, SI, WP, HOLD) 6 pF VIN = 0V
Note:
1. This parameter is characterized but is not 100% tested in production.
2. Applicable over recommended operating range from: TA = 25°C, f
noted).
4.6.3 EEPROM Cell Performance Characteristics
Table 4-6. EEPROM Cell Performance Characteristics
Operation Test Condition Min. Max. Units
Write Endurance
(1)
TA = 25°C, VCC = 3.3V,
Page Write mode
Data Retention
(1)
TA = 55°C 100 — Years
Note:
1. Performance is determined through characterization and the qualification process.
4.6.4 Software Reset
The SPI interface of the AT25080B/AT25160B/AT25320B/AT25640B can be reset by toggling the CS input. If the CS
line is already in the Active state, it must complete a transition from the Inactive state (≥VIH) to the Active state (≤VIL)
and then back to the Inactive state (≥VIH) without sending clocks on the SCK line. Upon completion of this sequence,
the device will be ready to receive a new opcode on the SI line.
= 0V
OUT
= 1.0 MHz, VCC = 5.0V (unless otherwise
SCK
1,000,000 — Write Cycles
4.6.5 Device Default State at Power-Up
The AT25080B/AT25160B/AT25320B/AT25640B default state upon power-up consists of:
• Standby Power mode
• A high-to-low-level transition on CS is required to enter Active state
• Write Enable Latch (WEL) bit in the STATUS register = 0
• Ready/Busy bit in the STATUS register = 0, indicating the device is ready to accept a new command
• Device is not selected
• Not in Hold condition
• WPEN, BP1 and BP0 bits in the STATUS register are unchanged from their previous state due to the fact that
they are nonvolatile values
4.6.6 Device Default Condition
The AT25080B/AT25160B/AT25320B/AT25640B is shipped from Microchip to the customer with the EEPROM array
set to an all FFh data pattern (logic ‘1’ state). The Write-Protect Enable bit in the STATUS register is set to logic ‘0’
and the Block Write‑Protect bits in the STATUS register are set to logic ‘0’.
© 2020 Microchip Technology Inc.
DS20006310A-page 12
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