Page 1
Tj
-30 /
standard specification
ANSALDO
Ansaldo Trasporti s.p.a.
Unita' Semiconduttori
PHASE CONTROL THYRISTOR AT202
Repetitive voltage up to 800 V
Mean on-state current 635 A
Surge current 6 kA
TARGET SPECIFICATION
Feb 97 - ISSUE : 03
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY
Tel. int. +39/(0)10 6556549 - (0)10 6556488
Fax Int. +39/(0)10 6442510
Tx 270318 ANSUSE I -
Symbol Characteristic Conditions
[°C]
Value Unit
BLOCKING
V RRM Repetitive peak reverse voltage 150 800 V
V RSM Non-repetitive peak reverse voltage 150 900 V
V DRM Repetitive peak off-state voltage 150 800 V
I RRM Repetitive peak reverse current V=VRRM 150 30 mA
I DRM Repetitive peak off-state current V=VDRM 150 30 mA
CONDUCTING
I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 635 A
I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 575 A
I TSM Surge on-state current sine wave, 10 ms 150 6 kA
I² t I² t without reverse voltage 180 x1E3 A²s
V T On-state voltage On-state current = 800 A 150 1.19 V
V T(TO) Threshold voltage 150 0.8 V
r T On-state slope resistance 150 0.490 mohm
SWITCHING
di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 450 A, gate 10V 5ohm 150 320 A/µs
dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 150 500 V/µs
td Gate controlled delay time, typical VD=100V, gate source 10V, 10 ohm , tr=.5 µs 25 1.6 µs
tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 75% VDRM 200 µs
Q rr Reverse recovery charge di/dt=-20 A/µs, I= 290 A 150 µC
I rr Peak reverse recovery current VR= 50 V A
I H Holding current, typical VD=5V, gate open circuit 25 300 mA
I L Latching current, typical VD=5V, tp=30µs 25 700 mA
GATE
V GT Gate trigger voltage VD=5V 25 3.5 V
I GT Gate trigger current VD=5V 25 200 mA
V GD Non-trigger gate voltage, min. VD=VDRM 150 0.25 V
V FGM Peak gate voltage (forward) 20 V
I FGM Peak gate current 8 A
V RGM Peak gate voltage (reverse) 5 V
P GM Peak gate power dissipation Pulse width 100 µs 75 W
P G Average gate power dissipation 1 W
MOUNTING
R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 95 °C/kW
R th(c-h) Thermal impedance Case to heatsink, double side cooled 20 °C/kW
T j Operating junction temperature
F Mounting force 4.9 / 5.9 kN
Mass 55 g
ORDERING INFORMATION : AT202 S 08
VDRM&VRRM/100
150 °C
Page 2
AT202 PHASE CONTROL THYRISTOR
ANSALDO
TARGET SPECIFICATION Feb 97 - ISSUE : 03
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
150
140
130
120
110
100
90
80
70
60
50
PF(AV) [W]
1000
900
800
700
600
500
30°
60°
90°
120°
180°
DC
0 200 400 600 800 1000
IF(AV) [A]
DC
120°
90°
60°
30°
180°
400
300
200
100
0
0 200 400 600 800 1000
IF(AV) [A]
Page 3
AT202 PHASE CONTROL THYRISTOR
ANSALDO
ANSALDO
TARGET SPECIFICATION Feb 97 - ISSUE : 03
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
150
140
130
120
110
100
90
80
70
60
50
0 200 400 600 800 1000
30°
60°
90°
120°
180°
PF(AV) [W]
1000
900
800
700
600
500
400
300
200
100
0
IF(AV) [A]
180°
120°
90°
60°
30°
0 200 400 600 800 1000
IF(AV) [A]
Page 4
AT202 PHASE CONTROL THYRISTOR
ON-STATE CHARACTERISTIC
On-state Current [A]
Zth j-h [°C/kW]
SURGE CHARACTERISTIC
ITSM [kA]
ANSALDO
TARGET SPECIFICATION Feb 97 - ISSUE : 03
Tj = 150 °C
2000
1800
1600
1400
1200
1000
800
600
400
200
0
0.6 1.1 1.6
On-state Voltage [V]
Tj = 150 °C
6
5
4
3
2
1
0
1 10 100
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
0.001 0.01 0.1 1 10 100
t[s]
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03
mm and roughness < 2 µm.
In the interest of product improvement ANSALDO reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
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