Datasheet ASM5206C Datasheet (APLUS)

PLUS MAKE YOUR PRODUCTION A-PLUS

A

ASM5206C

DATA SHEET

PLUS INTEGRATED CIRCUITS INC.

A

Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.

TEL: [phone]

FAX: [phone]

WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail: Mr. Jason

[e-mail]

Technology E-mail: Mr. George

[e-mail]

ASM5206C DATA SHEET

–

ASM5206C

1.0 General Description

The ASM5206C is very low cost voice synthesizer with 4-bit microprocessor. It has various

features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog

timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS

technology and halt function can minimize power dissipation. Its architecture is similar to RISC,

with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle,

except for program branches and data table read instructions (which need two instruction

cycles).

1.1 Feature

Single power supply can operate from 2.4V through 5V



VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR

Internal Program ROM: 4K x 10-bit



1 sets of 18-bit DPR can access up to 160K x 10 bits data memory space



Data Registers:



• 64 x 4-bit data RAM (00-1Fh plus 40h-5Fh)

• Unbanked special function registers (SFR) range: 20h-3Fh

I/O Ports:



• PRA: 4-bit I/O Port A (2Bh)

• PRB: 2-bit Output Port B (2Dh)

On-chip clock generator: Resistive Clock Drive(RM)



Timer: 1



• Timer0: a 9-bit auto-reload timer/counter

Stack: 2-level subroutine nesting



HALT and Release from HALT function to reduce power consumption



Watch Dog Timer (WDT)



Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles



Number of instruction: 22



The Voice function can be implemented by microprocessor instruction



• One 8-bit COUT output for ASMxxxxx

This product is empowered by HQPCM Technology by Aplus licensed from BD&C.

1

Rev 1.0 2002/09/22

FIGURE 1.1 : Block Diagram of ASM5206C

(12)

]

(4)

)

Data Bus[3:0]

ASM5206C

(ADDR[17:12])

=00000b

COUT

PCLATCH(8)

PCH(8) PCL(4)

DPR3,2,1

DLATCH(10)

Data Bus[3:0

Accumlator

ALU(4)

Register(4)

One-Channel

( Voice synthesizer )

COUT

PC[11:0]

ADDR[17:0]

DPR[17:0]

P1,P2,P3,P4

enter test mode

Reset Chip

Reset Chip

ROM_Data[9:0]

Immediate(4

Stack

(2-Level)

ROM_ADDR[17:0]

Program

(Data)

ROM

SRAM

(64 x 4)

00h-1Fh
40h-5Fh

Clock Generator

Test select

Power on Reset

RESET pin

Instruction Bus [9:0]

Instruction Bus [9:0]

Timer0(9)

OSC

VDD/GND

PRA0

ROM Latch

Instruction

Latch

Instruction

Decoder

Control Signal

Instruction Bus [9:0]

PRA(4)
PRB(2)

weak or strong
pull-low for PRA,

PRB, PRC

PRASL(4)

2

Rev 1.0 2002/09/22

FIGURE 1.2 : External ROM Map of ASM5206C

g

PC[11:0]

ASM5206C

00000h-17FFFh

12bit x 2 STACK

17-bit Data Pointer

Reserved for Testing

ram and data ROM

Pro

Data ROM

Reset Vector

00000h

00080h

00080h-003FFh

00400h

00FFFh(4K)

00000h-00FFFh

17FFFh(160Kx10-bits)

3

Rev 1.0 2002/09/22

1.2 Pin-Out

ASM5206C Pin-Out

I

VDD
PRA3-1

PRA0/RESET

OSC
COUT
GND
TEST
PRB0-1

I/O

Std./O.D.

I/O

Std./O.D.

I

O

I
O
O Std./O.D. Output type with standard or Open-Drain output

1.3 Application circuit

-

STI

STI

-

-

-

-

ASM5206C

Power supply during operation
I/O port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Output type with standard or Open-Drain output
I/O port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Output type with standard or Open-Drain output

Mask option selected as an external RESET pin with weak pull-low capability

RM mode Oscillator input
Current Output of Audio
Circuit Ground Potential
Enter Test Mode. ( TEST = High )

4

Rev 1.0 2002/09/22

1.4 Bonding Diagram

ASM5206C

X= 1550+80(um)

Y= 2700+80(um)

ASM5206C

160K x 10 bit ROM

11

10

9

1

2

3

CHIP SIZE: X= 1550+80(um) , Y= 2700+80(um)

4

5

6

7

8

Substrate must be connected to GND.

ASM5206C Pad Location CHIP SIZE: X= 1550+80(um) , Y= 2700+80(um)
PAD # PAD Name X Y PAD # PAD Name X Y

1 RA3 -664.92 -944.32 7 TEST_PAD 105.44 -1269
2 RA2 -664.92 -1072.44 8 COUT 303.96 -1269
3 RA1 -662.64 -1269 9 VDD 683.04 -1269
4
5 OSC -281.04 -1269 11 RB1 664.92 -949.6
6 GND -111.72 -1269

RA0

-468.24 -1269 10 RB0 664.92 -1068

5

Rev 1.0 2002/09/22

ASM5206C

1.5 DC Characteristics for ASM5206C

SYMBOL PARAMETER VDD MIN. TYP. MAX. UNIT CONDITION

VDD OPERATING VOLTAGE 2.4 3 5.5 V depending on Freq.

Isb STANDBY

Iop

Iih

Ioh OUTPUT HIGH CURRENT

Iol OUTPUT LOW CURRENT

Cout

dF/F

dF/F Fosc VARIATION -20 20 %

SUPPLY

CURRENT

INPUT CURRENT

/Internal pull low

DA CURRENT OUT

(FULL SCALE)

FREQUENCY

OPERATING

STABILITY

3 1
5 1
3 2
5 7
3 3
5 9

5 -5.2

3 -3
5 -8
3 7
5 20
3 4
5 5.2

-10 10 %

uA

mA

uA

mA

4MHz, RM

in HALT Mode

4MHz, RM

IO Floating

4MHz, RM

in HALT Mode

(IO Ports with weak

pull-high pull-low)

4MHz, RM

(IO ports)

Fosc(3v- 2.4v)

Fosc (3v)
VDD=3V,

Rosc=820k, 4MHz

FIGURE 1.3 : Frequency Range for Rosc in RM mode

Resistor(k ohm) 1000 820 560 470

3v Freq.(MHz) 3.66 4 6.2 7.16

Rosc & Freq.

8

7.16

6

6.2

4

Freq. MHz

2

0

0 200 400 600 800 1000 1200

Rosc k ohm

4

3.66

6

Rev 1.0 2002/09/22