Datasheet ASM4106C Datasheet (APLUS)

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ASM4106C

DATA SHEET

PLUS INTEGRATED CIRCUITS INC.

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Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.

TEL: [phone]

FAX: [phone]

WEBSITE : http: //www.aplusinc.com.tw

Sales E-mail: Mr. Jason

[e-mail]

Technology E-mail: Mr. George

[e-mail]

ASM4106C Data Sheet

Aplus

ASM4106C – VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR

1.0 General Description

The ASM4106C is very low cost voice synthesizer with 4-bit microprocessor. It has various features

including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer(WDT), voice

synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function

can minimize power dissipation. Its architecture is similar to RISC, with two stages of instruction

pipeline. It allows all instructions to be executed in a single cycle, except for program branches and

data table read instructions (which need two instruction cycles).

1.1 Feature



Single power supply can operate from 2.4V through 5V



Internal Program ROM: 4K x 10-bit



1 sets of 17-bit DPR can access up to 128K x 10 bits data memory space



Data Registers:

• 64 x 4-bit data RAM (00-1Fh plus 40h-5Fh)

• Unbanked special function registers (SFR) range: 20h-3Fh



I/O Ports:

• PRA: 4-bit I/O Port A (2Bh)

• PRB: 2-bit Output Port B (2Dh)



On-chip clock generator: Resistive Clock Drive(RM)



Timer: 1

• Timer0: a 9-bit auto-reload timer/counter



Stack: 2-level subroutine nesting



HALT and Release from HALT function to reduce power consumption



Watch Dog Timer (WDT)

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Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles



Number of instruction: 22



The Voice function can be implemented by microprocessor instruction

1

Rev 1.0

FIGURE 1.1 : Block Diagram of ASM4106C

(12)

]

(4)

)

Aplus

Data Bus[3:0]

ASM4106C Data Sheet

(ADDR[16:12])

=00000b

COUT

PCLATCH(8)

PCH(8) PCL(4)

DPR3,2,1

DLATCH(10)

Data Bus[3:0

Accumlator

ALU(4)

Register(4)

One-Channel

( Voice synthesizer )

COUT

PC[11:0]

ADDR[16:0]

DPR[16:0]

P1,P2,P3,P4

enter test mode

Reset Chip

Reset Chip

ROM_Data[9:0]

Immediate(4

Stack

(2-Level)

ROM_ADDR[16:0]

Program

(Data)

ROM

SRAM

(64 x 4)

00h-1Fh
40h-5Fh

Clock Generator

Tes t s el ect

Power on Reset

RESET pin

Instruction Bus [9:0]

Instruction Bus [9:0]

Timer0(9)

OSC

VDD/GND

PRA0

ROM Latch

Instruction

Latch

Instruction

Decoder

Control Signal

Instruction Bus [9:0]

PRA(4)
PRB(2)

weak or strong
pull-low for PRA,

PRB, PRC

PRASL(4)

2

Rev 1.0

FIGURE 1.2 : External ROM Map of ASM4106C

g

Aplus

ASM4106C Data Sheet

00000h-1FFFFh

12bit x 2 STACK

17-bit Data Pointer

Reserved for Testing

ram and data ROM

Pro

PC[11:0]

Reset Vector

00000h

00080h

00080h-003FFh

00400h

00000h-00FFFh

00FFFh(4K)

Data ROM

1FFFFh(128Kx10-bits)

3

Rev 1.0

1.2 Pin-Out

Aplus

ASM4106C Pin-Out

VDD
PRA3-1

PRA0/RESET

OSC
COUT
GND
TEST
PRB0-1

I - Power supply during operation

I/O STI

I/O STI

I - RM mode Oscillator input

O - Current Output of Audio

I - Circuit Ground Potential
O - Enter Test Mode. ( TEST = High )
O Std./O.D. Output type with standard or Open-Drain output

1.3 Application circuit

Std./O.D.

Std./O.D.

ASM4106C Data Sheet

I/O port with programmable strong pull-low or weak pull-low or fix-input­floating capability
Output type with standard or Open-Drain output
I/O port with programmable strong pull-low or weak pull-low or fix-input­floating capability
Output type with standard or Open-Drain output

Mask option selected as an external RESET pin with weak pull-low capability

4

Rev 1.0

1.4 Bonding Diagram

Aplus

X= 1550+100(um)

Y= 2170+100(um)

ASM4106C Data Sheet

128K x 10 bit RO M

ASM4106C

1

CHIP SIZE: X= 1550+100(um) , Y= 2170+100(um)

2

3

ASM4106C Pad Location

PAD # PAD Name X Y PAD # PAD Name X Y

1 RA_PAD[3] -664.92 -675.72 7 TEST_PAD 105.44 -1000.4
2 RA_PAD[2] -664.92 -803.84 8 ACOUT 303.96 -1000.4
3 RA_PAD[1] -662.64 -1000.4 9 VDD 683.04 -1000.4
4 RA_PAD[0] -468.24 -1000.4 10 RB_PAD[0] 664.92 -799.4
5 AOSC -281.04 -1000.4 11 RB_PAD[1] 664.92 -681
6 GND -111.72 -1000.4

Chip Size: X=1550+100 (um), Y=2170+100 (um)

6 7 8 9 5 4

11

10

5

Rev 1.0

ASM4106C Data Sheet

Aplus

1.5 DC Characteristics for ASM4106C

SYMBOL PARAMETER VDD MIN. TYP. MAX. UNIT CONDITION

VDD

Isb

Iop

Iih

Ioh

Iol

dF/F

dF/F Fosc VARIATION -20 20 %

OPERATING

VOLTAGE

SUPPLY

CURREN

T

INPUT CURRENT

/Internal pull low

OUTPUT HIGH

CURRENT

OUTPUT LOW

CURRENT

FREQUENCY

STABILITY

STANDBY

OPERATING

2.4 3 5 V depending on Freq.

31
51
32
57
33
59

5 -5.2

3-3
5-8
37
520

-10 10 %

uA

mA

uA

mA

4MHz, RM

in HALT Mode

4MHz, RM
IO Floating

4MHz, RM

in HALT Mode

(IO Ports with

weak pull-high

4MHz, RM

(IO ports)

Fosc(3v)-

Fosc(2.4v)

VDD=3V,

Rosc=980k, 4MHz

pull-low)

Fosc (3v)

FIGURE 1.3 : Frequency Range for Rosc in RM mode

Resistor(k ohm) 1200 1000 820 470

3v Freq.(MHz)

8

6

4

Freq. MHz

2

0

0 200 400 600 800 1000 1200 1400

3.1

Rosc & Freq.

7.44

3.87

Rosc k ohm

4.53 7.44

4.53

3.87

3.1

6

Rev 1.0