frequency modulator designed specifically for input clock
frequencies from 25MHz to 45MHz. The ASM3P2108A
can generate an EMI reduced clock from crystal, ceramic
resonator, or system clock.
The ASM3P2108A reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of down stream clock and data dependent
signals. The ASM3P2108A allows significant system cost
Block Diagram
savings by reducing the number of circuit board layers
ferrite beads, shielding and other passive components
that are traditionally required to pass EMI regulations.
The ASM3P2108A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The ASM3P2108A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The ASM3P2108A is targeted towards EMI management
for high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
VDD
VCO
PLL
Output
Divider
XIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
GND
Alliance Semiconductor
2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
CLOCKOUT
Page 2
July 2005
ASM3P2108A
rev 0.3
Pin Configuration
Pin Description
Pin# Pin Name Type Description
1 XIN/CLKIN I
2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected.
XIN / CLKIN
XOUT
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected to either an external crystal or an external reference clock.
GND
NC
1
2
ASM3P2108A
3
4
8
NC
7
NC
6
VDD
5
CLOCKOUT
3 GND P Ground to entire chip.
4 NC - No connect.
5 CLOCKOUT O Spread spectrum low EMI output.
6 VDD P Power supply for the entire chip (5V).
7 NC - No connect.
8 NC - No connect.
Peak EMI Reducing Solution 2 of 7
Notice: The information in this document is subject to change without notice.
Page 3
July 2005
ASM3P2108A
rev 0.3
Absolute Maximum Ratings
Symbol Parameter Rating Unit
VDD, VIN
T
STG
TA
Ts
TJ
TDV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
VIL Input low voltage GND – 0.3 - 0.8 V
VIH Input high voltage 2.0 - VDD + 0.3 V
IIL Input low current - 44 - µA
IIH Input high current - 66 - µA
I
X
XOL
I
X
XOH
VOL Output low voltage (VDD = 5V, IOL = 20mA) - - 0.4 V
VOH Output high voltage (VDD = 5V, IOH = 20mA) 2.5 - - V
ICC
IDD Static supply current standby mode - 40 - µA
VDD Operating voltage 4.75 5.0 5.25 V
tON Power up time (first locked clock cycle after power up) - 0.18 - mS
Z
Clock out impedance - 50 - Ω
OUT
AC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
fIN Input frequency 25 - 45 MHz
MODOUT Output frequency 25 - 45 MHz
fd Frequency Deviation
tLH* Output rise time (measured at 0.8V to 2.0V) - 440 - pS
tHL* Output fall time (measured at 2.0V to 0.8V) - 300 - pS
tJC Jitter (cycle to cycle) - - 360 pS
tD Output duty cycle 45 50 55 %
Voltage on any pin with respect to Ground
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
output low current (@ 0.4, VDD = 5V) - 3 - mA
OUT
output high current (@2.5V, VDD = 5V) - 3 - mA
OUT
Dynamic supply current normal mode
(5V, 32MHz and 15pF loading)
-0.5 to +7.0 V
-65 to +125 °C
0 to 70 °C
260 °C
150 °C
2 KV
- 40 - mA
Input Frequency =25MHz - -1.98 Input Frequency =45MHz - -0.60 -
%
* VDD = +5V, Input Frequency = 32MHz, tLH and tHL are measured into a capacitive load of 15pF
Peak EMI Reducing Solution 3 of 7
Notice: The information in this document is subject to change without notice.
Page 4
C
July 2005
ASM3P2108A
rev 0.3
Package Information
D
e
B
Symbol
8-Pin SOIC Package
H
E
A2
A
A1
D
Inches
Min Max Min Max
θ
L
Dimensions
Millimeters
A1 0.004 0.010 0.10 0.25
A 0.053 0.069 1.35 1.75
A2 0.049 0.059 1.25 1.50
B 0.012 0.020 0.31 0.51
C 0.007 0.010 0.18 0.25
D 0.193 BSC 4.90 BSC
E 0.154 BSC 3.91 BSC
e 0.050 BSC 1.27 BSC
H 0.236 BSC 6.00 BSC
L 0.016 0.050 0.41 1.27
θ 0° 8° 0° 8°
Notice: The information in this document is subject to change without notice.
Peak EMI Reducing Solution 4 of 7
Page 5
C
July 2005
rev 0.3
ASM3P2108A
8-Pin TSSOP Package
H
E
D
e
B
A2
A
θ
A1
L
Dimensions
Symbol
A …… 0.043 ….. 1.10
A1 0.002 0.006 0.05 0.15
A2 0.033 0.037 0.85 0.95
B 0.008 0.012 0.19 0.30
c 0.004 0.008 0.09 0.20
D 0.114 0.122 2.90 3.10
E 0.169 0.177 4.30 4.50
e 0.026 BSC 0.65 BSC
H 0.252 BSC 6.40 BSC
L 0.020 0.028 0.50 0.70
θ 0° 8° 0° 8°
Inches Millimeters
Min Max Min Max
Peak EMI Reducing Solution 5 of 7
Notice: The information in this document is subject to change without notice.
Page 6
Q
July 2005
ASM3P2108A
rev 0.3
Ordering Codes
Part Number
ASM3P2108AF-08-SR 3P2108AF 8-PIN SOIC, TAPE AND REEL, Pb Free Commercial
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
R = Tape & reel, T = Tube or Tray
O = SOT U = MSOP
S = SOIC E = TQFP
T = TSSOP L = LQFP
A = SSOP U = MSOP
V = TVSOP P = PDIP
B = BGA D = QSOP
= QFN X = SC-70
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE
PART NUMBER
X= Automotive I= Industrial P or n/c = Commercial
(-40C to +125C) (-40C to +85C) (0C to +70C)
1 = Reserved 6 = Power Management
2 = Non PLL based 7 = Power Management
3 = EMI Reduction 8 = Power Management
4 = DDR support products 9 = Hi Performance
=
ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT
=
Peak EMI Reducing Solution 6 of 7
Notice: The information in this document is subject to change without notice.
Page 7
July 2005
ASM3P2108A
rev 0.3
Alliance Semiconductor Corporation
2575 Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003