Page 1
PLUS MAKE YOUR PRODUCTION A-PLUS
A
ASM17012CB
DATA SHEET
PLUS INTEGRATED CIRCUITS INC.
A
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Sales E-mail: Mr. Jason
sales@aplusinc.com.tw
Technology E-mail: Mr. George
service@aplusinc.com.tw
Page 2
ASM17012CB – VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR
ASM17012CB
1.0 General Description
The AM4DD1707 is very low cost voice synthesizer with 4-bit microprocessor. It has various
features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog
timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS
technology and halt function can minimize power dissipation. Its architecture is similar to RISC,
with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle,
except for program branches and data table read instructions (which need two instruction
cycles).
1.1 Feature
Single power supply can operate from 2.4V through 5.5V
Internal Program ROM: 4K x 10-bit
1 sets of 19-bit DPR can access up to 512K x 10 bits data memory space
Data Registers:
• 96 x 4-bit data RAM (00-1Fh plus 40h-7Fh)
• Unbanked special function registers (SFR) range: 20h-3Fh
I/O Ports:
• PRA: 4-bit I/O Port A (2Bh)
• PRB: 4-bit Output Port B (2Dh)
• PRC: 4-bit Input Port C (2Fh)
On-chip clock generator: Resistive Clock Drive(RM)
Timer: 1
• Timer0: a 9-bit auto-reload timer/counter
Stack: 2-level subroutine nesting
HALT and Release from HALT function to reduce power consumption
Watch Dog Timer (WDT)
Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
Number of instruction: 22
The Voice function can be implemented by microprocessor instruction
• One 8-bit COUT output for ASMxxxxx
Page 3
FIGURE 1.1 : Block Diagram of ASM17012CB
(12)
]
(4)
)
ASM17012CB
Data Bus[3:0]
(ADDR[18:12])
=0000000b
COUT
PCLATCH(8)
PCH(8) PCL(4)
DPR3,2,1
DLATCH(10)
Data Bus[3:0
Accumlator
ALU(4)
Register(4)
One-Channel
( Voice synthesizer )
COUT
PC[11:0]
ADDR[18:0]
DPR[18:0]
P1,P2,P3,P4
enter test mode
Reset Chip
Reset Chip
ROM_Data[9:0]
Immediate(4
Stack
(2-Level)
ROM_ADDR[18:0]
Program
(Data)
ROM
SRAM
(96 x 4)
00h-1Fh
40h-7Fh
Clock Generator
Tes t s el ect
Power on Reset
RESET pin
Instruction Bus [9:0]
Instruction Bus [9:0]
Timer0(9)
OSC
VDD/GND
PRA0
ROM Latch
Instruction
Latch
Instruction
Decoder
Control Signal
Instruction Bus [9:0]
PRA(4)
PRB(4)
PRC(4)
weak or strong
pull-low for PRA,
PRB, PRC
PRASL(4)
2
Rev 1.1 2002/10/29
Page 4
FIGURE 1.2 : External ROM Map of ASM17012CB
g
ASM17012CB
00000h-7FFFFh
ram and data ROM
Pro
PC[11:0]
12bit x 2 STACK
19-bit Data Pointer
Reserved for Testing
Reset Vector
00000h
00080h
00080h-003FFh
00400h
00FFFh(4K)
00000h-00FFFh
Data ROM
7FFFFh(512Kx10-bits)
Page 5
1.2 Pin-Out
ASM17012CB
ASM17012CB Pin-Out
VDD3
PRC1
PRC0/RESET
PRA3-1
PRA0/RESET
OSC
VDD1
COUT
GND1
GND2
TEST
VDD2
PRB0-3
PRC2-3
GND3
I - Third Power supply during operation
I STI
I STI
I/O
I/O STI
I - RM mode Oscillator input
I - First Power supply during operation
O
I - First Circuit Ground Potential
I
O - Enter Test Mode. ( TEST = High )
I - Second Power supply during operation
O Std./O.D. Output type with standard or Open-Drain output
I STI
I - Third Circuit Ground Potential
Std./O.D.
Std./O.D.
STI
Std./O.D.
Std./O.D.
-
-
Std./O.D.
Input port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Input port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Mask option selected as an external RESET pin with weak pull-low capability
I/O port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Output type with standard or Open-Drain output
I/O port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
Output type with standard or Open-Drain output
Mask option selected as an external RESET pin with weak pull-low capability
Current Output of Audio
Second Circuit Ground Potential
Input port with programmable strong pull-low or weak pull-low or
fix-input-floating capability
1.3 Application circuit
Page 6
ASM17012CB
X= 3090 + 100 (um)
Y= 3140 + 80 (um)
1.4 Bonding Diagram
(256K x 10 bit) x 2-Block ROM
ASM17012CB
CHIP SIZE: X= 3090 + 100 (um), Y= 3140 + 80 (um)
1 19 20 21
3
4 5 6 7 8 9 10 11 12 13 18 17 16 15 14 2
Substrate must be connected to GND.
ASM17012CB Pad Location Chip Size: X= 3090 + 100 (um) , Y= 3140 + 80 (um)
PAD # PAD Name X Y PAD # PAD Name X Y
1 VDD3 -1445.96 -1456.08 12 GND2 118.72 -1450.56
2 PRC1 -1325.24 -1456.08 13 TEST 319.68 -1456.08
3 PRC0 -1202.92 -1456.08 14 VDD2 575.32 -1456.08
4 PRA3 -1080.6 -1456.08 15 PRB0 714.48 -1456.08
5 PRA2 -958.28 -1456.08 16 PRB1 836.8 -1456.08
6 PRA1 -835.96 -1456.08 17 PRB2 959.12 -1456.08
7 PRA0/RESET -713.64 -1456.08 18 PRB3 1081.44 -1456.08
8 OSC -591.32 -1456.08 19 PRC2 1203.76 -1456.08
9 VDD1 -414.36 -1456.08 20 PRC3 1326.08 -1456.08
10 COUT -162.24 -1456.08 21 GND3 1449.36 -1456.08
11 GND1 38.72 -1450.56
Page 7
1.5 DC Characteristics for ASMXXXXX
ASM17012CB
SYMBOL PARAMETER VDD MIN. TYP. MAX. UNIT CONDITION
VDD OPERATING VOLTAGE 2.4 3 5.0 V depending on Freq.
Isb STANDBY
Iop
Iih
Ioh OUTPUT HIGH CURRENT
Iol OUTPUT LOW CURRENT
Cout
dF/F
dF/F Fosc VARIATION -20 20 %
SUPPLY
CURRENT
INPUT CURRENT
/Internal pull low
DA CURRENT OUT
(FULL SCALE)
FREQUENCY
OPERATING
STABILITY
3 1
5 1
3 2
5 7
3 3
5 9
5 -5.2
3 -3
5 -8
3 7
5 20
3 4
5 5.2
-10 10 %
uA
mA
uA
mA
in HALT Mode
in HALT Mode
(IO Ports with weak
pull-high pull-low)
Fosc(3v- 2.4v)
Rosc=780k, 4MHz
FIGURE 1.3 : Frequency Range for Rosc in RM mode
4MHz, RM
4MHz, RM
IO Floating
4MHz, RM
4MHz, RM
(IO ports)
Fosc (3v)
VDD=3V,
Resistor(k ohm) 1000 760 560 390
3v Freq.(MHz) 3.18 4.1 5.4 7.69
Rosc & Freq.
10
8
6
4
Freq. MHz
7.69
5.4
4.1
3.18
2
0
0 100 200 300 400 500 600 700 800 900 1000 1100
Rosc k ohm
Loading...