Datasheet AS5C1008DJ-25-XT, AS5C1008DJ-25-IT, AS5C1008DJ-20-XT, AS5C1008DJ-20-IT, AS5C1008DJ-15-XT Datasheet (AUSTN)
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Austin Semiconductor, Inc.
SRAM
AS5C1008
128K x 8 SRAM
RUGGEDIZED PLASTIC
HIGH SPEED SRAM
FEATURES
• Access times of 15, 20 and 25 ns
• Fast output enable (t
• Low active power
• Low standby power
• Fully static operation, no clock or refresh required
• TTL Compatible Inputs and Outputs
• Single +5V power supply
• Package in Industry-standard 32-pin SOJ
OPTIONS MARKING
• Timing
15ns access -15
20ns access -20
25ns access -25
• Package
Plastic SOJ* DJ No. 905
) for cache applications
AOE
PIN ASSIGNMENT
(T op View)
32-Pin Plastic SOJ (DJ)
NC
A6
A5
A4
A3
A2
A1
A0
A16
A15
A14
A13
I/O0
I/O1
I/02
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A7
CE
WE\
A8
A9
A10
A11
OE\
A12
CE\
I/O7
I/O6
I/O5
I/O4
I/O3
2
1
• Operating T emperature Ranges
-Military (-55oC to +125oC) XT
-Industrial (-40oC to +85oC) IT
GENERAL DESCRIPTION
The ASI AS5C1008 is a high speed, low power, 128K by
8-bit ruggedized plastic (COTS) CMOS Static RAM. It is fabricated using high performance, CMOS technology . This highly
reliable process coupled with innovative circuit design techniques, yields access times as fast as 15ns (Max) over the
military and industrial temperature ranges.
When Chip Enable (CE\) is HIGH, the device assumes a
standby mode at which the power dissipation can be reduced
down to 125mW (max) at CMOS input levels.
Easy memory expansion is provided by using asserted LOW
CE\ and asserted HIGH CE2, and asserted LOW write enable
(WE\) controls both writing and reading of the memory.
TheAS5C1008 is pin-compatible with other 128K x 8
SRAM's in the SOJ package.
*For ceramic versions of this product, please see the
MT5C1008 datasheet.
AS5C1008
Rev. 3.5 1/01
PIN FUNCTIONS
A0 - A16 Address Inputs
WE\ Write Enable
CE\
, CE
1
Chip Enable
2
OE\ Output Enable
I/O0 - I/O
V
CC
V
SS
Data Inputs/Outputs
7
Power
Ground
NC No Connection
For more products and information
please visit our web site at
www.austinsemiconductor .com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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Austin Semiconductor, Inc.
SRAM
AS5C1008
ABSOLUTE MAXIMUM RA TINGS*
Vcc Supply Relative to GND...................................-0.5V to +7.0V
Voltage on any pin Relative to GND.........-0.5V to Vcc +7.0V
Storage T emperature ............................................-65°C to +150°C
Ambient Temperature with Power Applied........-55oC to +125oC
Short Circuit Output Current.................................................260oC
Power Dissipation...................................................................1.0W
FUNCTIONAL BLOCK DIA GRAM
A0
Address
A16
Decoder
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability .
Memory Matrix
Data
CE\
CE
WE\
OE\
AS5C1008
Rev. 3.5 1/01
I/O0
Input Data
Control
I/O7
1
2
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
Column I/O
Page 3
SRAM
AS5C1008
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC<TA<+125oC or -40oC to +85oC; Vcc = 5V+10%)
-15 -20 -25
PARAMETER CONDITIONS SYMBOL MIN MAX MIN MAX MIN MAX UNITS
Dynamic Operating
Current
TTL Standby Current TTL Inputs
CMOS Standby Current CMOS Inputs
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Input High Voltage V
Input Low Voltage
Vcc=MAX, I
CE
= VIL and CE2 = VIH, f = fmax
1
Vcc=MAX, V
CE\
> VIH and CE2 > VIL, f = fmax
1
Vcc=MAX, CE\
< 0.2V, VIN > Vcc -0.2V and
V
< 0.2V, f = 0
IN
GND <
VIN < Vcc I
GND <
V
Output Disabled
Vcc = MIN, I
Vcc = MIN, I
= 0mA,
OUT
= VIH or VIL,
IN
> Vcc -0.2V, or CE
1
< Vcc
OUT
= -4.0 mA V
OH
= 8.0 mA V
OL
I
CC1
I
SB1
2
I
SB2
LI
I
LO
OH
OL
IH
V
IL
180 150 140 mA
90 75 70 mA
10 10 10 mA
-10 10 -10 10 -10 10 µA
-10 10 -10 10 -10 10 µA
2.4 2.4 2.4 V
0.4 0.4 0.4 V
Vcc
2.2
+0.5
-0.5 0.8 -0.5 0.8 -0.5 0.8 V
2.2
Vcc
+0.5
2.2
Vcc
+0.5
V
PIN DESCRIPTIONS
A0 - A16: Address Inputs
These 17 address inputs select one of the 131,072 8-bit words in
the RAM.
CE\1: Chip Enable 1 Input
CE\1 is asserted LOW to read from or write to the device. If Chip
Enable 1 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
CE2: Chip Enable 2 Input
CE2 is asserted HIGH to read from or write to the device. If Chip
Enable 2 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
AS5C1008
Rev. 3.5 1/01
OE\: Output Enable Input
The Output Enable Input is asserted LOW. If asserted LOW
while CE\1 is asserted (LOW) and CE2 is asserted (HIGH) and
WE\ is deasserted (HIGH), data from the SRAM will be present
on the I/O pins. The I/O pins will be in the high-impedance
state when OE\ is deasserted.
WE\: Write Enable Input
The Write Enable input is asserted LOW and controls read and
write operations. When CE\1 and WE\ are both asserted (LOW)
and CE2 is asserted (HIGH) input data present on the I/O pins
will be written into the selected memory location.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
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SRAM
AS5C1008
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC<TA<+125oC or -40oC to +85oC; Vcc = 5V+10%)
-15 -20 -25
t
RC
t
AA
t
ACE
t
OH
LZCE
HZCE
t
AOE
LZOE
HZOE
t
WC
t
CW
t
AW
t
AS
t
AH
WP
t
DS
t
DH
LZWE
1
MIN MAX MIN MAX MIN MAX UNIT
15 20 25 ns
15 20 25 ns
15 20 25 ns
333ns
333ns
7810ns
7710ns
000ns
7810ns
15 20 25 ns
12 15 20 ns
12 15 20 ns
000ns
000ns
12 15 20 ns
81015ns
000ns
555ns
7910ns
DESCRIPTION
READ CYCLE
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Enable Access Time
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
WRITE CYCLE
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Address Set-up Time
Address Hold from End of Write
Write Pulse Width (OE\ >
VIH)t
Data Set-up Time
Data Hold Time
Write Disable to Output in Low-Z
Write Enable to Output in High-Z
SYMBOL
t
t
t
t
t
t
HZWE
NOTE: 1. t
AS5C1008
Rev. 3.5 1/01
LZCE
, t
LZWE
, t
HZCE
, t
LZOE
, and t
are simulated values.
HZOE
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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Austin Semiconductor, Inc.
MAX
CAPACITANCE (TA = +25oC, f = 1.0 MHz)
PARAMETER CONDITION SYMBOL
= 0V C
Input Capacitance
Output Capacitance
AC TEST CONDITIONS
Input Pulse Levels.......................................................GND to 3.0V
Input Rise and Fall Times..........................................................3ns
Input Timing Reference Levels................................................1.5V
Output Reference Levels..........................................................1.5V
Output Load..................................................................See Figure 1
V
IN
= 0V C
V
OUT
IN
OUT
SRAM
AS5C1008
UNIT
6pF
8pF
+5V
480Ω
Q
255Ω
30 pF
Q
for t
255Ω
LZCE
, t
HZCE
, t
LZWE
, t
HZWE
, t
+5V
LZOE
480Ω
5 pF
, and t
HZOE
Fig. 1 OUTPUT LOAD EQUIVALENT
AS5C1008
Rev. 3.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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Austin Semiconductor, Inc.
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
4
4
SRAM
AS5C1008
READ CYCLE TIMING 1
ADDR
D
OUT
PREVIOUS DA T A V ALID
NOTE: 1. CE\ is HIGH for READ cycle.
READ CYCLE TIMING 2
CE\
1
CE
2
OE\
D
OUT
High-Z
t
LZCE
t
OH
t
ACE
t
LZOE
t
AOE
(1)
t
RC
t
AA
DA T A V ALID
(1)
t
RC
(2)
t
HZCE
t
HZCE
DA T A V ALID
AS5C1008
Rev. 3.5 1/01
NOTES: 1. CE\ is HIGH for READ cycle.
2. At any given temperature and voltage condition, t
is less than t
HZCE
LZCE
.
WRITE CYCLE TIMING (WE\ CONTR OLLED, OE\ = LO W)
t
WC
ADDR
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
CE\
1
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
CE
2
WE\
D
IN
D
OUT
t
AW
t
CW
t
AS
t
WP2
t
DA T A V ALID
t
HZWE
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6
t
AH
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
t
LZWE
t
DS
DH
High-Z
23
UNDEFINED DON’T CARE
23
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SRAM
4
4
12345678
12345678
12345678
12345678
12345678
9
9
9
0
0
0
0
0
0
1
1
1
9
9
0
0
0
0
1
1
7
7
7
8
8
8
0
0
0
1
1
1
AS5C1008
Austin Semiconductor, Inc.
WRITE CYCLE TIMING (CE\1 CONTROLLED, OE\ = LO W)
t
WC
ADDR
23456789012345678
234567890123456789
23456789012345678
234567890123456789
CE\
23456789012345678
234567890123456789
1
23456789012345678
234567890123456789
23456789012345678
234567890123456789
CE
2
WE\
t
AW
t
CW
t
AS
t
WP1
t
AH
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
t
DS
D
IN
DA T A V ALID
t
DH
High-Z
D
OUT
WRITE CYCLE TIMING (CE2 CONTROLLED, OE\ = LO W)
t
WC
ADDR
CE\
1
CE
2
2345678901234567890123456
23456789012345678901234567
WE\
2345678901234567890123456
23456789012345678901234567
2345678901234567890123456
23456789012345678901234567
D
IN
t
t
AS
AW
t
CW
t
WP1
t
DA T A V ALID
DS
t
AH
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
234567890123456789
2345678901234567890
t
DH
AS5C1008
Rev. 3.5 1/01
D
OUT
23
UNDEFINED DON’T CARE
23
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High-Z
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Austin Semiconductor, Inc.
MECHANICAL DEFINITION*
ASI Case #905 (Package Designator DJ)
A1
A
SRAM
AS5C1008
A2
D
E1
E
ASI SPECIFICATIONS
SYMBOL
A
A1 0.105 0.115
A2
Β 0.082 ---
b
C
D 0.820 0.880
E 0.430 0.445
E1 0.395 0.405
E2 0.360 0.380
e 0.025 0.032
e1
e2 --- 0.045
MIN MAX
0.140 BSC
0.027 TYP
0.018 TYP
0.010 TYP
0.050 TYP
e1
E2
e
b
C
B
e2
* All measurements are in inches.
AS5C1008
Rev. 3.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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Austin Semiconductor, Inc.
Device Number
Package
Type
Speed
ns
Process
AS5C1008 DJ -15
/*
AS5C1008 DJ -20
/*
AS5C1008 DJ -25
/*
AS5C1008DJ-25/XT
ORDERING INFORMATION
EXAMPLE:
SRAM
AS5C1008
*AVAILABLE PROCESSES
IT = Industrial T emperature Range -40oC to +85oC
XT = Extended T emperature Range -55oC to +125oC
AS5C1008
Rev. 3.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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