Datasheet AS2214N Datasheet (ASTEC)

Page 1
AS2214
Primary Side PWM Controller
Features
Low Startup Current
Bulk and AC sensing
Soft Start
Single-start or auto-restart
modes
Oscillator trimmed for precision
duty cycle clamp
Standard temperature range
extended to 105°C
Remote on / off control
Buffered Ramp for slope
compensation
Standard current mode control
Description
The AS2214 is a full featured, pulse width modulation controller. Based on an improved AS3842, the AS2214 provides additional features that reduce component count and improve specifications in a wide range of power supply designs. The added functionality includes AC power and bulk voltage sensing, over-voltage input, as well as the ability to latch off or bounce through different fault conditions.
The AS2214 requires less than 10µA of startup current. The undervoltage lockout (UVLO) thresholds are nominally 13.8V for turn on and 8 V for turn off. A precision 2.5 V bandgap reference serves as an input for the error amplifier. The oscillator discharge current is trimmed to provide guaran­teed duty cycle clamping.
Pin Configuration
Top view
1V
CC
2V
REG
3COMP BOK
4V
FB
5ISNS ACP
6SS OV
7RAMP RT/CT
14
OUT
13
GND
12
11
LEN
10
9
8
Ordering Information
Package Temperature Range Order Code
14-Pin Plastic DIP 0 to 105° C AS2214N
ASTEC Semiconductor
83
Page 2
AS2214
Functional Block Diagram
2V 5
AC
DETE C T
V
REG
50µA
3V 95
2V 5
ACP
LEN
BOK
OV
ISNS
(LEN)
6V
(BULK_UV )
(CLR)
(OV )
Primary Side PWM Controller
5V enable
SS LOGIC
(RUN)
UVLO
5V R eg.
V
REG
6µA
V
V
SS
CC
REG
COMP
V
FB
2V 5
RT/CT
ASTEC Semiconductor
2R
1V
R
OSC
x1RAMP
CM PWM
SS P W M
(BLA NK)
(PWM)
V
CC
OUT
GND
84
Page 3
Primary Side PWM Controller
AS2214 Soft Start Logic
AS2214
ENBL
SS
Q
•Q
ENBL
S
PRESET
R
Started
Q
•Q
ENBL
R
PRESET
S
Faulted
Q
•Q
R
PRESET
S
VOV
PWM_Disable
6µA
REG
V
2V7
Latch_bias
REG
V
Preset S R Q •Q
0---00
ENABL
ASTEC Semiconductor
10010
00001
1- 1010
1- 0101
1- 00Q•Q
1- 1100
LEN
OV
Q
•Q
ENBL
REG
V
2V5
1V7
OV
PRESET
S
R
3V9
2V5
BOK
85
Page 4
AS2214
Primary Side PWM Controller
Pin Function Description
Pin Number Function Description
1VCCPositive supply voltage for the IC. 2V
REG
Output of 5V series regulator.
3 COMP This pin is the error amplifier output. Typically used to provide loop compensation to
maintain VFB at 2.5 V.
4V
FB
Inverting input of the error amplifier. The non-inverting input is a trimmed 2.5 V bandgap reference.
5 ISNS A voltage proportional to inductor current is connected to this pin. The PWM uses this
information to terminate the gate drive of the output.
6 SS This pin provides a 6µA current source to linearly charge an external capacitor. This pin
is compared to the RAMP pin in the soft start comparator, terminating output pulses when RAMP goes above the SS voltage.
7 RAMP This pin is a level-shifted and buffered oscillator signal used to provide slope compensa-
tion to the current sense signal. The pin also serves as the non-inverting input of the soft­start comparator.
8 RT/CT Oscillator frequency and maximum duty cycle are set by connecting a resistor (R
T
) to
VREG and a capacitor (CT) to ground.
9 OV This pin latches SS low when pulled above 2.5 V. The latch can be reset by pulling
OV above 4 V then back to ground. 10 ACP This pin detects the presence of AC signal and drives LEN high. 11 LEN This pin must be high to enable starting. The pin can also clear all latches by going low
then high. 12 BOK This pin monitors the bulk voltage through a resistor divider and, when BOK exceeds
2.5 V, provides a 50µA current source for hysteresis. When BOK drops below 2.5V, SS
is pulled low and the hysteresis current is turned off. Auto-restart after a brown-out is
possible. 13 GND Circuit common ground. 14 OUT This totem pole output is designed to directly drive a power MOSFET switch capable of
sourcing and sinking peak currents up to 1 A.
ASTEC Semiconductor
86
Page 5
Primary Side PWM Controller
AS2214
Absolute Maximum Ratings
Parameter Symbol Rating Unit
Reference Current I Output Current I Supply Voltage V Output Voltage V Continuous Power Dissipation at 25° CP Junction Temperature T Storage Temperature Range T Lead Temperature, Soldering 10 Seconds T
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
REF OUT
CC
OUT
D J
STG
L
200 mA
1A 20 V 20 V
500 mW 150 °C
–65 to 150 °C
300 °C
Recommended Conditions
Parameter Symbol Rating Unit
Supply Voltage V Oscillator F
CC
OSC
10 - 15 V 50 - 250 kHz
Typical Thermal Resistance
Package θJA θJC Typical Derating
14L PDIP 85° C/W 40° C/W 11.7 mW/°C
Electrical Characteristics
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V BOK = 3 V; OV = 0V; RT = 680 ; CT = 10 nF. To override UVLO, V
Parameter Symbol Test Condition Min Typ Max Unit Error Amplifier
Input Voltage V Input Bias Current I Voltage Gain A Transconductance G Unity Gain Bandwidth GBW 0.8 1.2 MHz Power Supply Rejection Ratio PSRR 12 VCC 18 V 60 70 dB Output Sink Current I Output Source Current I Output Swing High I Output Swing Low I
BIAS
VOL
COMPL
COMPH
COMPH
COMPL
TJ = 25°C 2.465 2.500 2.535 V
FB
2 V
m
VFB = 2.7 V; V VFB = 2.3 V; V VFB = 2.3 V; RL = 15 to GND 5 5.5 V VFB = 2.7 V; RL = 15 to V
4 V 65 90 dB
COMP
COMP
COMP
should be raised above 18 V prior to test.
CC
-0.1 -1 µA
1 mA/mV
= 1.1 V 2 6 mA = 5 V 0.5 1.0 mA
REG
0.7 1.1 V
= 15 V;
CC
ASTEC Semiconductor
87
Page 6
AS2214
Primary Side PWM Controller
Electrical Characteristics (cont’d)
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V BOK = 3 V; OV = 0V; RT = 680 ; CT = 10 nF. To override UVLO, V
should be raised above 18 V prior to test.
CC
Parameter Symbol Test Condition Min Typ Max Unit 5 V Regulator
Output Voltage V
REG
Line Regulation PSRR 12 V Load Regulation 1 I Temperature Stability TC
REG
I
= 1 mA, TJ= 25° C 4.90 5.00 5.10 V
REG
18 V 5 15 mV
CC
20mA 5 15 mV
REG
0.2 0.4 mV/°C Total Output Variation Line, Load,Temperature 4.85 5.15 V Long-Term Stability Over 1,000 hrs at 25°C525mV Output Noise Voltage V Maximum Source Current I
NOISE
MAX
10 f 100kHz, TJ = 25°C50µV V
= 4.8 V 30 120 180 mA
REG
Oscillator
Initial Accuracy F
OSC
Voltage Stability 12 V Temperature Stability TC Amplitude V
OSC
Upper Trip Point V Lower Trip Point V Discharge Current I
DSC
TJ =25°C 108 120 132 kHz
18 V 0.2 1 %
CC
T
F
TJ ≤ T
MIN
MAX
5%
VRT/CT peak-to-peak 1.55 V
H
L
2.80 V
1.25 V
7.50 8.70 9.50 mA Duty cycle Limit RT =680 , CT =10nF, TJ =25°C465054% Over-Temperature Shutdown T
OT
140 °C
Soft Start Comparator
SS Charge Current I SS Discharge Current I SS Lower Clamp V RAMP High Level V RAMP Low Level V
SS
Dsc
SS Low
RAMPHTJ
RAMPLTJ
SS V
V
V
SS
= 1 V, V
SS
RAMP
> 2.5V 2 8 mA
OV
-4 -6 -10 µA
0.6 V =25°C 2.15 V =25°C 0.6 V
RAMP Levels TC Note: RAMP wavefrom is the same as -2 mV/°C
the RT/CT wavefrom, but level shifted
down one diode drop RAMP Sink Current I RAMP Source Current I Propagation Delay to Output t
RAMPL
RAMPH
PB
TJ =25°C –0.1 –0.2 mA
TJ =25°C1mA
85 150 ns
= 15 V;
CC
ASTEC Semiconductor
88
Page 7
Primary Side PWM Controller
AS2214
Electrical Characteristics (cont’d)
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V BOK = 3 V; OV = 0V; RT = 680 ; CT = 10 nF. To override UVLO, V
should be raised above 18 V prior to test.
CC
Parameter Symbol Test Condition Min Typ Max Unit Housekeeping
BOK UV Threshold V BOK UV Hysteresis Current I BOK Input Bias Current I OV Threshold V OV Clear Threshold V OV Reset Threshold V OV Bias Current I
UV V
BOK
HYST BOKVBOK
OFF BOKVBOK
OV
OVH
OVL
BIAS OVVREG
REG
= 5 V 2.500 2.537 2.575 V = 2.6 V 42 50 58 µA = 2.4 V 0.1 1.0 µA
2.50 2.80 3.10 V
3.80 4.00 4.50 V
1.10 1.75 2.20 V
= 5 V, V
OV Threshold -1 -0.2 1 µA
OV
* For Vov > OV Reset Threshold,
see characteristic curve ACP Voltage V ACP Voltage V LEN Charge Current I LEN Charge Current I Minimum Voltage for LEN V
ACP
ACP
LEN
LEN
LEN MIN
I
= 10 µA 1.3 V
ACP
I
= -10 µA -1.2 V
ACP
I
= 10 µA; V
ACP
I
= -10 µA; V
ACP
= 0 V -30 -45 -65 µA
LEN
= 0 V -30 -50 -65 µA
LEN
3.6 4.5 V
Functionality LEN Logic Reset Voltage V
LEN Regeneration Current I LEN Clamp V LEN Bias Current I
BIAS LENVLEN
LEN
LENrgn
LEN
This level reflects one diode drop of 3.0 V
hysteresis from V
LEN min
-10 µA
I
= 5 µA 5.2 5.9 6.6 V
ACP
= 5 V, I
= 0 µA8µA
ACP
* For LEN input current over full
range, see characteristic curve.
Current Sense Comparator
Transfer Gain AV I
Level Shift V
SNS
Maximum Input Signal V Power Supply Rejection Ratio PSRR 12 V Input Bias Current I Propagation Delay to Output t
BIAS
PB
ISNS
LS
-0.2 V
V
ISNS
COMP
0.8 V 2.85 3.00 3.15 V/V
ISNS
= 0 V 1.50 V
=+5 V 1.00 1.08 1.20 V
18 V 70 dB
CC
-1 -10 µA
85 150 ns
= 15 V;
CC
ASTEC Semiconductor
89
Page 8
AS2214
Primary Side PWM Controller
Electrical Characteristics (cont’d)
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V BOK = 3 V; OV = 0V; RT = 680 ; CT = 10 nF. To override UVLO, V
should be raised above 18 V prior to test.
CC
Parameter Symbol Test Condition Min Typ Max Unit Under Voltage Lockout
Startup Threshold V Minimum Operating Voltage V
(ON) 12.5 14.0 15.8 V
CC
(OFF) 7.3 8.0 8.5 V
CC
after Trun-on Startup Current I Startup Current I Operating Supply Current I Maximum Operating Supply V
CC
CC
CC
CC Max
VCC = 12 V; V VCC = 12V; I
ACP
= V
ACP
= 0 V 2 10 µA
LEN
= 5 µA 225 300 µA
12 20 mA
18 V
Voltage Output Impedance to GND in Z
OUT
VCC = 6 V 22.0 k
UVLO State
Output
Output Low Level V Output Low Level V Output High Level V Output High Level V Rise Time t Fall Time t Maximum Duty Cycle D Minimum Duty Cycle D
MAX
MIN
I
OL
OL
OH
OH
R
F
= 20 mA 0.1 0.4 V
SINK
I
= 150 mA 1.5 2.2 V
SINK
I
= 20 mA 13 13.5 V
SOURCE
I
= 150 mA 12 13 V
SOURCE
CL = 1 nF 50 150 ns CL = 1 nF 50 150 ns
94 97 100 %
0 %
= 15 V;
CC
ASTEC reserves the right to make changes without further notice to any products described herein to improve reliability, function, or design. ASTEC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights or the rights of others. ASTEC products are not authorized for use as components in life support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify ASTEC of any such intended end use whereupon ASTEC will determine availability and suitability of its products for the intended use. ASTEC and the ASTEC logo are trademarks of ASTEC (BSR) PLC.
ASTEC SEMICONDUCTOR
255 Sinclair Frontage Road Milpitas, California 95035 Tel. (408) 263-8300 FAX (408) 263-8340
ASTEC Semiconductor
90
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